Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: ISC */ |
| 2 | /* Copyright (C) 2021 MediaTek Inc. */ |
| 3 | |
Sean Wang | f5c3f98 | 2022-03-09 08:03:52 +0800 | [diff] [blame] | 4 | #define FIRMWARE_MT7622 "mediatek/mt7622pr2h.bin" |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 5 | #define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin" |
| 6 | #define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin" |
| 7 | #define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin" |
| 8 | |
Sean Wang | e441265 | 2022-02-09 02:17:41 +0800 | [diff] [blame] | 9 | #define HCI_EV_WMT 0xe4 |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 10 | #define HCI_WMT_MAX_EVENT_SIZE 64 |
| 11 | |
Mark Chen | 191c872 | 2022-01-10 03:23:59 +0800 | [diff] [blame] | 12 | #define BTMTK_WMT_REG_WRITE 0x1 |
Sean Wang | c603bf1 | 2021-10-19 05:30:21 +0800 | [diff] [blame] | 13 | #define BTMTK_WMT_REG_READ 0x2 |
| 14 | |
Chih-Ying Chiang | 8fafe70 | 2022-02-09 02:17:40 +0800 | [diff] [blame] | 15 | #define MT7921_BTSYS_RST 0x70002610 |
| 16 | #define MT7921_BTSYS_RST_WITH_GPIO BIT(7) |
| 17 | |
Mark Chen | 191c872 | 2022-01-10 03:23:59 +0800 | [diff] [blame] | 18 | #define MT7921_PINMUX_0 0x70005050 |
| 19 | #define MT7921_PINMUX_1 0x70005054 |
| 20 | |
Chih-Ying Chiang | 8fafe70 | 2022-02-09 02:17:40 +0800 | [diff] [blame] | 21 | #define MT7921_DLSTATUS 0x7c053c10 |
| 22 | #define BT_DL_STATE BIT(1) |
| 23 | |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 24 | enum { |
| 25 | BTMTK_WMT_PATCH_DWNLD = 0x1, |
Sean Wang | 3a72204 | 2021-10-19 05:30:13 +0800 | [diff] [blame] | 26 | BTMTK_WMT_TEST = 0x2, |
| 27 | BTMTK_WMT_WAKEUP = 0x3, |
| 28 | BTMTK_WMT_HIF = 0x4, |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 29 | BTMTK_WMT_FUNC_CTRL = 0x6, |
| 30 | BTMTK_WMT_RST = 0x7, |
Sean Wang | c603bf1 | 2021-10-19 05:30:21 +0800 | [diff] [blame] | 31 | BTMTK_WMT_REGISTER = 0x8, |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 32 | BTMTK_WMT_SEMAPHORE = 0x17, |
| 33 | }; |
| 34 | |
| 35 | enum { |
| 36 | BTMTK_WMT_INVALID, |
| 37 | BTMTK_WMT_PATCH_UNDONE, |
| 38 | BTMTK_WMT_PATCH_PROGRESS, |
| 39 | BTMTK_WMT_PATCH_DONE, |
| 40 | BTMTK_WMT_ON_UNDONE, |
| 41 | BTMTK_WMT_ON_DONE, |
| 42 | BTMTK_WMT_ON_PROGRESS, |
| 43 | }; |
| 44 | |
| 45 | struct btmtk_wmt_hdr { |
| 46 | u8 dir; |
| 47 | u8 op; |
| 48 | __le16 dlen; |
| 49 | u8 flag; |
| 50 | } __packed; |
| 51 | |
| 52 | struct btmtk_hci_wmt_cmd { |
| 53 | struct btmtk_wmt_hdr hdr; |
| 54 | u8 data[]; |
| 55 | } __packed; |
| 56 | |
| 57 | struct btmtk_hci_wmt_evt { |
| 58 | struct hci_event_hdr hhdr; |
| 59 | struct btmtk_wmt_hdr whdr; |
| 60 | } __packed; |
| 61 | |
| 62 | struct btmtk_hci_wmt_evt_funcc { |
| 63 | struct btmtk_hci_wmt_evt hwhdr; |
| 64 | __be16 status; |
| 65 | } __packed; |
| 66 | |
Sean Wang | c603bf1 | 2021-10-19 05:30:21 +0800 | [diff] [blame] | 67 | struct btmtk_hci_wmt_evt_reg { |
| 68 | struct btmtk_hci_wmt_evt hwhdr; |
| 69 | u8 rsv[2]; |
| 70 | u8 num; |
| 71 | __le32 addr; |
| 72 | __le32 val; |
| 73 | } __packed; |
| 74 | |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 75 | struct btmtk_tci_sleep { |
| 76 | u8 mode; |
| 77 | __le16 duration; |
| 78 | __le16 host_duration; |
| 79 | u8 host_wakeup_pin; |
| 80 | u8 time_compensation; |
| 81 | } __packed; |
| 82 | |
Mark Chen | ce64b3e | 2022-01-10 03:23:58 +0800 | [diff] [blame] | 83 | struct btmtk_wakeon { |
| 84 | u8 mode; |
| 85 | u8 gpo; |
| 86 | u8 active_high; |
| 87 | __le16 enable_delay; |
| 88 | __le16 wakeup_delay; |
| 89 | } __packed; |
| 90 | |
Mark Chen | 191c872 | 2022-01-10 03:23:59 +0800 | [diff] [blame] | 91 | struct btmtk_sco { |
| 92 | u8 clock_config; |
| 93 | u8 transmit_format_config; |
| 94 | u8 channel_format_config; |
| 95 | u8 channel_select_config; |
| 96 | } __packed; |
| 97 | |
Sean Wang | 5677bcf | 2022-01-10 03:24:00 +0800 | [diff] [blame] | 98 | struct reg_read_cmd { |
| 99 | u8 type; |
| 100 | u8 rsv; |
| 101 | u8 num; |
| 102 | __le32 addr; |
| 103 | } __packed; |
| 104 | |
Mark Chen | 191c872 | 2022-01-10 03:23:59 +0800 | [diff] [blame] | 105 | struct reg_write_cmd { |
| 106 | u8 type; |
| 107 | u8 rsv; |
| 108 | u8 num; |
| 109 | __le32 addr; |
| 110 | __le32 data; |
| 111 | __le32 mask; |
| 112 | } __packed; |
| 113 | |
Sean Wang | 8c0d17b | 2021-10-19 05:30:12 +0800 | [diff] [blame] | 114 | struct btmtk_hci_wmt_params { |
| 115 | u8 op; |
| 116 | u8 flag; |
| 117 | u16 dlen; |
| 118 | const void *data; |
| 119 | u32 *status; |
| 120 | }; |
| 121 | |
| 122 | typedef int (*wmt_cmd_sync_func_t)(struct hci_dev *, |
| 123 | struct btmtk_hci_wmt_params *); |
| 124 | |
| 125 | #if IS_ENABLED(CONFIG_BT_MTK) |
| 126 | |
| 127 | int btmtk_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); |
| 128 | |
| 129 | int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname, |
| 130 | wmt_cmd_sync_func_t wmt_cmd_sync); |
| 131 | |
| 132 | int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname, |
| 133 | wmt_cmd_sync_func_t wmt_cmd_sync); |
| 134 | #else |
| 135 | |
| 136 | static inline int btmtk_set_bdaddr(struct hci_dev *hdev, |
| 137 | const bdaddr_t *bdaddr) |
| 138 | { |
| 139 | return -EOPNOTSUPP; |
| 140 | } |
| 141 | |
| 142 | static int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname, |
| 143 | wmt_cmd_sync_func_t wmt_cmd_sync) |
| 144 | { |
| 145 | return -EOPNOTSUPP; |
| 146 | } |
| 147 | |
| 148 | static int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname, |
| 149 | wmt_cmd_sync_func_t wmt_cmd_sync) |
| 150 | { |
| 151 | return -EOPNOTSUPP; |
| 152 | } |
| 153 | |
| 154 | #endif |