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Michal Simek32cda442017-11-01 13:16:17 +01001// SPDX-License-Identifier: GPL-2.0
Josh Cartwrighte06f1a92012-10-31 12:24:48 -06002/*
Michal Simekaeb29452014-08-21 11:19:46 +02003 * Copyright (C) 2011 - 2014 Xilinx
Josh Cartwrighte06f1a92012-10-31 12:24:48 -06004 * Copyright (C) 2012 National Instruments Corp.
Josh Cartwrighte06f1a92012-10-31 12:24:48 -06005 */
6/dts-v1/;
Michal Simek1188c022016-04-07 11:28:12 +02007#include "zynq-7000.dtsi"
Josh Cartwrighte06f1a92012-10-31 12:24:48 -06008
9/ {
Luis Araneda28432332018-07-12 00:10:20 -040010 model = "Xilinx ZC702 board";
Josh Cartwrighte06f1a92012-10-31 12:24:48 -060011 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
12
Michal Simekab216ac2015-01-15 14:12:46 +010013 aliases {
14 ethernet0 = &gem0;
15 i2c0 = &i2c0;
16 serial0 = &uart1;
Michal Simek025ba182016-04-07 11:23:34 +020017 mmc0 = &sdhci0;
Michal Simekab216ac2015-01-15 14:12:46 +010018 };
19
Michal Simekda457d52016-11-15 15:02:18 +010020 memory@0 {
Josh Cartwrighte06f1a92012-10-31 12:24:48 -060021 device_type = "memory";
22 reg = <0x0 0x40000000>;
23 };
24
25 chosen {
Michal Simek21ad06c2016-02-16 09:49:27 +010026 bootargs = "";
Michal Simek22210432015-02-11 13:06:36 +010027 stdout-path = "serial0:115200n8";
Josh Cartwrighte06f1a92012-10-31 12:24:48 -060028 };
29
Ezra Savardb76da4d2014-08-29 11:10:33 -070030 gpio-keys {
31 compatible = "gpio-keys";
Ezra Savardb76da4d2014-08-29 11:10:33 -070032 autorepeat;
33 sw14 {
34 label = "sw14";
35 gpios = <&gpio0 12 0>;
36 linux,code = <108>; /* down */
Sudeep Hollab0d12e92015-10-21 11:10:16 +010037 wakeup-source;
Ezra Savardb76da4d2014-08-29 11:10:33 -070038 autorepeat;
39 };
40 sw13 {
41 label = "sw13";
42 gpios = <&gpio0 14 0>;
43 linux,code = <103>; /* up */
Sudeep Hollab0d12e92015-10-21 11:10:16 +010044 wakeup-source;
Ezra Savardb76da4d2014-08-29 11:10:33 -070045 autorepeat;
46 };
47 };
48
Ezra Savardf8aa68672014-08-29 07:38:37 -070049 leds {
50 compatible = "gpio-leds";
51
52 ds23 {
53 label = "ds23";
54 gpios = <&gpio0 10 0>;
55 linux,default-trigger = "heartbeat";
56 };
57 };
Soren Brinkmann1643b312014-12-02 08:07:11 -080058
59 usb_phy0: phy0 {
60 compatible = "usb-nop-xceiv";
61 #phy-cells = <0>;
62 };
Josh Cartwrighte06f1a92012-10-31 12:24:48 -060063};
Soren Brinkmannec11ebc2013-06-13 09:37:16 -070064
Michal Simek6835fe42015-02-12 10:59:17 +010065&amba {
66 ocm: sram@fffc0000 {
67 compatible = "mmio-sram";
68 reg = <0xfffc0000 0x10000>;
69 };
70};
71
Michal Simekfdf26182014-07-23 15:03:03 +020072&can0 {
73 status = "okay";
Soren Brinkmannf52948e2015-01-09 07:43:50 -080074 pinctrl-names = "default";
75 pinctrl-0 = <&pinctrl_can0_default>;
Michal Simekfdf26182014-07-23 15:03:03 +020076};
77
Peter Crosthwaite8c7634c2014-12-01 10:25:49 +100078&clkc {
79 ps-clk-frequency = <33333333>;
80};
81
Steffen Trumtrar982264c2013-12-11 09:29:49 -080082&gem0 {
83 status = "okay";
Soren Brinkmannda455812014-08-20 08:56:57 -070084 phy-mode = "rgmii-id";
Soren Brinkmannf62f4042014-08-20 08:56:59 -070085 phy-handle = <&ethernet_phy>;
Soren Brinkmannf52948e2015-01-09 07:43:50 -080086 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_gem0_default>;
Soren Brinkmannf62f4042014-08-20 08:56:59 -070088
89 ethernet_phy: ethernet-phy@7 {
90 reg = <7>;
Sai Pavan Boddue5e6f682017-03-06 18:17:19 +053091 device_type = "ethernet-phy";
Soren Brinkmannf62f4042014-08-20 08:56:59 -070092 };
Steffen Trumtrar982264c2013-12-11 09:29:49 -080093};
94
Soren Brinkmannf52948e2015-01-09 07:43:50 -080095&gpio0 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_gpio0_default>;
98};
99
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700100&i2c0 {
101 status = "okay";
102 clock-frequency = <400000>;
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_i2c0_default>;
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700105
Michal Simek16dbf082018-02-06 14:00:30 +0100106 i2c-mux@74 {
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700107 compatible = "nxp,pca9548";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 reg = <0x74>;
111
112 i2c@0 {
113 #address-cells = <1>;
114 #size-cells = <0>;
115 reg = <0>;
116 si570: clock-generator@5d {
117 #clock-cells = <0>;
118 compatible = "silabs,si570";
119 temperature-stability = <50>;
120 reg = <0x5d>;
121 factory-fout = <156250000>;
122 clock-frequency = <148500000>;
123 };
124 };
125
Christian Kohnb0903482015-11-12 15:53:35 -0800126 i2c@1 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 reg = <1>;
130 adv7511: hdmi-tx@39 {
131 compatible = "adi,adv7511";
132 reg = <0x39>;
133 adi,input-depth = <8>;
134 adi,input-colorspace = "yuv422";
135 adi,input-clock = "1x";
136 adi,input-style = <3>;
137 adi,input-justification = "right";
138 };
139 };
140
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700141 i2c@2 {
142 #address-cells = <1>;
143 #size-cells = <0>;
144 reg = <2>;
145 eeprom@54 {
Javier Martinez Canillas3a42d362017-06-15 20:54:12 +0200146 compatible = "atmel,24c08";
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700147 reg = <0x54>;
148 };
149 };
150
151 i2c@3 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 reg = <3>;
155 gpio@21 {
156 compatible = "ti,tca6416";
157 reg = <0x21>;
158 gpio-controller;
159 #gpio-cells = <2>;
160 };
161 };
162
163 i2c@4 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 reg = <4>;
167 rtc@51 {
168 compatible = "nxp,pcf8563";
169 reg = <0x51>;
170 };
171 };
172
173 i2c@7 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 reg = <7>;
Rob Herringf5054ce2018-09-13 13:12:39 -0500177 hwmon@34 {
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700178 compatible = "ti,ucd9248";
Rob Herringf5054ce2018-09-13 13:12:39 -0500179 reg = <0x34>;
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700180 };
Rob Herringf5054ce2018-09-13 13:12:39 -0500181 hwmon@35 {
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700182 compatible = "ti,ucd9248";
Rob Herringf5054ce2018-09-13 13:12:39 -0500183 reg = <0x35>;
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700184 };
Rob Herringf5054ce2018-09-13 13:12:39 -0500185 hwmon@36 {
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700186 compatible = "ti,ucd9248";
Rob Herringf5054ce2018-09-13 13:12:39 -0500187 reg = <0x36>;
Soren Brinkmann0f6faa32014-04-04 14:27:56 -0700188 };
189 };
190 };
191};
192
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800193&pinctrl0 {
194 pinctrl_can0_default: can0-default {
195 mux {
196 function = "can0";
197 groups = "can0_9_grp";
198 };
199
200 conf {
201 groups = "can0_9_grp";
202 slew-rate = <0>;
203 io-standard = <1>;
204 };
205
206 conf-rx {
207 pins = "MIO46";
208 bias-high-impedance;
209 };
210
211 conf-tx {
212 pins = "MIO47";
213 bias-disable;
214 };
215 };
216
217 pinctrl_gem0_default: gem0-default {
218 mux {
219 function = "ethernet0";
220 groups = "ethernet0_0_grp";
221 };
222
223 conf {
224 groups = "ethernet0_0_grp";
225 slew-rate = <0>;
226 io-standard = <4>;
227 };
228
229 conf-rx {
230 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
231 bias-high-impedance;
232 low-power-disable;
233 };
234
235 conf-tx {
236 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
237 bias-disable;
238 low-power-enable;
239 };
240
241 mux-mdio {
242 function = "mdio0";
243 groups = "mdio0_0_grp";
244 };
245
246 conf-mdio {
247 groups = "mdio0_0_grp";
248 slew-rate = <0>;
249 io-standard = <1>;
250 bias-disable;
251 };
252 };
253
254 pinctrl_gpio0_default: gpio0-default {
255 mux {
256 function = "gpio0";
257 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
258 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
259 "gpio0_13_grp", "gpio0_14_grp";
260 };
261
262 conf {
263 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
264 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
265 "gpio0_13_grp", "gpio0_14_grp";
266 slew-rate = <0>;
267 io-standard = <1>;
268 };
269
270 conf-pull-up {
271 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
272 bias-pull-up;
273 };
274
275 conf-pull-none {
276 pins = "MIO7", "MIO8";
277 bias-disable;
278 };
279 };
280
281 pinctrl_i2c0_default: i2c0-default {
282 mux {
283 groups = "i2c0_10_grp";
284 function = "i2c0";
285 };
286
287 conf {
288 groups = "i2c0_10_grp";
289 bias-pull-up;
290 slew-rate = <0>;
291 io-standard = <1>;
292 };
293 };
294
295 pinctrl_sdhci0_default: sdhci0-default {
296 mux {
297 groups = "sdio0_2_grp";
298 function = "sdio0";
299 };
300
301 conf {
302 groups = "sdio0_2_grp";
303 slew-rate = <0>;
304 io-standard = <1>;
305 bias-disable;
306 };
307
308 mux-cd {
309 groups = "gpio0_0_grp";
310 function = "sdio0_cd";
311 };
312
313 conf-cd {
314 groups = "gpio0_0_grp";
315 bias-high-impedance;
316 bias-pull-up;
317 slew-rate = <0>;
318 io-standard = <1>;
319 };
320
321 mux-wp {
322 groups = "gpio0_15_grp";
323 function = "sdio0_wp";
324 };
325
326 conf-wp {
327 groups = "gpio0_15_grp";
328 bias-high-impedance;
329 bias-pull-up;
330 slew-rate = <0>;
331 io-standard = <1>;
332 };
333 };
334
335 pinctrl_uart1_default: uart1-default {
336 mux {
337 groups = "uart1_10_grp";
338 function = "uart1";
339 };
340
341 conf {
342 groups = "uart1_10_grp";
343 slew-rate = <0>;
344 io-standard = <1>;
345 };
346
347 conf-rx {
348 pins = "MIO49";
349 bias-high-impedance;
350 };
351
352 conf-tx {
353 pins = "MIO48";
Soren Brinkmann38c735f2015-01-26 11:49:55 -0800354 bias-disable;
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800355 };
356 };
Soren Brinkmann0c79b9f2015-01-26 11:49:56 -0800357
358 pinctrl_usb0_default: usb0-default {
359 mux {
360 groups = "usb0_0_grp";
361 function = "usb0";
362 };
363
364 conf {
365 groups = "usb0_0_grp";
366 slew-rate = <0>;
367 io-standard = <1>;
368 };
369
370 conf-rx {
371 pins = "MIO29", "MIO31", "MIO36";
372 bias-high-impedance;
373 };
374
375 conf-tx {
376 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
377 "MIO35", "MIO37", "MIO38", "MIO39";
378 bias-disable;
379 };
380 };
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800381};
382
Soren Brinkmann3f7c7302013-12-02 10:02:37 -0800383&sdhci0 {
384 status = "okay";
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800385 pinctrl-names = "default";
386 pinctrl-0 = <&pinctrl_sdhci0_default>;
Soren Brinkmann3f7c7302013-12-02 10:02:37 -0800387};
388
Soren Brinkmannec11ebc2013-06-13 09:37:16 -0700389&uart1 {
390 status = "okay";
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800391 pinctrl-names = "default";
392 pinctrl-0 = <&pinctrl_uart1_default>;
Soren Brinkmannec11ebc2013-06-13 09:37:16 -0700393};
Soren Brinkmann1643b312014-12-02 08:07:11 -0800394
395&usb0 {
396 status = "okay";
397 dr_mode = "host";
398 usb-phy = <&usb_phy0>;
Soren Brinkmann0c79b9f2015-01-26 11:49:56 -0800399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_usb0_default>;
Soren Brinkmann1643b312014-12-02 08:07:11 -0800401};