Nobuhiro Iwamatsu | ffa81a0 | 2021-10-25 12:10:36 +0900 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
Andrew Lunn | dd3cb46 | 2022-08-25 04:04:27 +0200 | [diff] [blame] | 7 | title: Toshiba Visconti5 TMPV770x SMU controller |
Nobuhiro Iwamatsu | ffa81a0 | 2021-10-25 12:10:36 +0900 | [diff] [blame] | 8 | |
| 9 | maintainers: |
| 10 | - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
| 11 | |
| 12 | description: |
| 13 | Toshia Visconti5 SMU (System Management Unit) which supports the clock |
| 14 | and resets on TMPV770x. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | items: |
| 19 | - const: toshiba,tmpv7708-pismu |
| 20 | - const: syscon |
| 21 | |
| 22 | reg: |
| 23 | maxItems: 1 |
| 24 | |
| 25 | '#clock-cells': |
| 26 | const: 1 |
| 27 | |
| 28 | '#reset-cells': |
| 29 | const: 1 |
| 30 | |
| 31 | required: |
| 32 | - compatible |
| 33 | - reg |
| 34 | - "#clock-cells" |
| 35 | - "#reset-cells" |
| 36 | |
| 37 | additionalProperties: false |
| 38 | |
| 39 | examples: |
| 40 | - | |
| 41 | soc { |
| 42 | #address-cells = <2>; |
| 43 | #size-cells = <2>; |
| 44 | |
| 45 | pismu: syscon@24200000 { |
| 46 | compatible = "toshiba,tmpv7708-pismu", "syscon"; |
| 47 | reg = <0 0x24200000 0 0x2140>; |
| 48 | #clock-cells = <1>; |
| 49 | #reset-cells = <1>; |
| 50 | }; |
| 51 | }; |
| 52 | ... |