Adrian Bunk | b00dc83 | 2008-05-19 16:52:27 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * etrap.S: Preparing for entry into the kernel on Sparc V9. |
| 3 | * |
| 4 | * Copyright (C) 1996, 1997 David S. Miller (davem@caip.rutgers.edu) |
| 5 | * Copyright (C) 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz) |
| 6 | */ |
| 7 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | |
| 9 | #include <asm/asi.h> |
| 10 | #include <asm/pstate.h> |
| 11 | #include <asm/ptrace.h> |
| 12 | #include <asm/page.h> |
| 13 | #include <asm/spitfire.h> |
| 14 | #include <asm/head.h> |
| 15 | #include <asm/processor.h> |
| 16 | #include <asm/mmu.h> |
| 17 | |
| 18 | #define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ) |
David S. Miller | 64f2dde | 2008-10-29 21:25:00 -0700 | [diff] [blame] | 19 | #define ETRAP_PSTATE1 (PSTATE_TSO | PSTATE_PRIV) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #define ETRAP_PSTATE2 \ |
David S. Miller | 64f2dde | 2008-10-29 21:25:00 -0700 | [diff] [blame] | 21 | (PSTATE_TSO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | /* |
| 24 | * On entry, %g7 is return address - 0x4. |
| 25 | * %g4 and %g5 will be preserved %l4 and %l5 respectively. |
| 26 | */ |
| 27 | |
| 28 | .text |
| 29 | .align 64 |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 30 | .globl etrap_syscall, etrap, etrap_irq, etraptl1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | etrap: rdpr %pil, %g2 |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 32 | etrap_irq: clr %g3 |
| 33 | etrap_syscall: TRAP_LOAD_THREAD_REG(%g6, %g1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | rdpr %tstate, %g1 |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 35 | or %g1, %g3, %g1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | sllx %g2, 20, %g3 |
| 37 | andcc %g1, TSTATE_PRIV, %g0 |
| 38 | or %g1, %g3, %g1 |
| 39 | bne,pn %xcc, 1f |
| 40 | sub %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2 |
| 41 | wrpr %g0, 7, %cleanwin |
| 42 | |
| 43 | sethi %hi(TASK_REGOFF), %g2 |
| 44 | sethi %hi(TSTATE_PEF), %g3 |
| 45 | or %g2, %lo(TASK_REGOFF), %g2 |
| 46 | and %g1, %g3, %g3 |
| 47 | brnz,pn %g3, 1f |
| 48 | add %g6, %g2, %g2 |
| 49 | wr %g0, 0, %fprs |
| 50 | 1: rdpr %tpc, %g3 |
| 51 | |
| 52 | stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE] |
| 53 | rdpr %tnpc, %g1 |
| 54 | stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC] |
| 55 | rd %y, %g3 |
| 56 | stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC] |
David S. Miller | 8243e40a | 2008-04-23 22:52:13 -0700 | [diff] [blame] | 57 | rdpr %tt, %g1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | st %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y] |
David S. Miller | 8243e40a | 2008-04-23 22:52:13 -0700 | [diff] [blame] | 59 | sethi %hi(PT_REGS_MAGIC), %g3 |
| 60 | or %g3, %g1, %g1 |
| 61 | st %g1, [%g2 + STACKFRAME_SZ + PT_V9_MAGIC] |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 62 | |
| 63 | rdpr %cansave, %g1 |
| 64 | brnz,pt %g1, etrap_save |
| 65 | nop |
| 66 | |
| 67 | rdpr %cwp, %g1 |
| 68 | add %g1, 2, %g1 |
| 69 | wrpr %g1, %cwp |
| 70 | be,pt %xcc, etrap_user_spill |
| 71 | mov ASI_AIUP, %g3 |
| 72 | |
| 73 | rdpr %otherwin, %g3 |
| 74 | brz %g3, etrap_kernel_spill |
| 75 | mov ASI_AIUS, %g3 |
| 76 | |
| 77 | etrap_user_spill: |
| 78 | |
| 79 | wr %g3, 0x0, %asi |
| 80 | ldx [%g6 + TI_FLAGS], %g3 |
| 81 | and %g3, _TIF_32BIT, %g3 |
| 82 | brnz,pt %g3, etrap_user_spill_32bit |
| 83 | nop |
| 84 | ba,a,pt %xcc, etrap_user_spill_64bit |
| 85 | |
| 86 | etrap_save: save %g2, -STACK_BIAS, %sp |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | mov %g6, %l6 |
| 88 | |
| 89 | bne,pn %xcc, 3f |
| 90 | mov PRIMARY_CONTEXT, %l4 |
| 91 | rdpr %canrestore, %g3 |
| 92 | rdpr %wstate, %g2 |
| 93 | wrpr %g0, 0, %canrestore |
| 94 | sll %g2, 3, %g2 |
Al Viro | dff933d | 2012-09-26 01:21:14 -0400 | [diff] [blame] | 95 | |
| 96 | /* Set TI_SYS_FPDEPTH to 1 and clear TI_SYS_NOERROR. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | mov 1, %l5 |
Al Viro | dff933d | 2012-09-26 01:21:14 -0400 | [diff] [blame] | 98 | sth %l5, [%l6 + TI_SYS_NOERROR] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
| 100 | wrpr %g3, 0, %otherwin |
| 101 | wrpr %g2, 0, %wstate |
David S. Miller | 0835ae0 | 2005-10-04 15:23:20 -0700 | [diff] [blame] | 102 | sethi %hi(sparc64_kern_pri_context), %g2 |
| 103 | ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3 |
David S. Miller | 8b11bd1 | 2006-02-07 22:13:05 -0800 | [diff] [blame] | 104 | |
| 105 | 661: stxa %g3, [%l4] ASI_DMMU |
| 106 | .section .sun4v_1insn_patch, "ax" |
| 107 | .word 661b |
| 108 | stxa %g3, [%l4] ASI_MMU |
| 109 | .previous |
| 110 | |
David S. Miller | 4da808c | 2006-01-31 18:33:00 -0800 | [diff] [blame] | 111 | sethi %hi(KERNBASE), %l4 |
| 112 | flush %l4 |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 113 | mov ASI_AIUS, %l7 |
| 114 | 2: mov %g4, %l4 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | mov %g5, %l5 |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 116 | add %g7, 4, %l2 |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 117 | |
| 118 | /* Go to trap time globals so we can save them. */ |
| 119 | 661: wrpr %g0, ETRAP_PSTATE1, %pstate |
David S. Miller | df7d6ae | 2006-02-07 00:00:16 -0800 | [diff] [blame] | 120 | .section .sun4v_1insn_patch, "ax" |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 121 | .word 661b |
| 122 | SET_GL(0) |
| 123 | .previous |
| 124 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | stx %g1, [%sp + PTREGS_OFF + PT_V9_G1] |
| 126 | stx %g2, [%sp + PTREGS_OFF + PT_V9_G2] |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 127 | sllx %l7, 24, %l7 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | stx %g3, [%sp + PTREGS_OFF + PT_V9_G3] |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 129 | rdpr %cwp, %l0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | stx %g4, [%sp + PTREGS_OFF + PT_V9_G4] |
| 131 | stx %g5, [%sp + PTREGS_OFF + PT_V9_G5] |
| 132 | stx %g6, [%sp + PTREGS_OFF + PT_V9_G6] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | stx %g7, [%sp + PTREGS_OFF + PT_V9_G7] |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 134 | or %l7, %l0, %l7 |
David S. Miller | 64f2dde | 2008-10-29 21:25:00 -0700 | [diff] [blame] | 135 | sethi %hi(TSTATE_TSO | TSTATE_PEF), %l0 |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 136 | or %l7, %l0, %l7 |
| 137 | wrpr %l2, %tnpc |
| 138 | wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | stx %i0, [%sp + PTREGS_OFF + PT_V9_I0] |
| 140 | stx %i1, [%sp + PTREGS_OFF + PT_V9_I1] |
| 141 | stx %i2, [%sp + PTREGS_OFF + PT_V9_I2] |
| 142 | stx %i3, [%sp + PTREGS_OFF + PT_V9_I3] |
| 143 | stx %i4, [%sp + PTREGS_OFF + PT_V9_I4] |
| 144 | stx %i5, [%sp + PTREGS_OFF + PT_V9_I5] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | stx %i6, [%sp + PTREGS_OFF + PT_V9_I6] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | mov %l6, %g6 |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 147 | stx %i7, [%sp + PTREGS_OFF + PT_V9_I7] |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 148 | LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %l1) |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 149 | ldx [%g6 + TI_TASK], %g4 |
| 150 | done |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
David S. Miller | 6e02493 | 2006-02-05 20:47:26 -0800 | [diff] [blame] | 152 | 3: mov ASI_P, %l7 |
| 153 | ldub [%l6 + TI_FPDEPTH], %l5 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | add %l6, TI_FPSAVED + 1, %l4 |
| 155 | srl %l5, 1, %l3 |
| 156 | add %l5, 2, %l5 |
Al Viro | dff933d | 2012-09-26 01:21:14 -0400 | [diff] [blame] | 157 | |
| 158 | /* Set TI_SYS_FPDEPTH to %l5 and clear TI_SYS_NOERROR. */ |
| 159 | sth %l5, [%l6 + TI_SYS_NOERROR] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | ba,pt %xcc, 2b |
| 161 | stb %g0, [%l4 + %l3] |
| 162 | nop |
| 163 | |
| 164 | etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself. |
| 165 | * We place this right after pt_regs on the trap stack. |
| 166 | * The layout is: |
| 167 | * 0x00 TL1's TSTATE |
| 168 | * 0x08 TL1's TPC |
| 169 | * 0x10 TL1's TNPC |
| 170 | * 0x18 TL1's TT |
| 171 | * ... |
| 172 | * 0x58 TL4's TT |
| 173 | * 0x60 TL |
| 174 | */ |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 175 | TRAP_LOAD_THREAD_REG(%g6, %g1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | sub %sp, ((4 * 8) * 4) + 8, %g2 |
| 177 | rdpr %tl, %g1 |
| 178 | |
| 179 | wrpr %g0, 1, %tl |
| 180 | rdpr %tstate, %g3 |
| 181 | stx %g3, [%g2 + STACK_BIAS + 0x00] |
| 182 | rdpr %tpc, %g3 |
| 183 | stx %g3, [%g2 + STACK_BIAS + 0x08] |
| 184 | rdpr %tnpc, %g3 |
| 185 | stx %g3, [%g2 + STACK_BIAS + 0x10] |
| 186 | rdpr %tt, %g3 |
| 187 | stx %g3, [%g2 + STACK_BIAS + 0x18] |
| 188 | |
| 189 | wrpr %g0, 2, %tl |
| 190 | rdpr %tstate, %g3 |
| 191 | stx %g3, [%g2 + STACK_BIAS + 0x20] |
| 192 | rdpr %tpc, %g3 |
| 193 | stx %g3, [%g2 + STACK_BIAS + 0x28] |
| 194 | rdpr %tnpc, %g3 |
| 195 | stx %g3, [%g2 + STACK_BIAS + 0x30] |
| 196 | rdpr %tt, %g3 |
| 197 | stx %g3, [%g2 + STACK_BIAS + 0x38] |
| 198 | |
David S. Miller | 3d6395c | 2006-02-16 01:41:41 -0800 | [diff] [blame] | 199 | sethi %hi(is_sun4v), %g3 |
| 200 | lduw [%g3 + %lo(is_sun4v)], %g3 |
| 201 | brnz,pn %g3, finish_tl1_capture |
| 202 | nop |
| 203 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | wrpr %g0, 3, %tl |
| 205 | rdpr %tstate, %g3 |
| 206 | stx %g3, [%g2 + STACK_BIAS + 0x40] |
| 207 | rdpr %tpc, %g3 |
| 208 | stx %g3, [%g2 + STACK_BIAS + 0x48] |
| 209 | rdpr %tnpc, %g3 |
| 210 | stx %g3, [%g2 + STACK_BIAS + 0x50] |
| 211 | rdpr %tt, %g3 |
| 212 | stx %g3, [%g2 + STACK_BIAS + 0x58] |
| 213 | |
| 214 | wrpr %g0, 4, %tl |
| 215 | rdpr %tstate, %g3 |
| 216 | stx %g3, [%g2 + STACK_BIAS + 0x60] |
| 217 | rdpr %tpc, %g3 |
| 218 | stx %g3, [%g2 + STACK_BIAS + 0x68] |
| 219 | rdpr %tnpc, %g3 |
| 220 | stx %g3, [%g2 + STACK_BIAS + 0x70] |
| 221 | rdpr %tt, %g3 |
| 222 | stx %g3, [%g2 + STACK_BIAS + 0x78] |
| 223 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | stx %g1, [%g2 + STACK_BIAS + 0x80] |
| 225 | |
David S. Miller | 3d6395c | 2006-02-16 01:41:41 -0800 | [diff] [blame] | 226 | finish_tl1_capture: |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 227 | wrpr %g0, 1, %tl |
| 228 | 661: nop |
David S. Miller | df7d6ae | 2006-02-07 00:00:16 -0800 | [diff] [blame] | 229 | .section .sun4v_1insn_patch, "ax" |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 230 | .word 661b |
| 231 | SET_GL(1) |
| 232 | .previous |
| 233 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | rdpr %tstate, %g1 |
| 235 | sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2 |
| 236 | ba,pt %xcc, 1b |
| 237 | andcc %g1, TSTATE_PRIV, %g0 |
| 238 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | #undef TASK_REGOFF |
| 240 | #undef ETRAP_PSTATE1 |