Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 2 | /* linux/drivers/mmc/host/sdhci-s3c.c |
| 3 | * |
| 4 | * Copyright 2008 Openmoko Inc. |
| 5 | * Copyright 2008 Simtec Electronics |
| 6 | * Ben Dooks <ben@simtec.co.uk> |
| 7 | * http://armlinux.simtec.co.uk/ |
| 8 | * |
| 9 | * SDHCI (HSMMC) support for Samsung SoC |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 10 | */ |
| 11 | |
Paul Osmialowski | 017210d | 2015-02-04 10:16:59 +0100 | [diff] [blame] | 12 | #include <linux/spinlock.h> |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 13 | #include <linux/delay.h> |
| 14 | #include <linux/dma-mapping.h> |
| 15 | #include <linux/platform_device.h> |
Arnd Bergmann | cc014f3 | 2013-03-04 18:28:21 +0100 | [diff] [blame] | 16 | #include <linux/platform_data/mmc-sdhci-s3c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 17 | #include <linux/slab.h> |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 18 | #include <linux/clk.h> |
| 19 | #include <linux/io.h> |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 20 | #include <linux/gpio.h> |
Mark Brown | 55156d2 | 2011-07-29 15:35:00 +0100 | [diff] [blame] | 21 | #include <linux/module.h> |
Mark Brown | d5e9c02 | 2012-03-03 00:46:41 +0000 | [diff] [blame] | 22 | #include <linux/of.h> |
| 23 | #include <linux/of_gpio.h> |
| 24 | #include <linux/pm.h> |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 25 | #include <linux/pm_runtime.h> |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 26 | |
| 27 | #include <linux/mmc/host.h> |
| 28 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 29 | #include "sdhci.h" |
| 30 | |
| 31 | #define MAX_BUS_CLK (4) |
| 32 | |
Jaehoon Chung | 57f8324 | 2017-01-24 18:27:27 +0900 | [diff] [blame] | 33 | #define S3C_SDHCI_CONTROL2 (0x80) |
| 34 | #define S3C_SDHCI_CONTROL3 (0x84) |
| 35 | #define S3C64XX_SDHCI_CONTROL4 (0x8C) |
| 36 | |
Jaehoon Chung | e64aae8 | 2017-01-24 18:27:28 +0900 | [diff] [blame] | 37 | #define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR BIT(31) |
| 38 | #define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK BIT(30) |
| 39 | #define S3C_SDHCI_CTRL2_CDINVRXD3 BIT(29) |
| 40 | #define S3C_SDHCI_CTRL2_SLCARDOUT BIT(28) |
Jaehoon Chung | 57f8324 | 2017-01-24 18:27:27 +0900 | [diff] [blame] | 41 | |
| 42 | #define S3C_SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24) |
| 43 | #define S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT (24) |
| 44 | #define S3C_SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) |
| 45 | |
| 46 | #define S3C_SDHCI_CTRL2_LVLDAT_MASK (0xff << 16) |
| 47 | #define S3C_SDHCI_CTRL2_LVLDAT_SHIFT (16) |
| 48 | #define S3C_SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) |
| 49 | |
Jaehoon Chung | e64aae8 | 2017-01-24 18:27:28 +0900 | [diff] [blame] | 50 | #define S3C_SDHCI_CTRL2_ENFBCLKTX BIT(15) |
| 51 | #define S3C_SDHCI_CTRL2_ENFBCLKRX BIT(14) |
| 52 | #define S3C_SDHCI_CTRL2_SDCDSEL BIT(13) |
| 53 | #define S3C_SDHCI_CTRL2_SDSIGPC BIT(12) |
| 54 | #define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART BIT(11) |
Jaehoon Chung | 57f8324 | 2017-01-24 18:27:27 +0900 | [diff] [blame] | 55 | |
| 56 | #define S3C_SDHCI_CTRL2_DFCNT_MASK (0x3 << 9) |
| 57 | #define S3C_SDHCI_CTRL2_DFCNT_SHIFT (9) |
| 58 | #define S3C_SDHCI_CTRL2_DFCNT_NONE (0x0 << 9) |
| 59 | #define S3C_SDHCI_CTRL2_DFCNT_4SDCLK (0x1 << 9) |
| 60 | #define S3C_SDHCI_CTRL2_DFCNT_16SDCLK (0x2 << 9) |
| 61 | #define S3C_SDHCI_CTRL2_DFCNT_64SDCLK (0x3 << 9) |
| 62 | |
Jaehoon Chung | e64aae8 | 2017-01-24 18:27:28 +0900 | [diff] [blame] | 63 | #define S3C_SDHCI_CTRL2_ENCLKOUTHOLD BIT(8) |
| 64 | #define S3C_SDHCI_CTRL2_RWAITMODE BIT(7) |
| 65 | #define S3C_SDHCI_CTRL2_DISBUFRD BIT(6) |
| 66 | |
Jaehoon Chung | 57f8324 | 2017-01-24 18:27:27 +0900 | [diff] [blame] | 67 | #define S3C_SDHCI_CTRL2_SELBASECLK_MASK (0x3 << 4) |
| 68 | #define S3C_SDHCI_CTRL2_SELBASECLK_SHIFT (4) |
Jaehoon Chung | e64aae8 | 2017-01-24 18:27:28 +0900 | [diff] [blame] | 69 | #define S3C_SDHCI_CTRL2_PWRSYNC BIT(3) |
| 70 | #define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON BIT(1) |
| 71 | #define S3C_SDHCI_CTRL2_HWINITFIN BIT(0) |
Jaehoon Chung | 57f8324 | 2017-01-24 18:27:27 +0900 | [diff] [blame] | 72 | |
Jaehoon Chung | e64aae8 | 2017-01-24 18:27:28 +0900 | [diff] [blame] | 73 | #define S3C_SDHCI_CTRL3_FCSEL3 BIT(31) |
| 74 | #define S3C_SDHCI_CTRL3_FCSEL2 BIT(23) |
| 75 | #define S3C_SDHCI_CTRL3_FCSEL1 BIT(15) |
| 76 | #define S3C_SDHCI_CTRL3_FCSEL0 BIT(7) |
Jaehoon Chung | 57f8324 | 2017-01-24 18:27:27 +0900 | [diff] [blame] | 77 | |
| 78 | #define S3C_SDHCI_CTRL3_FIA3_MASK (0x7f << 24) |
| 79 | #define S3C_SDHCI_CTRL3_FIA3_SHIFT (24) |
| 80 | #define S3C_SDHCI_CTRL3_FIA3(_x) ((_x) << 24) |
| 81 | |
| 82 | #define S3C_SDHCI_CTRL3_FIA2_MASK (0x7f << 16) |
| 83 | #define S3C_SDHCI_CTRL3_FIA2_SHIFT (16) |
| 84 | #define S3C_SDHCI_CTRL3_FIA2(_x) ((_x) << 16) |
| 85 | |
| 86 | #define S3C_SDHCI_CTRL3_FIA1_MASK (0x7f << 8) |
| 87 | #define S3C_SDHCI_CTRL3_FIA1_SHIFT (8) |
| 88 | #define S3C_SDHCI_CTRL3_FIA1(_x) ((_x) << 8) |
| 89 | |
| 90 | #define S3C_SDHCI_CTRL3_FIA0_MASK (0x7f << 0) |
| 91 | #define S3C_SDHCI_CTRL3_FIA0_SHIFT (0) |
| 92 | #define S3C_SDHCI_CTRL3_FIA0(_x) ((_x) << 0) |
| 93 | |
| 94 | #define S3C64XX_SDHCI_CONTROL4_DRIVE_MASK (0x3 << 16) |
| 95 | #define S3C64XX_SDHCI_CONTROL4_DRIVE_SHIFT (16) |
| 96 | #define S3C64XX_SDHCI_CONTROL4_DRIVE_2mA (0x0 << 16) |
| 97 | #define S3C64XX_SDHCI_CONTROL4_DRIVE_4mA (0x1 << 16) |
| 98 | #define S3C64XX_SDHCI_CONTROL4_DRIVE_7mA (0x2 << 16) |
| 99 | #define S3C64XX_SDHCI_CONTROL4_DRIVE_9mA (0x3 << 16) |
| 100 | |
| 101 | #define S3C64XX_SDHCI_CONTROL4_BUSY (1) |
| 102 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 103 | /** |
| 104 | * struct sdhci_s3c - S3C SDHCI instance |
| 105 | * @host: The SDHCI host created |
| 106 | * @pdev: The platform device we where created from. |
| 107 | * @ioarea: The resource created when we claimed the IO area. |
| 108 | * @pdata: The platform data for this controller. |
| 109 | * @cur_clk: The index of the current bus clock. |
| 110 | * @clk_io: The clock for the internal bus interface. |
| 111 | * @clk_bus: The clocks that are available for the SD/MMC bus clock. |
| 112 | */ |
| 113 | struct sdhci_s3c { |
| 114 | struct sdhci_host *host; |
| 115 | struct platform_device *pdev; |
| 116 | struct resource *ioarea; |
| 117 | struct s3c_sdhci_platdata *pdata; |
Tomasz Figa | 3ac147f | 2014-01-11 22:39:05 +0100 | [diff] [blame] | 118 | int cur_clk; |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 119 | int ext_cd_irq; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 120 | |
| 121 | struct clk *clk_io; |
| 122 | struct clk *clk_bus[MAX_BUS_CLK]; |
Tomasz Figa | 6eb28bd | 2014-01-11 22:39:02 +0100 | [diff] [blame] | 123 | unsigned long clk_rates[MAX_BUS_CLK]; |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 124 | |
| 125 | bool no_divider; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 126 | }; |
| 127 | |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 128 | /** |
| 129 | * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data |
| 130 | * @sdhci_quirks: sdhci host specific quirks. |
| 131 | * |
| 132 | * Specifies platform specific configuration of sdhci controller. |
| 133 | * Note: A structure for driver specific platform data is used for future |
| 134 | * expansion of its usage. |
| 135 | */ |
| 136 | struct sdhci_s3c_drv_data { |
| 137 | unsigned int sdhci_quirks; |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 138 | bool no_divider; |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 139 | }; |
| 140 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 141 | static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host) |
| 142 | { |
| 143 | return sdhci_priv(host); |
| 144 | } |
| 145 | |
| 146 | /** |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 147 | * sdhci_s3c_get_max_clk - callback to get maximum clock frequency. |
| 148 | * @host: The SDHCI host instance. |
| 149 | * |
| 150 | * Callback to return the maximum clock rate acheivable by the controller. |
| 151 | */ |
| 152 | static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host) |
| 153 | { |
| 154 | struct sdhci_s3c *ourhost = to_s3c(host); |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 155 | unsigned long rate, max = 0; |
| 156 | int src; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 157 | |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 158 | for (src = 0; src < MAX_BUS_CLK; src++) { |
| 159 | rate = ourhost->clk_rates[src]; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 160 | if (rate > max) |
| 161 | max = rate; |
| 162 | } |
| 163 | |
| 164 | return max; |
| 165 | } |
| 166 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 167 | /** |
| 168 | * sdhci_s3c_consider_clock - consider one the bus clocks for current setting |
| 169 | * @ourhost: Our SDHCI instance. |
| 170 | * @src: The source clock index. |
| 171 | * @wanted: The clock frequency wanted. |
| 172 | */ |
| 173 | static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost, |
| 174 | unsigned int src, |
| 175 | unsigned int wanted) |
| 176 | { |
| 177 | unsigned long rate; |
| 178 | struct clk *clksrc = ourhost->clk_bus[src]; |
Tomasz Figa | 8880a4a | 2014-01-11 22:39:01 +0100 | [diff] [blame] | 179 | int shift; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 180 | |
Tomasz Figa | 8f4b78d | 2014-01-11 22:39:03 +0100 | [diff] [blame] | 181 | if (IS_ERR(clksrc)) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 182 | return UINT_MAX; |
| 183 | |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 184 | /* |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 185 | * If controller uses a non-standard clock division, find the best clock |
| 186 | * speed possible with selected clock source and skip the division. |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 187 | */ |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 188 | if (ourhost->no_divider) { |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 189 | rate = clk_round_rate(clksrc, wanted); |
| 190 | return wanted - rate; |
| 191 | } |
| 192 | |
Tomasz Figa | 6eb28bd | 2014-01-11 22:39:02 +0100 | [diff] [blame] | 193 | rate = ourhost->clk_rates[src]; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 194 | |
Tomasz Figa | 2200300 | 2014-01-11 22:39:06 +0100 | [diff] [blame] | 195 | for (shift = 0; shift <= 8; ++shift) { |
Tomasz Figa | 8880a4a | 2014-01-11 22:39:01 +0100 | [diff] [blame] | 196 | if ((rate >> shift) <= wanted) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 197 | break; |
| 198 | } |
| 199 | |
Tomasz Figa | 2200300 | 2014-01-11 22:39:06 +0100 | [diff] [blame] | 200 | if (shift > 8) { |
| 201 | dev_dbg(&ourhost->pdev->dev, |
| 202 | "clk %d: rate %ld, min rate %lu > wanted %u\n", |
| 203 | src, rate, rate / 256, wanted); |
| 204 | return UINT_MAX; |
| 205 | } |
| 206 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 207 | dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n", |
Tomasz Figa | 8880a4a | 2014-01-11 22:39:01 +0100 | [diff] [blame] | 208 | src, rate, wanted, rate >> shift); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 209 | |
Tomasz Figa | 8880a4a | 2014-01-11 22:39:01 +0100 | [diff] [blame] | 210 | return wanted - (rate >> shift); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | /** |
| 214 | * sdhci_s3c_set_clock - callback on clock change |
| 215 | * @host: The SDHCI host being changed |
| 216 | * @clock: The clock rate being requested. |
| 217 | * |
| 218 | * When the card's clock is going to be changed, look at the new frequency |
| 219 | * and find the best clock source to go with it. |
| 220 | */ |
| 221 | static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) |
| 222 | { |
| 223 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 224 | unsigned int best = UINT_MAX; |
| 225 | unsigned int delta; |
| 226 | int best_src = 0; |
| 227 | int src; |
| 228 | u32 ctrl; |
| 229 | |
Russell King | 1650d0c | 2014-04-25 12:58:50 +0100 | [diff] [blame] | 230 | host->mmc->actual_clock = 0; |
| 231 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 232 | /* don't bother if the clock is going off. */ |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 233 | if (clock == 0) { |
| 234 | sdhci_set_clock(host, clock); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 235 | return; |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 236 | } |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 237 | |
| 238 | for (src = 0; src < MAX_BUS_CLK; src++) { |
| 239 | delta = sdhci_s3c_consider_clock(ourhost, src, clock); |
| 240 | if (delta < best) { |
| 241 | best = delta; |
| 242 | best_src = src; |
| 243 | } |
| 244 | } |
| 245 | |
| 246 | dev_dbg(&ourhost->pdev->dev, |
| 247 | "selected source %d, clock %d, delta %d\n", |
| 248 | best_src, clock, best); |
| 249 | |
| 250 | /* select the new clock source */ |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 251 | if (ourhost->cur_clk != best_src) { |
| 252 | struct clk *clk = ourhost->clk_bus[best_src]; |
| 253 | |
Thomas Abraham | 0f310a05 | 2012-10-03 08:35:43 +0900 | [diff] [blame] | 254 | clk_prepare_enable(clk); |
Tomasz Figa | 3ac147f | 2014-01-11 22:39:05 +0100 | [diff] [blame] | 255 | if (ourhost->cur_clk >= 0) |
| 256 | clk_disable_unprepare( |
| 257 | ourhost->clk_bus[ourhost->cur_clk]); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 258 | |
| 259 | ourhost->cur_clk = best_src; |
Tomasz Figa | 6eb28bd | 2014-01-11 22:39:02 +0100 | [diff] [blame] | 260 | host->max_clk = ourhost->clk_rates[best_src]; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 261 | } |
| 262 | |
Tomasz Figa | 3ac147f | 2014-01-11 22:39:05 +0100 | [diff] [blame] | 263 | /* turn clock off to card before changing clock source */ |
| 264 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 265 | |
| 266 | ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); |
| 267 | ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; |
| 268 | ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; |
| 269 | writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); |
| 270 | |
Thomas Abraham | 6fe4717 | 2011-09-14 12:39:17 +0530 | [diff] [blame] | 271 | /* reprogram default hardware configuration */ |
| 272 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, |
| 273 | host->ioaddr + S3C64XX_SDHCI_CONTROL4); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 274 | |
Thomas Abraham | 6fe4717 | 2011-09-14 12:39:17 +0530 | [diff] [blame] | 275 | ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); |
| 276 | ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | |
| 277 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | |
| 278 | S3C_SDHCI_CTRL2_ENFBCLKRX | |
| 279 | S3C_SDHCI_CTRL2_DFCNT_NONE | |
| 280 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); |
| 281 | writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 282 | |
Thomas Abraham | 6fe4717 | 2011-09-14 12:39:17 +0530 | [diff] [blame] | 283 | /* reconfigure the controller for new clock rate */ |
| 284 | ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); |
| 285 | if (clock < 25 * 1000000) |
| 286 | ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2); |
| 287 | writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3); |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 288 | |
| 289 | sdhci_set_clock(host, clock); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 290 | } |
| 291 | |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 292 | /** |
| 293 | * sdhci_s3c_get_min_clock - callback to get minimal supported clock value |
| 294 | * @host: The SDHCI host being queried |
| 295 | * |
| 296 | * To init mmc host properly a minimal clock value is needed. For high system |
| 297 | * bus clock's values the standard formula gives values out of allowed range. |
| 298 | * The clock still can be set to lower values, if clock source other then |
| 299 | * system bus is selected. |
| 300 | */ |
| 301 | static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host) |
| 302 | { |
| 303 | struct sdhci_s3c *ourhost = to_s3c(host); |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 304 | unsigned long rate, min = ULONG_MAX; |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 305 | int src; |
| 306 | |
| 307 | for (src = 0; src < MAX_BUS_CLK; src++) { |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 308 | rate = ourhost->clk_rates[src] / 256; |
| 309 | if (!rate) |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 310 | continue; |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 311 | if (rate < min) |
| 312 | min = rate; |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 313 | } |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 314 | |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 315 | return min; |
| 316 | } |
| 317 | |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 318 | /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/ |
| 319 | static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host) |
| 320 | { |
| 321 | struct sdhci_s3c *ourhost = to_s3c(host); |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 322 | unsigned long rate, max = 0; |
| 323 | int src; |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 324 | |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 325 | for (src = 0; src < MAX_BUS_CLK; src++) { |
| 326 | struct clk *clk; |
| 327 | |
| 328 | clk = ourhost->clk_bus[src]; |
| 329 | if (IS_ERR(clk)) |
| 330 | continue; |
| 331 | |
| 332 | rate = clk_round_rate(clk, ULONG_MAX); |
| 333 | if (rate > max) |
| 334 | max = rate; |
| 335 | } |
| 336 | |
| 337 | return max; |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 338 | } |
| 339 | |
| 340 | /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */ |
| 341 | static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host) |
| 342 | { |
| 343 | struct sdhci_s3c *ourhost = to_s3c(host); |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 344 | unsigned long rate, min = ULONG_MAX; |
| 345 | int src; |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 346 | |
Tomasz Figa | 222a13c | 2014-01-11 22:39:04 +0100 | [diff] [blame] | 347 | for (src = 0; src < MAX_BUS_CLK; src++) { |
| 348 | struct clk *clk; |
| 349 | |
| 350 | clk = ourhost->clk_bus[src]; |
| 351 | if (IS_ERR(clk)) |
| 352 | continue; |
| 353 | |
| 354 | rate = clk_round_rate(clk, 0); |
| 355 | if (rate < min) |
| 356 | min = rate; |
| 357 | } |
| 358 | |
| 359 | return min; |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 360 | } |
| 361 | |
| 362 | /* sdhci_cmu_set_clock - callback on clock change.*/ |
| 363 | static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock) |
| 364 | { |
| 365 | struct sdhci_s3c *ourhost = to_s3c(host); |
Jingoo Han | 2ad0b24 | 2012-08-29 14:35:06 +0900 | [diff] [blame] | 366 | struct device *dev = &ourhost->pdev->dev; |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 367 | unsigned long timeout; |
| 368 | u16 clk = 0; |
Mark Brown | cd0cfdd | 2014-11-04 12:26:42 +0000 | [diff] [blame] | 369 | int ret; |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 370 | |
Russell King | 1650d0c | 2014-04-25 12:58:50 +0100 | [diff] [blame] | 371 | host->mmc->actual_clock = 0; |
| 372 | |
Jaehoon Chung | 7ef2a5e | 2013-08-02 23:08:58 +0900 | [diff] [blame] | 373 | /* If the clock is going off, set to 0 at clock control register */ |
| 374 | if (clock == 0) { |
| 375 | sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 376 | return; |
Jaehoon Chung | 7ef2a5e | 2013-08-02 23:08:58 +0900 | [diff] [blame] | 377 | } |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 378 | |
| 379 | sdhci_s3c_set_clock(host, clock); |
| 380 | |
Paul Osmialowski | 017210d | 2015-02-04 10:16:59 +0100 | [diff] [blame] | 381 | /* Reset SD Clock Enable */ |
| 382 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); |
| 383 | clk &= ~SDHCI_CLOCK_CARD_EN; |
| 384 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 385 | |
Mark Brown | cd0cfdd | 2014-11-04 12:26:42 +0000 | [diff] [blame] | 386 | ret = clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); |
| 387 | if (ret != 0) { |
| 388 | dev_err(dev, "%s: failed to set clock rate %uHz\n", |
| 389 | mmc_hostname(host->mmc), clock); |
| 390 | return; |
| 391 | } |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 392 | |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 393 | clk = SDHCI_CLOCK_INT_EN; |
| 394 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 395 | |
| 396 | /* Wait max 20 ms */ |
| 397 | timeout = 20; |
| 398 | while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) |
| 399 | & SDHCI_CLOCK_INT_STABLE)) { |
| 400 | if (timeout == 0) { |
Jingoo Han | 2ad0b24 | 2012-08-29 14:35:06 +0900 | [diff] [blame] | 401 | dev_err(dev, "%s: Internal clock never stabilised.\n", |
| 402 | mmc_hostname(host->mmc)); |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 403 | return; |
| 404 | } |
| 405 | timeout--; |
| 406 | mdelay(1); |
| 407 | } |
| 408 | |
| 409 | clk |= SDHCI_CLOCK_CARD_EN; |
| 410 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 411 | } |
| 412 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 413 | static struct sdhci_ops sdhci_s3c_ops = { |
| 414 | .get_max_clock = sdhci_s3c_get_max_clk, |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 415 | .set_clock = sdhci_s3c_set_clock, |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 416 | .get_min_clock = sdhci_s3c_get_min_clock, |
Michał Mirosław | 5b7f5ea | 2017-08-14 22:00:26 +0200 | [diff] [blame] | 417 | .set_bus_width = sdhci_set_bus_width, |
Russell King | 03231f9 | 2014-04-25 12:57:12 +0100 | [diff] [blame] | 418 | .reset = sdhci_reset, |
Russell King | 96d7b78 | 2014-04-25 12:59:26 +0100 | [diff] [blame] | 419 | .set_uhs_signaling = sdhci_set_uhs_signaling, |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 420 | }; |
| 421 | |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 422 | #ifdef CONFIG_OF |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 423 | static int sdhci_s3c_parse_dt(struct device *dev, |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 424 | struct sdhci_host *host, struct s3c_sdhci_platdata *pdata) |
| 425 | { |
| 426 | struct device_node *node = dev->of_node; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 427 | u32 max_width; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 428 | |
| 429 | /* if the bus-width property is not specified, assume width as 1 */ |
| 430 | if (of_property_read_u32(node, "bus-width", &max_width)) |
| 431 | max_width = 1; |
| 432 | pdata->max_width = max_width; |
| 433 | |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 434 | /* get the card detection method */ |
Tushar Behera | ab5023e | 2012-11-20 09:41:53 +0530 | [diff] [blame] | 435 | if (of_get_property(node, "broken-cd", NULL)) { |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 436 | pdata->cd_type = S3C_SDHCI_CD_NONE; |
Thomas Abraham | e19499a | 2013-03-06 17:06:16 +0530 | [diff] [blame] | 437 | return 0; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 438 | } |
| 439 | |
Tushar Behera | ab5023e | 2012-11-20 09:41:53 +0530 | [diff] [blame] | 440 | if (of_get_property(node, "non-removable", NULL)) { |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 441 | pdata->cd_type = S3C_SDHCI_CD_PERMANENT; |
Thomas Abraham | e19499a | 2013-03-06 17:06:16 +0530 | [diff] [blame] | 442 | return 0; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 443 | } |
| 444 | |
Jaehoon Chung | 11bc938 | 2014-05-26 13:58:28 +0900 | [diff] [blame] | 445 | if (of_get_named_gpio(node, "cd-gpios", 0)) |
Thomas Abraham | e19499a | 2013-03-06 17:06:16 +0530 | [diff] [blame] | 446 | return 0; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 447 | |
Tomasz Figa | b96efcc | 2012-11-16 15:28:17 +0100 | [diff] [blame] | 448 | /* assuming internal card detect that will be configured by pinctrl */ |
| 449 | pdata->cd_type = S3C_SDHCI_CD_INTERNAL; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 450 | return 0; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 451 | } |
| 452 | #else |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 453 | static int sdhci_s3c_parse_dt(struct device *dev, |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 454 | struct sdhci_host *host, struct s3c_sdhci_platdata *pdata) |
| 455 | { |
| 456 | return -EINVAL; |
| 457 | } |
| 458 | #endif |
| 459 | |
| 460 | static const struct of_device_id sdhci_s3c_dt_match[]; |
| 461 | |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 462 | static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data( |
| 463 | struct platform_device *pdev) |
| 464 | { |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 465 | #ifdef CONFIG_OF |
| 466 | if (pdev->dev.of_node) { |
| 467 | const struct of_device_id *match; |
| 468 | match = of_match_node(sdhci_s3c_dt_match, pdev->dev.of_node); |
| 469 | return (struct sdhci_s3c_drv_data *)match->data; |
| 470 | } |
| 471 | #endif |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 472 | return (struct sdhci_s3c_drv_data *) |
| 473 | platform_get_device_id(pdev)->driver_data; |
| 474 | } |
| 475 | |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 476 | static int sdhci_s3c_probe(struct platform_device *pdev) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 477 | { |
Thomas Abraham | 1d4dc33 | 2012-02-16 22:23:59 +0900 | [diff] [blame] | 478 | struct s3c_sdhci_platdata *pdata; |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 479 | struct sdhci_s3c_drv_data *drv_data; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 480 | struct device *dev = &pdev->dev; |
| 481 | struct sdhci_host *host; |
| 482 | struct sdhci_s3c *sc; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 483 | int ret, irq, ptr, clks; |
| 484 | |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 485 | if (!pdev->dev.platform_data && !pdev->dev.of_node) { |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 486 | dev_err(dev, "no device data specified\n"); |
| 487 | return -ENOENT; |
| 488 | } |
| 489 | |
| 490 | irq = platform_get_irq(pdev, 0); |
Stephen Boyd | 9a7957d | 2019-07-30 11:15:29 -0700 | [diff] [blame] | 491 | if (irq < 0) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 492 | return irq; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 493 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 494 | host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); |
| 495 | if (IS_ERR(host)) { |
| 496 | dev_err(dev, "sdhci_alloc_host() failed\n"); |
| 497 | return PTR_ERR(host); |
| 498 | } |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 499 | sc = sdhci_priv(host); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 500 | |
Thomas Abraham | 1d4dc33 | 2012-02-16 22:23:59 +0900 | [diff] [blame] | 501 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
| 502 | if (!pdata) { |
| 503 | ret = -ENOMEM; |
Tomasz Figa | b1b8fea | 2012-11-25 15:40:44 -0500 | [diff] [blame] | 504 | goto err_pdata_io_clk; |
Thomas Abraham | 1d4dc33 | 2012-02-16 22:23:59 +0900 | [diff] [blame] | 505 | } |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 506 | |
| 507 | if (pdev->dev.of_node) { |
| 508 | ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata); |
| 509 | if (ret) |
Tomasz Figa | b1b8fea | 2012-11-25 15:40:44 -0500 | [diff] [blame] | 510 | goto err_pdata_io_clk; |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 511 | } else { |
| 512 | memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata)); |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 513 | } |
Thomas Abraham | 1d4dc33 | 2012-02-16 22:23:59 +0900 | [diff] [blame] | 514 | |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 515 | drv_data = sdhci_s3c_get_driver_data(pdev); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 516 | |
| 517 | sc->host = host; |
| 518 | sc->pdev = pdev; |
| 519 | sc->pdata = pdata; |
Tomasz Figa | 3ac147f | 2014-01-11 22:39:05 +0100 | [diff] [blame] | 520 | sc->cur_clk = -1; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 521 | |
| 522 | platform_set_drvdata(pdev, host); |
| 523 | |
Jingoo Han | 3aaf7ba | 2013-02-12 12:24:39 +0900 | [diff] [blame] | 524 | sc->clk_io = devm_clk_get(dev, "hsmmc"); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 525 | if (IS_ERR(sc->clk_io)) { |
| 526 | dev_err(dev, "failed to get io clock\n"); |
| 527 | ret = PTR_ERR(sc->clk_io); |
Tomasz Figa | b1b8fea | 2012-11-25 15:40:44 -0500 | [diff] [blame] | 528 | goto err_pdata_io_clk; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 529 | } |
| 530 | |
| 531 | /* enable the local io clock and keep it running for the moment. */ |
Thomas Abraham | 0f310a05 | 2012-10-03 08:35:43 +0900 | [diff] [blame] | 532 | clk_prepare_enable(sc->clk_io); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 533 | |
| 534 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
Rajeshwari Shinde | 4346b6d | 2011-11-03 10:52:58 +0900 | [diff] [blame] | 535 | char name[14]; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 536 | |
Rajeshwari Shinde | 4346b6d | 2011-11-03 10:52:58 +0900 | [diff] [blame] | 537 | snprintf(name, 14, "mmc_busclk.%d", ptr); |
Tomasz Figa | 8f4b78d | 2014-01-11 22:39:03 +0100 | [diff] [blame] | 538 | sc->clk_bus[ptr] = devm_clk_get(dev, name); |
| 539 | if (IS_ERR(sc->clk_bus[ptr])) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 540 | continue; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 541 | |
| 542 | clks++; |
Tomasz Figa | 6eb28bd | 2014-01-11 22:39:02 +0100 | [diff] [blame] | 543 | sc->clk_rates[ptr] = clk_get_rate(sc->clk_bus[ptr]); |
| 544 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 545 | dev_info(dev, "clock source %d: %s (%ld Hz)\n", |
Tomasz Figa | 6eb28bd | 2014-01-11 22:39:02 +0100 | [diff] [blame] | 546 | ptr, name, sc->clk_rates[ptr]); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 547 | } |
| 548 | |
| 549 | if (clks == 0) { |
| 550 | dev_err(dev, "failed to find any bus clocks\n"); |
| 551 | ret = -ENOENT; |
| 552 | goto err_no_busclks; |
| 553 | } |
| 554 | |
Yangtao Li | 09938ce | 2019-12-15 17:51:11 +0000 | [diff] [blame] | 555 | host->ioaddr = devm_platform_ioremap_resource(pdev, 0); |
Thierry Reding | a3e2cd7 | 2013-01-21 11:09:11 +0100 | [diff] [blame] | 556 | if (IS_ERR(host->ioaddr)) { |
| 557 | ret = PTR_ERR(host->ioaddr); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 558 | goto err_req_regs; |
| 559 | } |
| 560 | |
| 561 | /* Ensure we have minimal gpio selected CMD/CLK/Detect */ |
| 562 | if (pdata->cfg_gpio) |
| 563 | pdata->cfg_gpio(pdev, pdata->max_width); |
| 564 | |
| 565 | host->hw_name = "samsung-hsmmc"; |
| 566 | host->ops = &sdhci_s3c_ops; |
| 567 | host->quirks = 0; |
Jaehoon Chung | 285e244 | 2013-08-02 23:09:00 +0900 | [diff] [blame] | 568 | host->quirks2 = 0; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 569 | host->irq = irq; |
| 570 | |
| 571 | /* Setup quirks for the controller */ |
Thomas Abraham | b2e75ef | 2010-05-26 14:42:05 -0700 | [diff] [blame] | 572 | host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; |
Marek Szyprowski | a1d5646 | 2010-08-10 18:01:57 -0700 | [diff] [blame] | 573 | host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 574 | if (drv_data) { |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 575 | host->quirks |= drv_data->sdhci_quirks; |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 576 | sc->no_divider = drv_data->no_divider; |
| 577 | } |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 578 | |
| 579 | #ifndef CONFIG_MMC_SDHCI_S3C_DMA |
| 580 | |
| 581 | /* we currently see overruns on errors, so disable the SDMA |
| 582 | * support as well. */ |
| 583 | host->quirks |= SDHCI_QUIRK_BROKEN_DMA; |
| 584 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 585 | #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ |
| 586 | |
| 587 | /* It seems we do not get an DATA transfer complete on non-busy |
| 588 | * transfers, not sure if this is a problem with this specific |
| 589 | * SDHCI block, or a missing configuration that needs to be set. */ |
| 590 | host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; |
| 591 | |
Kyungmin Park | 732f0e3 | 2010-10-30 12:58:56 +0900 | [diff] [blame] | 592 | /* This host supports the Auto CMD12 */ |
| 593 | host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; |
| 594 | |
Jaehoon Chung | 7199e2b | 2011-07-12 17:30:47 +0900 | [diff] [blame] | 595 | /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */ |
| 596 | host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC; |
| 597 | |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 598 | if (pdata->cd_type == S3C_SDHCI_CD_NONE || |
| 599 | pdata->cd_type == S3C_SDHCI_CD_PERMANENT) |
| 600 | host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; |
| 601 | |
| 602 | if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) |
| 603 | host->mmc->caps = MMC_CAP_NONREMOVABLE; |
| 604 | |
Thomas Abraham | 0d22c77 | 2012-03-31 23:29:45 -0400 | [diff] [blame] | 605 | switch (pdata->max_width) { |
| 606 | case 8: |
| 607 | host->mmc->caps |= MMC_CAP_8_BIT_DATA; |
Gustavo A. R. Silva | b1507b2 | 2019-07-28 19:02:59 -0500 | [diff] [blame] | 608 | /* Fall through */ |
Thomas Abraham | 0d22c77 | 2012-03-31 23:29:45 -0400 | [diff] [blame] | 609 | case 4: |
| 610 | host->mmc->caps |= MMC_CAP_4_BIT_DATA; |
| 611 | break; |
| 612 | } |
| 613 | |
Sangwook Lee | fa1773c | 2011-11-07 17:05:22 +0000 | [diff] [blame] | 614 | if (pdata->pm_caps) |
| 615 | host->mmc->pm_caps |= pdata->pm_caps; |
| 616 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 617 | host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | |
| 618 | SDHCI_QUIRK_32BIT_DMA_SIZE); |
| 619 | |
Hyuk Lee | 3fe42e0 | 2010-08-10 18:01:55 -0700 | [diff] [blame] | 620 | /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ |
| 621 | host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; |
| 622 | |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 623 | /* |
| 624 | * If controller does not have internal clock divider, |
| 625 | * we can use overriding functions instead of default. |
| 626 | */ |
Russell King | 1771059 | 2014-04-25 12:58:55 +0100 | [diff] [blame] | 627 | if (sc->no_divider) { |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 628 | sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; |
| 629 | sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; |
| 630 | sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; |
| 631 | } |
| 632 | |
Jeongbae Seo | b3824f2 | 2010-10-08 17:46:20 +0900 | [diff] [blame] | 633 | /* It supports additional host capabilities if needed */ |
| 634 | if (pdata->host_caps) |
| 635 | host->mmc->caps |= pdata->host_caps; |
| 636 | |
Jaehoon Chung | c1c4b66 | 2012-02-07 15:59:01 +0900 | [diff] [blame] | 637 | if (pdata->host_caps2) |
| 638 | host->mmc->caps2 |= pdata->host_caps2; |
| 639 | |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 640 | pm_runtime_enable(&pdev->dev); |
| 641 | pm_runtime_set_autosuspend_delay(&pdev->dev, 50); |
| 642 | pm_runtime_use_autosuspend(&pdev->dev); |
| 643 | pm_suspend_ignore_children(&pdev->dev, 1); |
| 644 | |
Ulf Hansson | f8e3260 | 2014-12-18 10:41:42 +0100 | [diff] [blame] | 645 | ret = mmc_of_parse(host->mmc); |
| 646 | if (ret) |
| 647 | goto err_req_regs; |
Jaehoon Chung | 11bc938 | 2014-05-26 13:58:28 +0900 | [diff] [blame] | 648 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 649 | ret = sdhci_add_host(host); |
Jisheng Zhang | fb8617e | 2018-05-25 15:15:09 +0800 | [diff] [blame] | 650 | if (ret) |
Julia Lawall | 9bda6da | 2012-03-08 23:24:53 -0500 | [diff] [blame] | 651 | goto err_req_regs; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 652 | |
Rafael J. Wysocki | 162d6f9 | 2014-12-05 03:05:33 +0100 | [diff] [blame] | 653 | #ifdef CONFIG_PM |
Seungwon Jeon | 0aa55c2 | 2012-10-30 14:28:36 +0900 | [diff] [blame] | 654 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
| 655 | clk_disable_unprepare(sc->clk_io); |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 656 | #endif |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 657 | return 0; |
| 658 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 659 | err_req_regs: |
Bartlomiej Zolnierkiewicz | 221414d | 2014-08-07 18:07:07 +0200 | [diff] [blame] | 660 | pm_runtime_disable(&pdev->dev); |
| 661 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 662 | err_no_busclks: |
Thomas Abraham | 0f310a05 | 2012-10-03 08:35:43 +0900 | [diff] [blame] | 663 | clk_disable_unprepare(sc->clk_io); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 664 | |
Tomasz Figa | b1b8fea | 2012-11-25 15:40:44 -0500 | [diff] [blame] | 665 | err_pdata_io_clk: |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 666 | sdhci_free_host(host); |
| 667 | |
| 668 | return ret; |
| 669 | } |
| 670 | |
Bill Pemberton | 6e0ee71 | 2012-11-19 13:26:03 -0500 | [diff] [blame] | 671 | static int sdhci_s3c_remove(struct platform_device *pdev) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 672 | { |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 673 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 674 | struct sdhci_s3c *sc = sdhci_priv(host); |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 675 | |
| 676 | if (sc->ext_cd_irq) |
| 677 | free_irq(sc->ext_cd_irq, sc); |
| 678 | |
Rafael J. Wysocki | 162d6f9 | 2014-12-05 03:05:33 +0100 | [diff] [blame] | 679 | #ifdef CONFIG_PM |
Jaehoon Chung | 11bc938 | 2014-05-26 13:58:28 +0900 | [diff] [blame] | 680 | if (sc->pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
Seungwon Jeon | 0aa55c2 | 2012-10-30 14:28:36 +0900 | [diff] [blame] | 681 | clk_prepare_enable(sc->clk_io); |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 682 | #endif |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 683 | sdhci_remove_host(host, 1); |
| 684 | |
Chander Kashyap | 387a8cbd | 2012-09-14 09:08:50 +0000 | [diff] [blame] | 685 | pm_runtime_dont_use_autosuspend(&pdev->dev); |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 686 | pm_runtime_disable(&pdev->dev); |
| 687 | |
Thomas Abraham | 0f310a05 | 2012-10-03 08:35:43 +0900 | [diff] [blame] | 688 | clk_disable_unprepare(sc->clk_io); |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 689 | |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 690 | sdhci_free_host(host); |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 691 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 692 | return 0; |
| 693 | } |
| 694 | |
Mark Brown | d5e9c02 | 2012-03-03 00:46:41 +0000 | [diff] [blame] | 695 | #ifdef CONFIG_PM_SLEEP |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 696 | static int sdhci_s3c_suspend(struct device *dev) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 697 | { |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 698 | struct sdhci_host *host = dev_get_drvdata(dev); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 699 | |
Adrian Hunter | d38dcad | 2017-03-20 19:50:32 +0200 | [diff] [blame] | 700 | if (host->tuning_mode != SDHCI_TUNING_MODE_3) |
| 701 | mmc_retune_needed(host->mmc); |
| 702 | |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 703 | return sdhci_suspend_host(host); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 704 | } |
| 705 | |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 706 | static int sdhci_s3c_resume(struct device *dev) |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 707 | { |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 708 | struct sdhci_host *host = dev_get_drvdata(dev); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 709 | |
Wonil Choi | 65d1351 | 2011-06-29 11:38:38 +0900 | [diff] [blame] | 710 | return sdhci_resume_host(host); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 711 | } |
Mark Brown | d5e9c02 | 2012-03-03 00:46:41 +0000 | [diff] [blame] | 712 | #endif |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 713 | |
Rafael J. Wysocki | 162d6f9 | 2014-12-05 03:05:33 +0100 | [diff] [blame] | 714 | #ifdef CONFIG_PM |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 715 | static int sdhci_s3c_runtime_suspend(struct device *dev) |
| 716 | { |
| 717 | struct sdhci_host *host = dev_get_drvdata(dev); |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 718 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 719 | struct clk *busclk = ourhost->clk_io; |
| 720 | int ret; |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 721 | |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 722 | ret = sdhci_runtime_suspend_host(host); |
| 723 | |
Adrian Hunter | d38dcad | 2017-03-20 19:50:32 +0200 | [diff] [blame] | 724 | if (host->tuning_mode != SDHCI_TUNING_MODE_3) |
| 725 | mmc_retune_needed(host->mmc); |
| 726 | |
Tomasz Figa | 3ac147f | 2014-01-11 22:39:05 +0100 | [diff] [blame] | 727 | if (ourhost->cur_clk >= 0) |
| 728 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
Thomas Abraham | 0f310a05 | 2012-10-03 08:35:43 +0900 | [diff] [blame] | 729 | clk_disable_unprepare(busclk); |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 730 | return ret; |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 731 | } |
| 732 | |
| 733 | static int sdhci_s3c_runtime_resume(struct device *dev) |
| 734 | { |
| 735 | struct sdhci_host *host = dev_get_drvdata(dev); |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 736 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 737 | struct clk *busclk = ourhost->clk_io; |
| 738 | int ret; |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 739 | |
Thomas Abraham | 0f310a05 | 2012-10-03 08:35:43 +0900 | [diff] [blame] | 740 | clk_prepare_enable(busclk); |
Tomasz Figa | 3ac147f | 2014-01-11 22:39:05 +0100 | [diff] [blame] | 741 | if (ourhost->cur_clk >= 0) |
| 742 | clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]); |
Baolin Wang | c6303c5 | 2019-07-25 11:14:22 +0800 | [diff] [blame] | 743 | ret = sdhci_runtime_resume_host(host, 0); |
Chander Kashyap | 2abeb5c | 2012-09-21 05:42:08 +0000 | [diff] [blame] | 744 | return ret; |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 745 | } |
| 746 | #endif |
| 747 | |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 748 | static const struct dev_pm_ops sdhci_s3c_pmops = { |
Mark Brown | d5e9c02 | 2012-03-03 00:46:41 +0000 | [diff] [blame] | 749 | SET_SYSTEM_SLEEP_PM_OPS(sdhci_s3c_suspend, sdhci_s3c_resume) |
Mark Brown | 9f4e815 | 2012-03-31 23:31:55 -0400 | [diff] [blame] | 750 | SET_RUNTIME_PM_OPS(sdhci_s3c_runtime_suspend, sdhci_s3c_runtime_resume, |
| 751 | NULL) |
Manuel Lauss | 29495aa | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 752 | }; |
| 753 | |
Krzysztof Kozlowski | 4d0aa49 | 2015-05-02 00:49:22 +0900 | [diff] [blame] | 754 | static const struct platform_device_id sdhci_s3c_driver_ids[] = { |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 755 | { |
| 756 | .name = "s3c-sdhci", |
| 757 | .driver_data = (kernel_ulong_t)NULL, |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 758 | }, |
| 759 | { } |
| 760 | }; |
| 761 | MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids); |
| 762 | |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 763 | #ifdef CONFIG_OF |
Marek Szyprowski | 3a8e9ca | 2017-10-04 08:38:24 +0200 | [diff] [blame] | 764 | static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = { |
| 765 | .no_divider = true, |
| 766 | }; |
| 767 | |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 768 | static const struct of_device_id sdhci_s3c_dt_match[] = { |
| 769 | { .compatible = "samsung,s3c6410-sdhci", }, |
| 770 | { .compatible = "samsung,exynos4210-sdhci", |
Marek Szyprowski | 3a8e9ca | 2017-10-04 08:38:24 +0200 | [diff] [blame] | 771 | .data = &exynos4_sdhci_drv_data }, |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 772 | {}, |
| 773 | }; |
| 774 | MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match); |
| 775 | #endif |
| 776 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 777 | static struct platform_driver sdhci_s3c_driver = { |
| 778 | .probe = sdhci_s3c_probe, |
Bill Pemberton | 0433c14 | 2012-11-19 13:20:26 -0500 | [diff] [blame] | 779 | .remove = sdhci_s3c_remove, |
Thomas Abraham | 3119936a | 2012-02-16 22:23:58 +0900 | [diff] [blame] | 780 | .id_table = sdhci_s3c_driver_ids, |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 781 | .driver = { |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 782 | .name = "s3c-sdhci", |
Thomas Abraham | cd1b00e | 2012-08-23 17:10:09 +0000 | [diff] [blame] | 783 | .of_match_table = of_match_ptr(sdhci_s3c_dt_match), |
Ulf Hansson | 6b3a194 | 2016-07-27 11:23:37 +0200 | [diff] [blame] | 784 | .pm = &sdhci_s3c_pmops, |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 785 | }, |
| 786 | }; |
| 787 | |
Axel Lin | d1f81a64 | 2011-11-26 12:55:43 +0800 | [diff] [blame] | 788 | module_platform_driver(sdhci_s3c_driver); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 789 | |
| 790 | MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue"); |
| 791 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
| 792 | MODULE_LICENSE("GPL v2"); |
| 793 | MODULE_ALIAS("platform:s3c-sdhci"); |