Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Uwe Zeisberger | f30c226 | 2006-10-03 23:01:26 +0200 | [diff] [blame] | 2 | /* include/asm-generic/tlb.h |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Generic TLB shootdown code |
| 5 | * |
| 6 | * Copyright 2001 Red Hat, Inc. |
| 7 | * Based on code from mm/memory.c Copyright Linus Torvalds and others. |
| 8 | * |
Peter Zijlstra | 90eec10 | 2015-11-16 11:08:45 +0100 | [diff] [blame] | 9 | * Copyright 2011 Red Hat, Inc., Peter Zijlstra |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | */ |
| 11 | #ifndef _ASM_GENERIC__TLB_H |
| 12 | #define _ASM_GENERIC__TLB_H |
| 13 | |
Nicholas Piggin | fd1102f | 2018-08-23 18:47:09 +1000 | [diff] [blame] | 14 | #include <linux/mmu_notifier.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/swap.h> |
Anshuman Khandual | 0391113 | 2020-04-06 20:03:51 -0700 | [diff] [blame] | 16 | #include <linux/hugetlb_inline.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <asm/tlbflush.h> |
Peter Zijlstra | e7fd28a | 2018-08-27 13:00:17 +0200 | [diff] [blame] | 18 | #include <asm/cacheflush.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
Nadav Amit | 5932c9f | 2019-04-25 17:11:42 -0700 | [diff] [blame] | 20 | /* |
| 21 | * Blindly accessing user memory from NMI context can be dangerous |
| 22 | * if we're in the middle of switching the current user task or switching |
| 23 | * the loaded mm. |
| 24 | */ |
| 25 | #ifndef nmi_uaccess_okay |
| 26 | # define nmi_uaccess_okay() true |
| 27 | #endif |
| 28 | |
Will Deacon | faaadaf | 2018-08-24 13:28:28 +0100 | [diff] [blame] | 29 | #ifdef CONFIG_MMU |
| 30 | |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 31 | /* |
| 32 | * Generic MMU-gather implementation. |
| 33 | * |
| 34 | * The mmu_gather data structure is used by the mm code to implement the |
| 35 | * correct and efficient ordering of freeing pages and TLB invalidations. |
| 36 | * |
| 37 | * This correct ordering is: |
| 38 | * |
| 39 | * 1) unhook page |
| 40 | * 2) TLB invalidate page |
| 41 | * 3) free page |
| 42 | * |
| 43 | * That is, we must never free a page before we have ensured there are no live |
| 44 | * translations left to it. Otherwise it might be possible to observe (or |
| 45 | * worse, change) the page content after it has been reused. |
| 46 | * |
| 47 | * The mmu_gather API consists of: |
| 48 | * |
Will Deacon | d8b4505 | 2021-01-27 23:53:44 +0000 | [diff] [blame] | 49 | * - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu() |
| 50 | * |
| 51 | * start and finish a mmu_gather |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 52 | * |
| 53 | * Finish in particular will issue a (final) TLB invalidate and free |
| 54 | * all (remaining) queued pages. |
| 55 | * |
| 56 | * - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA |
| 57 | * |
| 58 | * Defaults to flushing at tlb_end_vma() to reset the range; helps when |
| 59 | * there's large holes between the VMAs. |
| 60 | * |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 61 | * - tlb_remove_table() |
| 62 | * |
| 63 | * tlb_remove_table() is the basic primitive to free page-table directories |
| 64 | * (__p*_free_tlb()). In it's most primitive form it is an alias for |
| 65 | * tlb_remove_page() below, for when page directories are pages and have no |
| 66 | * additional constraints. |
| 67 | * |
| 68 | * See also MMU_GATHER_TABLE_FREE and MMU_GATHER_RCU_TABLE_FREE. |
| 69 | * |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 70 | * - tlb_remove_page() / __tlb_remove_page() |
| 71 | * - tlb_remove_page_size() / __tlb_remove_page_size() |
| 72 | * |
| 73 | * __tlb_remove_page_size() is the basic primitive that queues a page for |
| 74 | * freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a |
| 75 | * boolean indicating if the queue is (now) full and a call to |
| 76 | * tlb_flush_mmu() is required. |
| 77 | * |
| 78 | * tlb_remove_page() and tlb_remove_page_size() imply the call to |
| 79 | * tlb_flush_mmu() when required and has no return value. |
| 80 | * |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 81 | * - tlb_change_page_size() |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 82 | * |
| 83 | * call before __tlb_remove_page*() to set the current page-size; implies a |
| 84 | * possible tlb_flush_mmu() call. |
| 85 | * |
Peter Zijlstra | fa0aafb | 2018-09-20 10:54:04 +0200 | [diff] [blame] | 86 | * - tlb_flush_mmu() / tlb_flush_mmu_tlbonly() |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 87 | * |
| 88 | * tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets |
| 89 | * related state, like the range) |
| 90 | * |
Peter Zijlstra | fa0aafb | 2018-09-20 10:54:04 +0200 | [diff] [blame] | 91 | * tlb_flush_mmu() - in addition to the above TLB invalidate, also frees |
| 92 | * whatever pages are still batched. |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 93 | * |
| 94 | * - mmu_gather::fullmm |
| 95 | * |
Will Deacon | d8b4505 | 2021-01-27 23:53:44 +0000 | [diff] [blame] | 96 | * A flag set by tlb_gather_mmu_fullmm() to indicate we're going to free |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 97 | * the entire mm; this allows a number of optimizations. |
| 98 | * |
| 99 | * - We can ignore tlb_{start,end}_vma(); because we don't |
| 100 | * care about ranges. Everything will be shot down. |
| 101 | * |
| 102 | * - (RISC) architectures that use ASIDs can cycle to a new ASID |
| 103 | * and delay the invalidation until ASID space runs out. |
| 104 | * |
| 105 | * - mmu_gather::need_flush_all |
| 106 | * |
| 107 | * A flag that can be set by the arch code if it wants to force |
| 108 | * flush the entire TLB irrespective of the range. For instance |
| 109 | * x86-PAE needs this when changing top-level entries. |
| 110 | * |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 111 | * And allows the architecture to provide and implement tlb_flush(): |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 112 | * |
| 113 | * tlb_flush() may, in addition to the above mentioned mmu_gather fields, make |
| 114 | * use of: |
| 115 | * |
| 116 | * - mmu_gather::start / mmu_gather::end |
| 117 | * |
| 118 | * which provides the range that needs to be flushed to cover the pages to |
| 119 | * be freed. |
| 120 | * |
| 121 | * - mmu_gather::freed_tables |
| 122 | * |
| 123 | * set when we freed page table pages |
| 124 | * |
| 125 | * - tlb_get_unmap_shift() / tlb_get_unmap_size() |
| 126 | * |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 127 | * returns the smallest TLB entry size unmapped in this range. |
| 128 | * |
| 129 | * If an architecture does not provide tlb_flush() a default implementation |
Peter Zijlstra | a30e32b | 2018-10-11 16:51:51 +0200 | [diff] [blame] | 130 | * based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is |
| 131 | * specified, in which case we'll default to flush_tlb_mm(). |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 132 | * |
| 133 | * Additionally there are a few opt-in features: |
| 134 | * |
Peter Zijlstra | 3af4bd0 | 2020-02-03 17:37:05 -0800 | [diff] [blame] | 135 | * MMU_GATHER_PAGE_SIZE |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 136 | * |
| 137 | * This ensures we call tlb_flush() every time tlb_change_page_size() actually |
| 138 | * changes the size and provides mmu_gather::page_size to tlb_flush(). |
| 139 | * |
Peter Zijlstra | 3af4bd0 | 2020-02-03 17:37:05 -0800 | [diff] [blame] | 140 | * This might be useful if your architecture has size specific TLB |
| 141 | * invalidation instructions. |
| 142 | * |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 143 | * MMU_GATHER_TABLE_FREE |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 144 | * |
| 145 | * This provides tlb_remove_table(), to be used instead of tlb_remove_page() |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 146 | * for page directores (__p*_free_tlb()). |
| 147 | * |
| 148 | * Useful if your architecture has non-page page directories. |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 149 | * |
| 150 | * When used, an architecture is expected to provide __tlb_remove_table() |
| 151 | * which does the actual freeing of these pages. |
| 152 | * |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 153 | * MMU_GATHER_RCU_TABLE_FREE |
| 154 | * |
| 155 | * Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see |
| 156 | * comment below). |
| 157 | * |
| 158 | * Useful if your architecture doesn't use IPIs for remote TLB invalidates |
| 159 | * and therefore doesn't naturally serialize with software page-table walkers. |
| 160 | * |
Peter Zijlstra | a30e32b | 2018-10-11 16:51:51 +0200 | [diff] [blame] | 161 | * MMU_GATHER_NO_RANGE |
| 162 | * |
| 163 | * Use this if your architecture lacks an efficient flush_tlb_range(). |
Peter Zijlstra | 580a586 | 2020-02-03 17:37:08 -0800 | [diff] [blame] | 164 | * |
| 165 | * MMU_GATHER_NO_GATHER |
| 166 | * |
| 167 | * If the option is set the mmu_gather will not track individual pages for |
| 168 | * delayed page free anymore. A platform that enables the option needs to |
| 169 | * provide its own implementation of the __tlb_remove_page_size() function to |
| 170 | * free pages. |
| 171 | * |
| 172 | * This is useful if your architecture already flushes TLB entries in the |
| 173 | * various ptep_get_and_clear() functions. |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 174 | */ |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 175 | |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 176 | #ifdef CONFIG_MMU_GATHER_TABLE_FREE |
| 177 | |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 178 | struct mmu_table_batch { |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 179 | #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 180 | struct rcu_head rcu; |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 181 | #endif |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 182 | unsigned int nr; |
Gustavo A. R. Silva | 5224f79 | 2022-02-14 19:11:44 -0600 | [diff] [blame] | 183 | void *tables[]; |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 184 | }; |
| 185 | |
| 186 | #define MAX_TABLE_BATCH \ |
| 187 | ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *)) |
| 188 | |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 189 | extern void tlb_remove_table(struct mmu_gather *tlb, void *table); |
| 190 | |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 191 | #else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */ |
| 192 | |
| 193 | /* |
| 194 | * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based |
| 195 | * page directories and we can use the normal page batching to free them. |
| 196 | */ |
| 197 | #define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page)) |
| 198 | |
| 199 | #endif /* CONFIG_MMU_GATHER_TABLE_FREE */ |
| 200 | |
| 201 | #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE |
Peter Zijlstra | 0ed1325 | 2020-02-03 17:36:49 -0800 | [diff] [blame] | 202 | /* |
| 203 | * This allows an architecture that does not use the linux page-tables for |
| 204 | * hardware to skip the TLBI when freeing page tables. |
| 205 | */ |
| 206 | #ifndef tlb_needs_table_invalidate |
| 207 | #define tlb_needs_table_invalidate() (true) |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 208 | #endif |
| 209 | |
Peter Zijlstra | 0ed1325 | 2020-02-03 17:36:49 -0800 | [diff] [blame] | 210 | #else |
| 211 | |
| 212 | #ifdef tlb_needs_table_invalidate |
Peter Zijlstra | ff2e6d72 | 2020-02-03 17:37:02 -0800 | [diff] [blame] | 213 | #error tlb_needs_table_invalidate() requires MMU_GATHER_RCU_TABLE_FREE |
Peter Zijlstra | 0ed1325 | 2020-02-03 17:36:49 -0800 | [diff] [blame] | 214 | #endif |
| 215 | |
Peter Zijlstra | ff2e6d72 | 2020-02-03 17:37:02 -0800 | [diff] [blame] | 216 | #endif /* CONFIG_MMU_GATHER_RCU_TABLE_FREE */ |
Peter Zijlstra | 0ed1325 | 2020-02-03 17:36:49 -0800 | [diff] [blame] | 217 | |
| 218 | |
Peter Zijlstra | 580a586 | 2020-02-03 17:37:08 -0800 | [diff] [blame] | 219 | #ifndef CONFIG_MMU_GATHER_NO_GATHER |
Peter Zijlstra | d16dfc5 | 2011-05-24 17:11:45 -0700 | [diff] [blame] | 220 | /* |
| 221 | * If we can't allocate a page to make a big batch of page pointers |
| 222 | * to work on, then just handle a few from the on-stack structure. |
| 223 | */ |
| 224 | #define MMU_GATHER_BUNDLE 8 |
| 225 | |
Peter Zijlstra | e303297 | 2011-05-24 17:12:01 -0700 | [diff] [blame] | 226 | struct mmu_gather_batch { |
| 227 | struct mmu_gather_batch *next; |
| 228 | unsigned int nr; |
| 229 | unsigned int max; |
Gustavo A. R. Silva | 5224f79 | 2022-02-14 19:11:44 -0600 | [diff] [blame] | 230 | struct page *pages[]; |
Peter Zijlstra | e303297 | 2011-05-24 17:12:01 -0700 | [diff] [blame] | 231 | }; |
| 232 | |
| 233 | #define MAX_GATHER_BATCH \ |
| 234 | ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *)) |
| 235 | |
Michal Hocko | 53a59fc | 2013-01-04 15:35:12 -0800 | [diff] [blame] | 236 | /* |
| 237 | * Limit the maximum number of mmu_gather batches to reduce a risk of soft |
| 238 | * lockups for non-preemptible kernels on huge machines when a lot of memory |
| 239 | * is zapped during unmapping. |
| 240 | * 10K pages freed at once should be safe even without a preemption point. |
| 241 | */ |
| 242 | #define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH) |
| 243 | |
Martin Schwidefsky | 952a31c | 2018-09-18 14:51:50 +0200 | [diff] [blame] | 244 | extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page, |
| 245 | int page_size); |
| 246 | #endif |
| 247 | |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 248 | /* |
| 249 | * struct mmu_gather is an opaque type used by the mm code for passing around |
Hugh Dickins | 15a23ff | 2005-10-29 18:16:01 -0700 | [diff] [blame] | 250 | * any data needed by arch specific code for tlb_remove_page. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | */ |
| 252 | struct mmu_gather { |
| 253 | struct mm_struct *mm; |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 254 | |
Peter Zijlstra | 0d6e24d | 2020-02-03 17:37:11 -0800 | [diff] [blame] | 255 | #ifdef CONFIG_MMU_GATHER_TABLE_FREE |
Peter Zijlstra | 2672391 | 2011-05-24 17:12:00 -0700 | [diff] [blame] | 256 | struct mmu_table_batch *batch; |
| 257 | #endif |
Peter Zijlstra | dea2434 | 2018-09-04 10:43:14 +0200 | [diff] [blame] | 258 | |
Alex Shi | 597e1c3 | 2012-06-28 09:02:21 +0800 | [diff] [blame] | 259 | unsigned long start; |
| 260 | unsigned long end; |
Peter Zijlstra | 22a61c3 | 2018-08-23 20:27:25 +0100 | [diff] [blame] | 261 | /* |
| 262 | * we are in the middle of an operation to clear |
| 263 | * a full mm and can make some optimizations |
| 264 | */ |
| 265 | unsigned int fullmm : 1; |
| 266 | |
| 267 | /* |
| 268 | * we have performed an operation which |
| 269 | * requires a complete flush of the tlb |
| 270 | */ |
| 271 | unsigned int need_flush_all : 1; |
| 272 | |
| 273 | /* |
| 274 | * we have removed page directories |
| 275 | */ |
| 276 | unsigned int freed_tables : 1; |
Peter Zijlstra | e303297 | 2011-05-24 17:12:01 -0700 | [diff] [blame] | 277 | |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 278 | /* |
| 279 | * at which levels have we cleared entries? |
| 280 | */ |
| 281 | unsigned int cleared_ptes : 1; |
| 282 | unsigned int cleared_pmds : 1; |
| 283 | unsigned int cleared_puds : 1; |
| 284 | unsigned int cleared_p4ds : 1; |
| 285 | |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 286 | /* |
| 287 | * tracks VM_EXEC | VM_HUGETLB in tlb_start_vma |
| 288 | */ |
| 289 | unsigned int vma_exec : 1; |
| 290 | unsigned int vma_huge : 1; |
| 291 | |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 292 | unsigned int batch_count; |
| 293 | |
Peter Zijlstra | 580a586 | 2020-02-03 17:37:08 -0800 | [diff] [blame] | 294 | #ifndef CONFIG_MMU_GATHER_NO_GATHER |
Peter Zijlstra | e303297 | 2011-05-24 17:12:01 -0700 | [diff] [blame] | 295 | struct mmu_gather_batch *active; |
| 296 | struct mmu_gather_batch local; |
| 297 | struct page *__pages[MMU_GATHER_BUNDLE]; |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 298 | |
Peter Zijlstra | 3af4bd0 | 2020-02-03 17:37:05 -0800 | [diff] [blame] | 299 | #ifdef CONFIG_MMU_GATHER_PAGE_SIZE |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 300 | unsigned int page_size; |
| 301 | #endif |
Martin Schwidefsky | 952a31c | 2018-09-18 14:51:50 +0200 | [diff] [blame] | 302 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | }; |
| 304 | |
Peter Zijlstra | 9547d01 | 2011-05-24 17:12:14 -0700 | [diff] [blame] | 305 | void tlb_flush_mmu(struct mmu_gather *tlb); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 307 | static inline void __tlb_adjust_range(struct mmu_gather *tlb, |
Aneesh Kumar K.V | b5bc66b | 2016-12-12 16:42:34 -0800 | [diff] [blame] | 308 | unsigned long address, |
| 309 | unsigned int range_size) |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 310 | { |
| 311 | tlb->start = min(tlb->start, address); |
Aneesh Kumar K.V | b5bc66b | 2016-12-12 16:42:34 -0800 | [diff] [blame] | 312 | tlb->end = max(tlb->end, address + range_size); |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | static inline void __tlb_reset_range(struct mmu_gather *tlb) |
| 316 | { |
Will Deacon | 721c21c | 2015-01-12 19:10:55 +0000 | [diff] [blame] | 317 | if (tlb->fullmm) { |
| 318 | tlb->start = tlb->end = ~0; |
| 319 | } else { |
| 320 | tlb->start = TASK_SIZE; |
| 321 | tlb->end = 0; |
| 322 | } |
Peter Zijlstra | 22a61c3 | 2018-08-23 20:27:25 +0100 | [diff] [blame] | 323 | tlb->freed_tables = 0; |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 324 | tlb->cleared_ptes = 0; |
| 325 | tlb->cleared_pmds = 0; |
| 326 | tlb->cleared_puds = 0; |
| 327 | tlb->cleared_p4ds = 0; |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 328 | /* |
| 329 | * Do not reset mmu_gather::vma_* fields here, we do not |
| 330 | * call into tlb_start_vma() again to set them if there is an |
| 331 | * intermediate flush. |
| 332 | */ |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 333 | } |
| 334 | |
Peter Zijlstra | a30e32b | 2018-10-11 16:51:51 +0200 | [diff] [blame] | 335 | #ifdef CONFIG_MMU_GATHER_NO_RANGE |
| 336 | |
| 337 | #if defined(tlb_flush) || defined(tlb_start_vma) || defined(tlb_end_vma) |
| 338 | #error MMU_GATHER_NO_RANGE relies on default tlb_flush(), tlb_start_vma() and tlb_end_vma() |
| 339 | #endif |
| 340 | |
| 341 | /* |
| 342 | * When an architecture does not have efficient means of range flushing TLBs |
| 343 | * there is no point in doing intermediate flushes on tlb_end_vma() to keep the |
| 344 | * range small. We equally don't have to worry about page granularity or other |
| 345 | * things. |
| 346 | * |
| 347 | * All we need to do is issue a full flush for any !0 range. |
| 348 | */ |
| 349 | static inline void tlb_flush(struct mmu_gather *tlb) |
| 350 | { |
| 351 | if (tlb->end) |
| 352 | flush_tlb_mm(tlb->mm); |
| 353 | } |
| 354 | |
| 355 | static inline void |
| 356 | tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { } |
| 357 | |
| 358 | #define tlb_end_vma tlb_end_vma |
| 359 | static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) { } |
| 360 | |
| 361 | #else /* CONFIG_MMU_GATHER_NO_RANGE */ |
| 362 | |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 363 | #ifndef tlb_flush |
| 364 | |
| 365 | #if defined(tlb_start_vma) || defined(tlb_end_vma) |
| 366 | #error Default tlb_flush() relies on default tlb_start_vma() and tlb_end_vma() |
| 367 | #endif |
| 368 | |
Peter Zijlstra | a30e32b | 2018-10-11 16:51:51 +0200 | [diff] [blame] | 369 | /* |
| 370 | * When an architecture does not provide its own tlb_flush() implementation |
| 371 | * but does have a reasonably efficient flush_vma_range() implementation |
| 372 | * use that. |
| 373 | */ |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 374 | static inline void tlb_flush(struct mmu_gather *tlb) |
| 375 | { |
| 376 | if (tlb->fullmm || tlb->need_flush_all) { |
| 377 | flush_tlb_mm(tlb->mm); |
| 378 | } else if (tlb->end) { |
| 379 | struct vm_area_struct vma = { |
| 380 | .vm_mm = tlb->mm, |
| 381 | .vm_flags = (tlb->vma_exec ? VM_EXEC : 0) | |
| 382 | (tlb->vma_huge ? VM_HUGETLB : 0), |
| 383 | }; |
| 384 | |
| 385 | flush_tlb_range(&vma, tlb->start, tlb->end); |
| 386 | } |
| 387 | } |
| 388 | |
| 389 | static inline void |
| 390 | tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) |
| 391 | { |
| 392 | /* |
| 393 | * flush_tlb_range() implementations that look at VM_HUGETLB (tile, |
| 394 | * mips-4k) flush only large pages. |
| 395 | * |
| 396 | * flush_tlb_range() implementations that flush I-TLB also flush D-TLB |
| 397 | * (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing |
| 398 | * range. |
| 399 | * |
| 400 | * We rely on tlb_end_vma() to issue a flush, such that when we reset |
| 401 | * these values the batch is empty. |
| 402 | */ |
Anshuman Khandual | 0391113 | 2020-04-06 20:03:51 -0700 | [diff] [blame] | 403 | tlb->vma_huge = is_vm_hugetlb_page(vma); |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 404 | tlb->vma_exec = !!(vma->vm_flags & VM_EXEC); |
| 405 | } |
| 406 | |
| 407 | #else |
| 408 | |
| 409 | static inline void |
| 410 | tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { } |
| 411 | |
| 412 | #endif |
| 413 | |
Peter Zijlstra | a30e32b | 2018-10-11 16:51:51 +0200 | [diff] [blame] | 414 | #endif /* CONFIG_MMU_GATHER_NO_RANGE */ |
| 415 | |
Nicholas Piggin | fd1102f | 2018-08-23 18:47:09 +1000 | [diff] [blame] | 416 | static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) |
| 417 | { |
Peter Zijlstra | 0758cd8 | 2020-02-03 17:36:53 -0800 | [diff] [blame] | 418 | /* |
| 419 | * Anything calling __tlb_adjust_range() also sets at least one of |
| 420 | * these bits. |
| 421 | */ |
| 422 | if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || |
| 423 | tlb->cleared_puds || tlb->cleared_p4ds)) |
Nicholas Piggin | fd1102f | 2018-08-23 18:47:09 +1000 | [diff] [blame] | 424 | return; |
| 425 | |
| 426 | tlb_flush(tlb); |
| 427 | mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end); |
| 428 | __tlb_reset_range(tlb); |
| 429 | } |
| 430 | |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 431 | static inline void tlb_remove_page_size(struct mmu_gather *tlb, |
| 432 | struct page *page, int page_size) |
| 433 | { |
Aneesh Kumar K.V | 692a68c | 2016-12-12 16:42:43 -0800 | [diff] [blame] | 434 | if (__tlb_remove_page_size(tlb, page, page_size)) |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 435 | tlb_flush_mmu(tlb); |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 436 | } |
| 437 | |
Aneesh Kumar K.V | 692a68c | 2016-12-12 16:42:43 -0800 | [diff] [blame] | 438 | static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page) |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 439 | { |
| 440 | return __tlb_remove_page_size(tlb, page, PAGE_SIZE); |
| 441 | } |
| 442 | |
Aneesh Kumar K.V | e9d55e1 | 2016-07-26 15:24:09 -0700 | [diff] [blame] | 443 | /* tlb_remove_page |
| 444 | * Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when |
| 445 | * required. |
| 446 | */ |
| 447 | static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) |
| 448 | { |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 449 | return tlb_remove_page_size(tlb, page, PAGE_SIZE); |
Aneesh Kumar K.V | e9d55e1 | 2016-07-26 15:24:09 -0700 | [diff] [blame] | 450 | } |
| 451 | |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 452 | static inline void tlb_change_page_size(struct mmu_gather *tlb, |
Aneesh Kumar K.V | 07e3266 | 2016-12-12 16:42:40 -0800 | [diff] [blame] | 453 | unsigned int page_size) |
| 454 | { |
Peter Zijlstra | 3af4bd0 | 2020-02-03 17:37:05 -0800 | [diff] [blame] | 455 | #ifdef CONFIG_MMU_GATHER_PAGE_SIZE |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 456 | if (tlb->page_size && tlb->page_size != page_size) { |
Aneesh Kumar K.V | 864edb7 | 2019-10-24 13:28:01 +0530 | [diff] [blame] | 457 | if (!tlb->fullmm && !tlb->need_flush_all) |
Peter Zijlstra | ed6a793 | 2018-08-31 14:46:08 +0200 | [diff] [blame] | 458 | tlb_flush_mmu(tlb); |
| 459 | } |
| 460 | |
Aneesh Kumar K.V | 07e3266 | 2016-12-12 16:42:40 -0800 | [diff] [blame] | 461 | tlb->page_size = page_size; |
| 462 | #endif |
| 463 | } |
Aneesh Kumar K.V | 07e3266 | 2016-12-12 16:42:40 -0800 | [diff] [blame] | 464 | |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 465 | static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb) |
| 466 | { |
| 467 | if (tlb->cleared_ptes) |
| 468 | return PAGE_SHIFT; |
| 469 | if (tlb->cleared_pmds) |
| 470 | return PMD_SHIFT; |
| 471 | if (tlb->cleared_puds) |
| 472 | return PUD_SHIFT; |
| 473 | if (tlb->cleared_p4ds) |
| 474 | return P4D_SHIFT; |
| 475 | |
| 476 | return PAGE_SHIFT; |
| 477 | } |
| 478 | |
| 479 | static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb) |
| 480 | { |
| 481 | return 1UL << tlb_get_unmap_shift(tlb); |
| 482 | } |
| 483 | |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 484 | /* |
| 485 | * In the case of tlb vma handling, we can optimise these away in the |
| 486 | * case where we're doing a full MM flush. When we're doing a munmap, |
| 487 | * the vmas are adjusted to only cover the region to be torn down. |
| 488 | */ |
| 489 | #ifndef tlb_start_vma |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 490 | static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) |
| 491 | { |
| 492 | if (tlb->fullmm) |
| 493 | return; |
| 494 | |
| 495 | tlb_update_vma_flags(tlb, vma); |
| 496 | flush_cache_range(vma, vma->vm_start, vma->vm_end); |
| 497 | } |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 498 | #endif |
| 499 | |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 500 | #ifndef tlb_end_vma |
Peter Zijlstra | 5f307be | 2018-09-04 13:18:15 +0200 | [diff] [blame] | 501 | static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) |
| 502 | { |
| 503 | if (tlb->fullmm) |
| 504 | return; |
| 505 | |
| 506 | /* |
| 507 | * Do a TLB flush and reset the range at VMA boundaries; this avoids |
| 508 | * the ranges growing with the unused space between consecutive VMAs, |
| 509 | * but also the mmu_gather::vma_* flags from tlb_start_vma() rely on |
| 510 | * this. |
| 511 | */ |
| 512 | tlb_flush_mmu_tlbonly(tlb); |
| 513 | } |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 514 | #endif |
| 515 | |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 516 | /* |
| 517 | * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end, |
| 518 | * and set corresponding cleared_*. |
| 519 | */ |
| 520 | static inline void tlb_flush_pte_range(struct mmu_gather *tlb, |
| 521 | unsigned long address, unsigned long size) |
| 522 | { |
| 523 | __tlb_adjust_range(tlb, address, size); |
| 524 | tlb->cleared_ptes = 1; |
| 525 | } |
| 526 | |
| 527 | static inline void tlb_flush_pmd_range(struct mmu_gather *tlb, |
| 528 | unsigned long address, unsigned long size) |
| 529 | { |
| 530 | __tlb_adjust_range(tlb, address, size); |
| 531 | tlb->cleared_pmds = 1; |
| 532 | } |
| 533 | |
| 534 | static inline void tlb_flush_pud_range(struct mmu_gather *tlb, |
| 535 | unsigned long address, unsigned long size) |
| 536 | { |
| 537 | __tlb_adjust_range(tlb, address, size); |
| 538 | tlb->cleared_puds = 1; |
| 539 | } |
| 540 | |
| 541 | static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, |
| 542 | unsigned long address, unsigned long size) |
| 543 | { |
| 544 | __tlb_adjust_range(tlb, address, size); |
| 545 | tlb->cleared_p4ds = 1; |
| 546 | } |
| 547 | |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 548 | #ifndef __tlb_remove_tlb_entry |
| 549 | #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) |
| 550 | #endif |
| 551 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 552 | /** |
| 553 | * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation. |
| 554 | * |
Will Deacon | fb7332a | 2014-10-29 10:03:09 +0000 | [diff] [blame] | 555 | * Record the fact that pte's were really unmapped by updating the range, |
| 556 | * so we can later optimise away the tlb invalidate. This helps when |
| 557 | * userspace is unmapping already-unmapped pages, which happens quite a lot. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | */ |
| 559 | #define tlb_remove_tlb_entry(tlb, ptep, address) \ |
| 560 | do { \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 561 | tlb_flush_pte_range(tlb, address, PAGE_SIZE); \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | __tlb_remove_tlb_entry(tlb, ptep, address); \ |
| 563 | } while (0) |
| 564 | |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 565 | #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ |
| 566 | do { \ |
| 567 | unsigned long _sz = huge_page_size(h); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 568 | if (_sz == PMD_SIZE) \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 569 | tlb_flush_pmd_range(tlb, address, _sz); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 570 | else if (_sz == PUD_SIZE) \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 571 | tlb_flush_pud_range(tlb, address, _sz); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 572 | __tlb_remove_tlb_entry(tlb, ptep, address); \ |
Aneesh Kumar K.V | b528e4b | 2016-12-12 16:42:37 -0800 | [diff] [blame] | 573 | } while (0) |
| 574 | |
Shaohua Li | f21760b | 2012-01-12 17:19:16 -0800 | [diff] [blame] | 575 | /** |
| 576 | * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation |
| 577 | * This is a nop so far, because only x86 needs it. |
| 578 | */ |
| 579 | #ifndef __tlb_remove_pmd_tlb_entry |
| 580 | #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0) |
| 581 | #endif |
| 582 | |
Aneesh Kumar K.V | b5bc66b | 2016-12-12 16:42:34 -0800 | [diff] [blame] | 583 | #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \ |
| 584 | do { \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 585 | tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE); \ |
Aneesh Kumar K.V | b5bc66b | 2016-12-12 16:42:34 -0800 | [diff] [blame] | 586 | __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \ |
Shaohua Li | f21760b | 2012-01-12 17:19:16 -0800 | [diff] [blame] | 587 | } while (0) |
| 588 | |
Matthew Wilcox | a00cc7d | 2017-02-24 14:57:02 -0800 | [diff] [blame] | 589 | /** |
| 590 | * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb |
| 591 | * invalidation. This is a nop so far, because only x86 needs it. |
| 592 | */ |
| 593 | #ifndef __tlb_remove_pud_tlb_entry |
| 594 | #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0) |
| 595 | #endif |
| 596 | |
| 597 | #define tlb_remove_pud_tlb_entry(tlb, pudp, address) \ |
| 598 | do { \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 599 | tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE); \ |
Matthew Wilcox | a00cc7d | 2017-02-24 14:57:02 -0800 | [diff] [blame] | 600 | __tlb_remove_pud_tlb_entry(tlb, pudp, address); \ |
| 601 | } while (0) |
| 602 | |
Aneesh Kumar K.V | b5bc66b | 2016-12-12 16:42:34 -0800 | [diff] [blame] | 603 | /* |
| 604 | * For things like page tables caches (ie caching addresses "inside" the |
| 605 | * page tables, like x86 does), for legacy reasons, flushing an |
| 606 | * individual page had better flush the page table caches behind it. This |
| 607 | * is definitely how x86 works, for example. And if you have an |
| 608 | * architected non-legacy page table cache (which I'm not aware of |
| 609 | * anybody actually doing), you're going to have some architecturally |
| 610 | * explicit flushing for that, likely *separate* from a regular TLB entry |
| 611 | * flush, and thus you'd need more than just some range expansion.. |
| 612 | * |
| 613 | * So if we ever find an architecture |
| 614 | * that would want something that odd, I think it is up to that |
| 615 | * architecture to do its own odd thing, not cause pain for others |
| 616 | * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com |
| 617 | * |
| 618 | * For now w.r.t page table cache, mark the range_size as PAGE_SIZE |
| 619 | */ |
| 620 | |
Nicholas Piggin | a90744b | 2018-07-13 16:59:03 -0700 | [diff] [blame] | 621 | #ifndef pte_free_tlb |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 622 | #define pte_free_tlb(tlb, ptep, address) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | do { \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 624 | tlb_flush_pmd_range(tlb, address, PAGE_SIZE); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 625 | tlb->freed_tables = 1; \ |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 626 | __pte_free_tlb(tlb, ptep, address); \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | } while (0) |
Nicholas Piggin | a90744b | 2018-07-13 16:59:03 -0700 | [diff] [blame] | 628 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | |
Nicholas Piggin | a90744b | 2018-07-13 16:59:03 -0700 | [diff] [blame] | 630 | #ifndef pmd_free_tlb |
Kirill A. Shutemov | 048456d | 2017-03-09 17:24:06 +0300 | [diff] [blame] | 631 | #define pmd_free_tlb(tlb, pmdp, address) \ |
| 632 | do { \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 633 | tlb_flush_pud_range(tlb, address, PAGE_SIZE); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 634 | tlb->freed_tables = 1; \ |
Kirill A. Shutemov | 048456d | 2017-03-09 17:24:06 +0300 | [diff] [blame] | 635 | __pmd_free_tlb(tlb, pmdp, address); \ |
| 636 | } while (0) |
Nicholas Piggin | a90744b | 2018-07-13 16:59:03 -0700 | [diff] [blame] | 637 | #endif |
Kirill A. Shutemov | 048456d | 2017-03-09 17:24:06 +0300 | [diff] [blame] | 638 | |
Nicholas Piggin | a90744b | 2018-07-13 16:59:03 -0700 | [diff] [blame] | 639 | #ifndef pud_free_tlb |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 640 | #define pud_free_tlb(tlb, pudp, address) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | do { \ |
Peter Zijlstra (Intel) | 2631ed0 | 2020-06-25 16:03:12 +0800 | [diff] [blame] | 642 | tlb_flush_p4d_range(tlb, address, PAGE_SIZE); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 643 | tlb->freed_tables = 1; \ |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 644 | __pud_free_tlb(tlb, pudp, address); \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | } while (0) |
| 646 | #endif |
| 647 | |
Nicholas Piggin | a90744b | 2018-07-13 16:59:03 -0700 | [diff] [blame] | 648 | #ifndef p4d_free_tlb |
Kirill A. Shutemov | 048456d | 2017-03-09 17:24:06 +0300 | [diff] [blame] | 649 | #define p4d_free_tlb(tlb, pudp, address) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | do { \ |
Peter Zijlstra | 22a61c3 | 2018-08-23 20:27:25 +0100 | [diff] [blame] | 651 | __tlb_adjust_range(tlb, address, PAGE_SIZE); \ |
Will Deacon | a6d6024 | 2018-08-23 21:01:46 +0100 | [diff] [blame] | 652 | tlb->freed_tables = 1; \ |
Kirill A. Shutemov | 048456d | 2017-03-09 17:24:06 +0300 | [diff] [blame] | 653 | __p4d_free_tlb(tlb, pudp, address); \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | } while (0) |
Kirill A. Shutemov | 048456d | 2017-03-09 17:24:06 +0300 | [diff] [blame] | 655 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | |
Will Deacon | faaadaf | 2018-08-24 13:28:28 +0100 | [diff] [blame] | 657 | #endif /* CONFIG_MMU */ |
| 658 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | #endif /* _ASM_GENERIC__TLB_H */ |