blob: ed5e9ff61a68c91ff1ce3446231d387445511473 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Port for PPC64 David Engebretsen, IBM Corp.
3 * Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
4 *
5 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
6 * Rework, based on alpha PCI code.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#undef DEBUG
15
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/kernel.h>
17#include <linux/pci.h>
18#include <linux/string.h>
19#include <linux/init.h>
Paul Gortmaker66b15db2011-05-27 10:46:24 -040020#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/mm.h>
22#include <linux/list.h>
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +100023#include <linux/syscalls.h>
Benjamin Herrenschmidt6e99e452006-07-10 04:44:42 -070024#include <linux/irq.h>
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100025#include <linux/vmalloc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#include <asm/processor.h>
28#include <asm/io.h>
29#include <asm/prom.h>
30#include <asm/pci-bridge.h>
31#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#include <asm/machdep.h>
Stephen Rothwelld3878992005-09-28 02:50:25 +100033#include <asm/ppc-pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
Linus Torvalds1da177e2005-04-16 15:20:36 -070035/* pci_io_base -- the base address from which io bars are offsets.
36 * This is the lowest I/O base address (so bar values are always positive),
37 * and it *must* be the start of ISA space if an ISA bus exists because
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100038 * ISA drivers use hard coded offsets. If no ISA bus exists nothing
39 * is mapped on the first 64K of IO space
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 */
Aneesh Kumar K.Vd6a99962016-04-29 23:26:21 +100041unsigned long pci_io_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -070042EXPORT_SYMBOL(pci_io_base);
43
Linus Torvalds1da177e2005-04-16 15:20:36 -070044static int __init pcibios_init(void)
45{
46 struct pci_controller *hose, *tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -070047
Benjamin Herrenschmidt3fd94c62007-12-20 14:54:53 +110048 printk(KERN_INFO "PCI: Probing PCI hardware\n");
49
Benjamin Herrenschmidt53280322008-10-27 19:48:29 +000050 /* For now, override phys_mem_access_prot. If we need it,g
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 * later, we may move that initialization to each ppc_md
52 */
53 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
54
Benjamin Herrenschmidt1fd0f522008-10-02 14:12:51 +000055 /* On ppc64, we always enable PCI domains and we keep domain 0
56 * backward compatible in /proc for video cards
57 */
Rob Herring0e47ff12011-07-12 09:25:51 -050058 pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0);
Benjamin Herrenschmidt1fd0f522008-10-02 14:12:51 +000059
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 /* Scan all of the recorded PCI controllers. */
John Rose92eb4602006-03-14 17:46:45 -060061 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
Grant Likelyb5d937d2011-02-04 11:24:11 -070062 pcibios_scan_phb(hose);
John Rose92eb4602006-03-14 17:46:45 -060063 pci_bus_add_devices(hose->bus);
64 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Benjamin Herrenschmidt3fd94c62007-12-20 14:54:53 +110066 /* Call common code to handle resource allocation */
67 pcibios_resource_survey();
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Olof Johanssone884e9c2006-04-12 15:26:59 -050069 printk(KERN_DEBUG "PCI: Probing PCI hardware done\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
71 return 0;
72}
73
74subsys_initcall(pcibios_init);
75
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100076int pcibios_unmap_io_space(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -070077{
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100078 struct pci_controller *hose;
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100080 WARN_ON(bus == NULL);
Benjamin Herrenschmidtde821202007-05-15 16:19:36 +100081
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100082 /* If this is not a PHB, we only flush the hash table over
83 * the area mapped by this bridge. We don't play with the PTE
Michael Ellerman027dfac2016-06-01 16:34:37 +100084 * mappings since we might have to deal with sub-page alignments
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100085 * so flushing the hash table is the only sane way to make sure
86 * that no hash entries are covering that removed bridge area
87 * while still allowing other busses overlapping those pages
Benjamin Herrenschmidt94491682009-06-02 21:17:45 +000088 *
89 * Note: If we ever support P2P hotplug on Book3E, we'll have
90 * to do an appropriate TLB flush here too
Benjamin Herrenschmidtde821202007-05-15 16:19:36 +100091 */
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100092 if (bus->self) {
Kumar Galace7a35c2009-10-16 07:05:17 +000093#ifdef CONFIG_PPC_STD_MMU_64
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100094 struct resource *res = bus->resource[0];
Kumar Galace7a35c2009-10-16 07:05:17 +000095#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070096
Benjamin Herrenschmidtb0494bc2008-10-27 19:48:22 +000097 pr_debug("IO unmapping for PCI-PCI bridge %s\n",
98 pci_name(bus->self));
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +100099
Benjamin Herrenschmidt94491682009-06-02 21:17:45 +0000100#ifdef CONFIG_PPC_STD_MMU_64
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000101 __flush_hash_table_range(&init_mm, res->start + _IO_BASE,
Benjamin Herrenschmidtb30115e2008-10-27 19:48:47 +0000102 res->end + _IO_BASE + 1);
Benjamin Herrenschmidt94491682009-06-02 21:17:45 +0000103#endif
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000104 return 0;
105 }
106
107 /* Get the host bridge */
108 hose = pci_bus_to_host(bus);
109
110 /* Check if we have IOs allocated */
Anton Blanchardb0d436c2013-08-07 02:01:24 +1000111 if (hose->io_base_alloc == NULL)
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000112 return 0;
113
Benjamin Herrenschmidtb0494bc2008-10-27 19:48:22 +0000114 pr_debug("IO unmapping for PHB %s\n", hose->dn->full_name);
115 pr_debug(" alloc=0x%p\n", hose->io_base_alloc);
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000116
117 /* This is a PHB, we fully unmap the IO area */
118 vunmap(hose->io_base_alloc);
119
120 return 0;
121}
122EXPORT_SYMBOL_GPL(pcibios_unmap_io_space);
123
Greg Kroah-Hartmancad5cef2012-12-21 14:04:10 -0800124static int pcibios_map_phb_io_space(struct pci_controller *hose)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125{
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000126 struct vm_struct *area;
127 unsigned long phys_page;
128 unsigned long size_page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 unsigned long io_virt_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000131 phys_page = _ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE);
132 size_page = _ALIGN_UP(hose->pci_io_size, PAGE_SIZE);
133
134 /* Make sure IO area address is clear */
135 hose->io_base_alloc = NULL;
136
137 /* If there's no IO to map on that bus, get away too */
138 if (hose->pci_io_size == 0 || hose->io_base_phys == 0)
139 return 0;
140
141 /* Let's allocate some IO space for that guy. We don't pass
142 * VM_IOREMAP because we don't care about alignment tricks that
143 * the core does in that case. Maybe we should due to stupid card
144 * with incomplete address decoding but I'd rather not deal with
145 * those outside of the reserved 64K legacy region.
146 */
147 area = __get_vm_area(size_page, 0, PHB_IO_BASE, PHB_IO_END);
148 if (area == NULL)
149 return -ENOMEM;
150 hose->io_base_alloc = area->addr;
151 hose->io_base_virt = (void __iomem *)(area->addr +
152 hose->io_base_phys - phys_page);
153
Benjamin Herrenschmidtb0494bc2008-10-27 19:48:22 +0000154 pr_debug("IO mapping for PHB %s\n", hose->dn->full_name);
Stephen Rothwell9477e452009-01-06 14:27:38 +0000155 pr_debug(" phys=0x%016llx, virt=0x%p (alloc=0x%p)\n",
Benjamin Herrenschmidtb0494bc2008-10-27 19:48:22 +0000156 hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc);
Stephen Rothwellbcba0772009-06-02 18:10:57 +0000157 pr_debug(" size=0x%016llx (alloc=0x%016lx)\n",
Benjamin Herrenschmidtb0494bc2008-10-27 19:48:22 +0000158 hose->pci_io_size, size_page);
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000159
160 /* Establish the mapping */
161 if (__ioremap_at(phys_page, area->addr, size_page,
Aneesh Kumar K.V72176dd2016-04-29 23:25:37 +1000162 pgprot_val(pgprot_noncached(__pgprot(0)))) == NULL)
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000163 return -ENOMEM;
164
165 /* Fixup hose IO resource */
Bjorn Helgaas38973ba2012-03-16 17:48:09 -0600166 io_virt_offset = pcibios_io_space_offset(hose);
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000167 hose->io_resource.start += io_virt_offset;
168 hose->io_resource.end += io_virt_offset;
169
Joe Perches518fdae2010-11-12 14:49:19 +0000170 pr_debug(" hose->io_resource=%pR\n", &hose->io_resource);
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000171
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 return 0;
173}
Bjorn Helgaas49a6cba2011-10-28 16:27:38 -0600174
Greg Kroah-Hartmancad5cef2012-12-21 14:04:10 -0800175int pcibios_map_io_space(struct pci_bus *bus)
Bjorn Helgaas49a6cba2011-10-28 16:27:38 -0600176{
177 WARN_ON(bus == NULL);
178
179 /* If this not a PHB, nothing to do, page tables still exist and
180 * thus HPTEs will be faulted in when needed
181 */
182 if (bus->self) {
183 pr_debug("IO mapping for PCI-PCI bridge %s\n",
184 pci_name(bus->self));
185 pr_debug(" virt=0x%016llx...0x%016llx\n",
186 bus->resource[0]->start + _IO_BASE,
187 bus->resource[0]->end + _IO_BASE);
188 return 0;
189 }
190
191 return pcibios_map_phb_io_space(pci_bus_to_host(bus));
192}
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000193EXPORT_SYMBOL_GPL(pcibios_map_io_space);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194
Greg Kroah-Hartmancad5cef2012-12-21 14:04:10 -0800195void pcibios_setup_phb_io_space(struct pci_controller *hose)
Grant Likely0ed2c7222009-08-28 08:58:16 +0000196{
Bjorn Helgaas49a6cba2011-10-28 16:27:38 -0600197 pcibios_map_phb_io_space(hose);
Grant Likely0ed2c7222009-08-28 08:58:16 +0000198}
199
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000200#define IOBASE_BRIDGE_NUMBER 0
201#define IOBASE_MEMORY 1
202#define IOBASE_IO 2
203#define IOBASE_ISA_IO 3
204#define IOBASE_ISA_MEM 4
205
206long sys_pciconfig_iobase(long which, unsigned long in_bus,
207 unsigned long in_devfn)
208{
209 struct pci_controller* hose;
Mike Qiu140ab642014-04-14 16:12:35 -0600210 struct pci_bus *tmp_bus, *bus = NULL;
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000211 struct device_node *hose_node;
212
213 /* Argh ! Please forgive me for that hack, but that's the
214 * simplest way to get existing XFree to not lockup on some
215 * G5 machines... So when something asks for bus 0 io base
216 * (bus 0 is HT root), we return the AGP one instead.
217 */
Grant Likely71a157e2010-02-01 21:34:14 -0700218 if (in_bus == 0 && of_machine_is_compatible("MacRISC4")) {
Paul Mackerras16124f12008-12-28 14:12:57 +0000219 struct device_node *agp;
220
221 agp = of_find_compatible_node(NULL, NULL, "u3-agp");
222 if (agp)
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000223 in_bus = 0xf0;
Paul Mackerras16124f12008-12-28 14:12:57 +0000224 of_node_put(agp);
225 }
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000226
227 /* That syscall isn't quite compatible with PCI domains, but it's
228 * used on pre-domains setup. We return the first match
229 */
230
Mike Qiu140ab642014-04-14 16:12:35 -0600231 list_for_each_entry(tmp_bus, &pci_root_buses, node) {
232 if (in_bus >= tmp_bus->number &&
233 in_bus <= tmp_bus->busn_res.end) {
234 bus = tmp_bus;
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000235 break;
Mike Qiu140ab642014-04-14 16:12:35 -0600236 }
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000237 }
Grant Likelyb5d937d2011-02-04 11:24:11 -0700238 if (bus == NULL || bus->dev.of_node == NULL)
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000239 return -ENODEV;
240
Grant Likelyb5d937d2011-02-04 11:24:11 -0700241 hose_node = bus->dev.of_node;
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000242 hose = PCI_DN(hose_node)->phb;
243
244 switch (which) {
245 case IOBASE_BRIDGE_NUMBER:
246 return (long)hose->first_busno;
247 case IOBASE_MEMORY:
Benjamin Herrenschmidt3fd47f02013-05-06 13:40:40 +1000248 return (long)hose->mem_offset[0];
Paul Mackerrasb2ad7b52005-09-09 23:02:36 +1000249 case IOBASE_IO:
250 return (long)hose->io_base_phys;
251 case IOBASE_ISA_IO:
252 return (long)isa_io_base;
253 case IOBASE_ISA_MEM:
254 return -EINVAL;
255 }
256
257 return -EOPNOTSUPP;
258}
Anton Blanchard357518f2006-06-10 20:53:06 +1000259
260#ifdef CONFIG_NUMA
261int pcibus_to_node(struct pci_bus *bus)
262{
263 struct pci_controller *phb = pci_bus_to_host(bus);
264 return phb->node;
265}
266EXPORT_SYMBOL(pcibus_to_node);
267#endif