Yoshinori Sato | df2078b | 2015-05-11 02:32:13 +0900 | [diff] [blame] | 1 | #include <linux/init.h> |
| 2 | #include <asm/thread_info.h> |
| 3 | |
| 4 | #if defined(CONFIG_CPU_H8300H) |
| 5 | .h8300h |
| 6 | #define SYSCR 0xfee012 |
| 7 | #define IRAMTOP 0xffff20 |
| 8 | #define NR_INT 64 |
| 9 | #endif |
| 10 | #if defined(CONFIG_CPU_H8S) |
| 11 | .h8300s |
| 12 | #define INTCR 0xffff31 |
| 13 | #define IRAMTOP 0xffc000 |
| 14 | #define NR_INT 128 |
| 15 | #endif |
| 16 | |
| 17 | __HEAD |
| 18 | .global _start |
| 19 | _start: |
| 20 | mov.l #IRAMTOP,sp |
| 21 | #if !defined(CONFIG_H8300H_SIM) && \ |
| 22 | !defined(CONFIG_H8S_SIM) |
| 23 | jsr @lowlevel_init |
| 24 | |
| 25 | /* copy .data */ |
| 26 | mov.l #_begin_data,er5 |
| 27 | mov.l #_sdata,er6 |
| 28 | mov.l #_edata,er4 |
| 29 | sub.l er6,er4 |
| 30 | shlr.l er4 |
| 31 | shlr.l er4 |
| 32 | 1: |
| 33 | mov.l @er5+,er0 |
| 34 | mov.l er0,@er6 |
| 35 | adds #4,er6 |
| 36 | dec.l #1,er4 |
| 37 | bne 1b |
| 38 | /* .bss clear */ |
| 39 | mov.l #_sbss,er5 |
| 40 | mov.l #_ebss,er4 |
| 41 | sub.l er5,er4 |
| 42 | shlr er4 |
| 43 | shlr er4 |
| 44 | sub.l er0,er0 |
| 45 | 1: |
| 46 | mov.l er0,@er5 |
| 47 | adds #4,er5 |
| 48 | dec.l #1,er4 |
| 49 | bne 1b |
| 50 | #else |
| 51 | /* get cmdline from gdb */ |
| 52 | jsr @0xcc |
| 53 | ;; er0 - argc |
| 54 | ;; er1 - argv |
| 55 | mov.l #command_line,er3 |
| 56 | adds #4,er1 |
| 57 | dec.l #1,er0 |
| 58 | beq 4f |
| 59 | 1: |
| 60 | mov.l @er1+,er2 |
| 61 | 2: |
| 62 | mov.b @er2+,r4l |
| 63 | beq 3f |
| 64 | mov.b r4l,@er3 |
| 65 | adds #1,er3 |
| 66 | bra 2b |
| 67 | 3: |
| 68 | mov.b #' ',r4l |
| 69 | mov.b r4l,@er3 |
| 70 | adds #1,er3 |
| 71 | dec.l #1,er0 |
| 72 | bne 1b |
| 73 | subs #1,er3 |
| 74 | mov.b #0,r4l |
| 75 | mov.b r4l,@er3 |
| 76 | 4: |
| 77 | #endif |
| 78 | sub.l er0,er0 |
| 79 | jsr @h8300_fdt_init |
| 80 | /* linux kernel start */ |
| 81 | #if defined(CONFIG_CPU_H8300H) |
| 82 | ldc #0xd0,ccr /* running kernel */ |
| 83 | mov.l #SYSCR,er0 |
| 84 | bclr #3,@er0 |
| 85 | #endif |
| 86 | #if defined(CONFIG_CPU_H8S) |
| 87 | ldc #0x07,exr |
| 88 | bclr #4,@INTCR:8 |
| 89 | bset #5,@INTCR:8 /* Interrupt mode 2 */ |
| 90 | ldc #0x90,ccr /* running kernel */ |
| 91 | #endif |
| 92 | mov.l #init_thread_union,sp |
| 93 | add.l #0x2000,sp |
| 94 | jsr @start_kernel |
| 95 | |
| 96 | 1: |
| 97 | bra 1b |
| 98 | |
| 99 | #if defined(CONFIG_ROMKERNEL) |
| 100 | /* interrupt vector */ |
| 101 | .section .vectors,"ax" |
| 102 | .long _start |
| 103 | .long _start |
| 104 | vector = 2 |
| 105 | .rept NR_INT - 2 |
| 106 | .long _interrupt_redirect_table+vector*4 |
| 107 | vector = vector + 1 |
| 108 | .endr |
| 109 | #endif |
| 110 | .end |