Greg Kroah-Hartman | 5fd54ac | 2017-11-03 11:28:30 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2001 by David Brownell |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* this file is part of ehci-hcd.c */ |
| 7 | |
| 8 | /*-------------------------------------------------------------------------*/ |
| 9 | |
| 10 | /* |
| 11 | * There's basically three types of memory: |
| 12 | * - data used only by the HCD ... kmalloc is fine |
| 13 | * - async and periodic schedules, shared by HC and HCD ... these |
| 14 | * need to use dma_pool or dma_alloc_coherent |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 15 | * - driver buffers, read/written by HC ... single shot DMA mapped |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | * |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 17 | * There's also "register" data (e.g. PCI or SOC), which is memory mapped. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * No memory seen by this driver is pageable. |
| 19 | */ |
| 20 | |
| 21 | /*-------------------------------------------------------------------------*/ |
| 22 | |
| 23 | /* Allocate the key transfer structures from the previously allocated pool */ |
| 24 | |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 25 | static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd, |
| 26 | dma_addr_t dma) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | { |
| 28 | memset (qtd, 0, sizeof *qtd); |
| 29 | qtd->qtd_dma = dma; |
Anatolij Gustschin | 230f7ed | 2010-09-28 20:55:21 +0200 | [diff] [blame] | 30 | qtd->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 31 | qtd->hw_next = EHCI_LIST_END(ehci); |
| 32 | qtd->hw_alt_next = EHCI_LIST_END(ehci); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | INIT_LIST_HEAD (&qtd->qtd_list); |
| 34 | } |
| 35 | |
Al Viro | 55016f1 | 2005-10-21 03:21:58 -0400 | [diff] [blame] | 36 | static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | { |
| 38 | struct ehci_qtd *qtd; |
| 39 | dma_addr_t dma; |
| 40 | |
| 41 | qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma); |
| 42 | if (qtd != NULL) { |
Stefan Roese | 6dbd682 | 2007-05-01 09:29:37 -0700 | [diff] [blame] | 43 | ehci_qtd_init(ehci, qtd, dma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | } |
| 45 | return qtd; |
| 46 | } |
| 47 | |
| 48 | static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd) |
| 49 | { |
| 50 | dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma); |
| 51 | } |
| 52 | |
| 53 | |
Alan Stern | c83e1a9 | 2012-07-11 11:21:25 -0400 | [diff] [blame] | 54 | static void qh_destroy(struct ehci_hcd *ehci, struct ehci_qh *qh) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | /* clean qtds first, and know this is not linked */ |
| 57 | if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) { |
| 58 | ehci_dbg (ehci, "unused qh not empty!\n"); |
| 59 | BUG (); |
| 60 | } |
| 61 | if (qh->dummy) |
| 62 | ehci_qtd_free (ehci, qh->dummy); |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 63 | dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma); |
| 64 | kfree(qh); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | } |
| 66 | |
Al Viro | 55016f1 | 2005-10-21 03:21:58 -0400 | [diff] [blame] | 67 | static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | { |
| 69 | struct ehci_qh *qh; |
| 70 | dma_addr_t dma; |
| 71 | |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 72 | qh = kzalloc(sizeof *qh, GFP_ATOMIC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | if (!qh) |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 74 | goto done; |
| 75 | qh->hw = (struct ehci_qh_hw *) |
Souptick Joarder | 22072e8 | 2018-02-14 23:18:48 +0530 | [diff] [blame] | 76 | dma_pool_zalloc(ehci->qh_pool, flags, &dma); |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 77 | if (!qh->hw) |
| 78 | goto fail; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | qh->qh_dma = dma; |
| 80 | // INIT_LIST_HEAD (&qh->qh_list); |
| 81 | INIT_LIST_HEAD (&qh->qtd_list); |
Ming Lei | 9118f9e | 2013-07-03 22:53:10 +0800 | [diff] [blame] | 82 | INIT_LIST_HEAD(&qh->unlink_node); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
| 84 | /* dummy td enables safe urb queuing */ |
| 85 | qh->dummy = ehci_qtd_alloc (ehci, flags); |
| 86 | if (qh->dummy == NULL) { |
| 87 | ehci_dbg (ehci, "no dummy td\n"); |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 88 | goto fail1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | } |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 90 | done: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | return qh; |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 92 | fail1: |
| 93 | dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma); |
| 94 | fail: |
| 95 | kfree(qh); |
| 96 | return NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | } |
| 98 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | /*-------------------------------------------------------------------------*/ |
| 100 | |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 101 | /* The queue heads and transfer descriptors are managed from pools tied |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | * to each of the "per device" structures. |
| 103 | * This is the initialisation and cleanup code. |
| 104 | */ |
| 105 | |
| 106 | static void ehci_mem_cleanup (struct ehci_hcd *ehci) |
| 107 | { |
| 108 | if (ehci->async) |
Alan Stern | c83e1a9 | 2012-07-11 11:21:25 -0400 | [diff] [blame] | 109 | qh_destroy(ehci, ehci->async); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | ehci->async = NULL; |
| 111 | |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 112 | if (ehci->dummy) |
Alan Stern | c83e1a9 | 2012-07-11 11:21:25 -0400 | [diff] [blame] | 113 | qh_destroy(ehci, ehci->dummy); |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 114 | ehci->dummy = NULL; |
| 115 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | /* DMA consistent memory and pools */ |
Markus Elfring | a7a19d7 | 2015-11-16 19:01:44 +0100 | [diff] [blame] | 117 | dma_pool_destroy(ehci->qtd_pool); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | ehci->qtd_pool = NULL; |
Markus Elfring | a7a19d7 | 2015-11-16 19:01:44 +0100 | [diff] [blame] | 119 | dma_pool_destroy(ehci->qh_pool); |
| 120 | ehci->qh_pool = NULL; |
| 121 | dma_pool_destroy(ehci->itd_pool); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | ehci->itd_pool = NULL; |
Markus Elfring | a7a19d7 | 2015-11-16 19:01:44 +0100 | [diff] [blame] | 123 | dma_pool_destroy(ehci->sitd_pool); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | ehci->sitd_pool = NULL; |
| 125 | |
| 126 | if (ehci->periodic) |
Peter Chen | 8b373ff | 2017-03-13 10:18:45 +0800 | [diff] [blame] | 127 | dma_free_coherent(ehci_to_hcd(ehci)->self.sysdev, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | ehci->periodic_size * sizeof (u32), |
| 129 | ehci->periodic, ehci->periodic_dma); |
| 130 | ehci->periodic = NULL; |
| 131 | |
| 132 | /* shadow periodic table */ |
Jesper Juhl | 1bc3c9e | 2005-04-18 17:39:34 -0700 | [diff] [blame] | 133 | kfree(ehci->pshadow); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | ehci->pshadow = NULL; |
| 135 | } |
| 136 | |
| 137 | /* remember to add cleanup code (above) if you add anything here */ |
Al Viro | 55016f1 | 2005-10-21 03:21:58 -0400 | [diff] [blame] | 138 | static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | { |
| 140 | int i; |
| 141 | |
| 142 | /* QTDs for control/bulk/intr transfers */ |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 143 | ehci->qtd_pool = dma_pool_create ("ehci_qtd", |
Peter Chen | 8b373ff | 2017-03-13 10:18:45 +0800 | [diff] [blame] | 144 | ehci_to_hcd(ehci)->self.sysdev, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | sizeof (struct ehci_qtd), |
| 146 | 32 /* byte alignment (for hw parts) */, |
| 147 | 4096 /* can't cross 4K */); |
| 148 | if (!ehci->qtd_pool) { |
| 149 | goto fail; |
| 150 | } |
| 151 | |
| 152 | /* QHs for control/bulk/intr transfers */ |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 153 | ehci->qh_pool = dma_pool_create ("ehci_qh", |
Peter Chen | 8b373ff | 2017-03-13 10:18:45 +0800 | [diff] [blame] | 154 | ehci_to_hcd(ehci)->self.sysdev, |
Alek Du | 3807e26 | 2009-07-14 07:23:29 +0800 | [diff] [blame] | 155 | sizeof(struct ehci_qh_hw), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | 32 /* byte alignment (for hw parts) */, |
| 157 | 4096 /* can't cross 4K */); |
| 158 | if (!ehci->qh_pool) { |
| 159 | goto fail; |
| 160 | } |
| 161 | ehci->async = ehci_qh_alloc (ehci, flags); |
| 162 | if (!ehci->async) { |
| 163 | goto fail; |
| 164 | } |
| 165 | |
| 166 | /* ITD for high speed ISO transfers */ |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 167 | ehci->itd_pool = dma_pool_create ("ehci_itd", |
Peter Chen | 8b373ff | 2017-03-13 10:18:45 +0800 | [diff] [blame] | 168 | ehci_to_hcd(ehci)->self.sysdev, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | sizeof (struct ehci_itd), |
| 170 | 32 /* byte alignment (for hw parts) */, |
| 171 | 4096 /* can't cross 4K */); |
| 172 | if (!ehci->itd_pool) { |
| 173 | goto fail; |
| 174 | } |
| 175 | |
| 176 | /* SITD for full/low speed split ISO transfers */ |
David Brownell | 53bd6a6 | 2006-08-30 14:50:06 -0700 | [diff] [blame] | 177 | ehci->sitd_pool = dma_pool_create ("ehci_sitd", |
Peter Chen | 8b373ff | 2017-03-13 10:18:45 +0800 | [diff] [blame] | 178 | ehci_to_hcd(ehci)->self.sysdev, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | sizeof (struct ehci_sitd), |
| 180 | 32 /* byte alignment (for hw parts) */, |
| 181 | 4096 /* can't cross 4K */); |
| 182 | if (!ehci->sitd_pool) { |
| 183 | goto fail; |
| 184 | } |
| 185 | |
| 186 | /* Hardware periodic table */ |
| 187 | ehci->periodic = (__le32 *) |
Peter Chen | 8b373ff | 2017-03-13 10:18:45 +0800 | [diff] [blame] | 188 | dma_alloc_coherent(ehci_to_hcd(ehci)->self.sysdev, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | ehci->periodic_size * sizeof(__le32), |
Vladimir Zapolskiy | 47c6ae7 | 2014-07-03 17:53:30 +0300 | [diff] [blame] | 190 | &ehci->periodic_dma, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | if (ehci->periodic == NULL) { |
| 192 | goto fail; |
| 193 | } |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 194 | |
| 195 | if (ehci->use_dummy_qh) { |
| 196 | struct ehci_qh_hw *hw; |
| 197 | ehci->dummy = ehci_qh_alloc(ehci, flags); |
| 198 | if (!ehci->dummy) |
| 199 | goto fail; |
| 200 | |
| 201 | hw = ehci->dummy->hw; |
| 202 | hw->hw_next = EHCI_LIST_END(ehci); |
| 203 | hw->hw_qtd_next = EHCI_LIST_END(ehci); |
| 204 | hw->hw_alt_next = EHCI_LIST_END(ehci); |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 205 | ehci->dummy->hw = hw; |
| 206 | |
| 207 | for (i = 0; i < ehci->periodic_size; i++) |
Alan Stern | 4a71f24 | 2013-10-18 11:15:14 -0400 | [diff] [blame] | 208 | ehci->periodic[i] = cpu_to_hc32(ehci, |
| 209 | ehci->dummy->qh_dma); |
Andiry Xu | 3d091a6 | 2010-11-08 17:58:35 +0800 | [diff] [blame] | 210 | } else { |
| 211 | for (i = 0; i < ehci->periodic_size; i++) |
| 212 | ehci->periodic[i] = EHCI_LIST_END(ehci); |
| 213 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | |
| 215 | /* software shadow of hardware table */ |
Eric Sesterhenn | 80b6ca4 | 2006-02-27 21:29:43 +0100 | [diff] [blame] | 216 | ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags); |
| 217 | if (ehci->pshadow != NULL) |
| 218 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | |
| 220 | fail: |
| 221 | ehci_dbg (ehci, "couldn't init memory\n"); |
| 222 | ehci_mem_cleanup (ehci); |
| 223 | return -ENOMEM; |
| 224 | } |