Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Sean Wang | e3fd24a | 2017-12-12 14:24:19 +0800 | [diff] [blame] | 2 | menu "MediaTek pinctrl drivers" |
Arınç ÜNAL | dc6ae20 | 2023-03-18 00:29:54 +0300 | [diff] [blame] | 3 | depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 4 | |
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 5 | config EINT_MTK |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame] | 6 | tristate "MediaTek External Interrupt Support" |
Olof Johansson | 7c68024 | 2018-11-01 19:57:28 -0700 | [diff] [blame] | 7 | depends on PINCTRL_MTK || PINCTRL_MTK_MOORE || PINCTRL_MTK_PARIS || COMPILE_TEST |
Arnd Bergmann | 71a9d39 | 2018-10-08 17:57:43 +0200 | [diff] [blame] | 8 | select GPIOLIB |
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 9 | select IRQ_DOMAIN |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame] | 10 | default y if PINCTRL_MTK || PINCTRL_MTK_MOORE |
| 11 | default PINCTRL_MTK_PARIS |
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 12 | |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 13 | config PINCTRL_MTK |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 14 | bool |
Linus Walleij | b99e6fb | 2015-04-15 10:00:35 +0200 | [diff] [blame] | 15 | depends on OF |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 16 | select PINMUX |
| 17 | select GENERIC_PINCONF |
| 18 | select GPIOLIB |
Sean Wang | e46df23 | 2018-05-21 01:01:48 +0800 | [diff] [blame] | 19 | select EINT_MTK |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 20 | |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame] | 21 | config PINCTRL_MTK_V2 |
| 22 | tristate |
| 23 | |
Arınç ÜNAL | dc6ae20 | 2023-03-18 00:29:54 +0300 | [diff] [blame] | 24 | config PINCTRL_MTK_MTMIPS |
| 25 | bool |
| 26 | depends on RALINK |
| 27 | select PINMUX |
| 28 | select GENERIC_PINCONF |
| 29 | |
Sean Wang | e78d57b | 2018-09-08 19:07:18 +0800 | [diff] [blame] | 30 | config PINCTRL_MTK_MOORE |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 31 | bool |
Sean Wang | e78d57b | 2018-09-08 19:07:18 +0800 | [diff] [blame] | 32 | depends on OF |
| 33 | select GENERIC_PINCONF |
| 34 | select GENERIC_PINCTRL_GROUPS |
| 35 | select GENERIC_PINMUX_FUNCTIONS |
| 36 | select GPIOLIB |
YueHaibing | 8795092 | 2022-04-09 18:59:58 +0800 | [diff] [blame] | 37 | select EINT_MTK |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame] | 38 | select PINCTRL_MTK_V2 |
Sean Wang | e78d57b | 2018-09-08 19:07:18 +0800 | [diff] [blame] | 39 | |
Zhiyong Tao | 8052509 | 2018-09-08 19:07:33 +0800 | [diff] [blame] | 40 | config PINCTRL_MTK_PARIS |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame] | 41 | tristate |
Zhiyong Tao | 8052509 | 2018-09-08 19:07:33 +0800 | [diff] [blame] | 42 | depends on OF |
| 43 | select PINMUX |
| 44 | select GENERIC_PINCONF |
| 45 | select GPIOLIB |
| 46 | select EINT_MTK |
Light Hsieh | 8174a85 | 2020-04-08 04:08:16 +0800 | [diff] [blame] | 47 | select PINCTRL_MTK_V2 |
Zhiyong Tao | 8052509 | 2018-09-08 19:07:33 +0800 | [diff] [blame] | 48 | |
Arınç ÜNAL | dc6ae20 | 2023-03-18 00:29:54 +0300 | [diff] [blame] | 49 | # For MIPS SoCs |
| 50 | config PINCTRL_MT7620 |
| 51 | bool "MediaTek MT7620 pin control" |
| 52 | depends on SOC_MT7620 || COMPILE_TEST |
| 53 | depends on RALINK |
| 54 | default SOC_MT7620 |
| 55 | select PINCTRL_MTK_MTMIPS |
| 56 | |
| 57 | config PINCTRL_MT7621 |
| 58 | bool "MediaTek MT7621 pin control" |
| 59 | depends on SOC_MT7621 || COMPILE_TEST |
| 60 | depends on RALINK |
| 61 | default SOC_MT7621 |
| 62 | select PINCTRL_MTK_MTMIPS |
| 63 | |
| 64 | config PINCTRL_MT76X8 |
| 65 | bool "MediaTek MT76X8 pin control" |
| 66 | depends on SOC_MT7620 || COMPILE_TEST |
| 67 | depends on RALINK |
| 68 | default SOC_MT7620 |
| 69 | select PINCTRL_MTK_MTMIPS |
| 70 | |
| 71 | config PINCTRL_RT2880 |
| 72 | bool "Ralink RT2880 pin control" |
| 73 | depends on SOC_RT288X || COMPILE_TEST |
| 74 | depends on RALINK |
| 75 | default SOC_RT288X |
| 76 | select PINCTRL_MTK_MTMIPS |
| 77 | |
| 78 | config PINCTRL_RT305X |
| 79 | bool "Ralink RT305X pin control" |
| 80 | depends on SOC_RT305X || COMPILE_TEST |
| 81 | depends on RALINK |
| 82 | default SOC_RT305X |
| 83 | select PINCTRL_MTK_MTMIPS |
| 84 | |
| 85 | config PINCTRL_RT3883 |
| 86 | bool "Ralink RT3883 pin control" |
| 87 | depends on SOC_RT3883 || COMPILE_TEST |
| 88 | depends on RALINK |
| 89 | default SOC_RT3883 |
| 90 | select PINCTRL_MTK_MTMIPS |
| 91 | |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 92 | # For ARMv7 SoCs |
Biao Huang | 148b95e | 2016-01-27 09:24:42 +0800 | [diff] [blame] | 93 | config PINCTRL_MT2701 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 94 | bool "MediaTek MT2701 pin control" |
Sean Wang | ceba438 | 2017-05-01 15:54:34 +0800 | [diff] [blame] | 95 | depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST |
Biao Huang | 148b95e | 2016-01-27 09:24:42 +0800 | [diff] [blame] | 96 | depends on OF |
| 97 | default MACH_MT2701 |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 98 | select PINCTRL_MTK |
Biao Huang | 148b95e | 2016-01-27 09:24:42 +0800 | [diff] [blame] | 99 | |
Sean Wang | e7507f5 | 2018-09-08 19:07:28 +0800 | [diff] [blame] | 100 | config PINCTRL_MT7623 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 101 | bool "MediaTek MT7623 pin control with generic binding" |
Sean Wang | e7507f5 | 2018-09-08 19:07:28 +0800 | [diff] [blame] | 102 | depends on MACH_MT7623 || COMPILE_TEST |
Ryder Lee | 2d2d478 | 2019-01-09 10:13:55 +0800 | [diff] [blame] | 103 | depends on OF |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 104 | default MACH_MT7623 |
| 105 | select PINCTRL_MTK_MOORE |
Sean Wang | e7507f5 | 2018-09-08 19:07:28 +0800 | [diff] [blame] | 106 | |
Ryder Lee | b446773 | 2018-11-12 09:45:05 +0800 | [diff] [blame] | 107 | config PINCTRL_MT7629 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 108 | bool "MediaTek MT7629 pin control" |
Ryder Lee | b446773 | 2018-11-12 09:45:05 +0800 | [diff] [blame] | 109 | depends on MACH_MT7629 || COMPILE_TEST |
Ryder Lee | 2d2d478 | 2019-01-09 10:13:55 +0800 | [diff] [blame] | 110 | depends on OF |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 111 | default MACH_MT7629 |
| 112 | select PINCTRL_MTK_MOORE |
Ryder Lee | b446773 | 2018-11-12 09:45:05 +0800 | [diff] [blame] | 113 | |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 114 | config PINCTRL_MT8135 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 115 | bool "MediaTek MT8135 pin control" |
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 116 | depends on MACH_MT8135 || COMPILE_TEST |
Linus Walleij | b99e6fb | 2015-04-15 10:00:35 +0200 | [diff] [blame] | 117 | depends on OF |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 118 | default MACH_MT8135 |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 119 | select PINCTRL_MTK |
Hongzhou Yang | a6df410 | 2015-01-21 13:28:15 +0800 | [diff] [blame] | 120 | |
Yingjoe Chen | 6acdee8 | 2015-05-18 20:01:32 -0700 | [diff] [blame] | 121 | config PINCTRL_MT8127 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 122 | bool "MediaTek MT8127 pin control" |
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 123 | depends on MACH_MT8127 || COMPILE_TEST |
Yingjoe Chen | 6acdee8 | 2015-05-18 20:01:32 -0700 | [diff] [blame] | 124 | depends on OF |
| 125 | default MACH_MT8127 |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 126 | select PINCTRL_MTK |
Yingjoe Chen | 6acdee8 | 2015-05-18 20:01:32 -0700 | [diff] [blame] | 127 | |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 128 | # For ARMv8 SoCs |
Zhiyong Tao | 8670710 | 2018-03-22 10:58:41 +0800 | [diff] [blame] | 129 | config PINCTRL_MT2712 |
| 130 | bool "MediaTek MT2712 pin control" |
| 131 | depends on OF |
| 132 | depends on ARM64 || COMPILE_TEST |
| 133 | default ARM64 && ARCH_MEDIATEK |
| 134 | select PINCTRL_MTK |
| 135 | |
ZH Chen | 477fece | 2018-09-21 12:07:37 +0800 | [diff] [blame] | 136 | config PINCTRL_MT6765 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 137 | tristate "MediaTek MT6765 pin control" |
ZH Chen | 477fece | 2018-09-21 12:07:37 +0800 | [diff] [blame] | 138 | depends on OF |
| 139 | depends on ARM64 || COMPILE_TEST |
| 140 | default ARM64 && ARCH_MEDIATEK |
| 141 | select PINCTRL_MTK_PARIS |
| 142 | |
Hanks Chen | 920e469 | 2020-07-23 19:19:54 +0800 | [diff] [blame] | 143 | config PINCTRL_MT6779 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 144 | tristate "MediaTek MT6779 pin control" |
Hanks Chen | 920e469 | 2020-07-23 19:19:54 +0800 | [diff] [blame] | 145 | depends on OF |
| 146 | depends on ARM64 || COMPILE_TEST |
| 147 | default ARM64 && ARCH_MEDIATEK |
| 148 | select PINCTRL_MTK_PARIS |
| 149 | help |
| 150 | Say yes here to support pin controller and gpio driver |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 151 | on MediaTek MT6779 SoC. |
Hanks Chen | 920e469 | 2020-07-23 19:19:54 +0800 | [diff] [blame] | 152 | In MTK platform, we support virtual gpio and use it to |
| 153 | map specific eint which doesn't have real gpio pin. |
| 154 | |
AngeloGioacchino Del Regno | 2e1ccc6 | 2022-05-17 10:39:57 +0200 | [diff] [blame] | 155 | config PINCTRL_MT6795 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 156 | bool "MediaTek MT6795 pin control" |
AngeloGioacchino Del Regno | 2e1ccc6 | 2022-05-17 10:39:57 +0200 | [diff] [blame] | 157 | depends on OF |
| 158 | depends on ARM64 || COMPILE_TEST |
| 159 | default ARM64 && ARCH_MEDIATEK |
| 160 | select PINCTRL_MTK_PARIS |
| 161 | |
Manivannan Sadhasivam | f969b7a | 2018-11-07 23:18:44 +0530 | [diff] [blame] | 162 | config PINCTRL_MT6797 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 163 | bool "MediaTek MT6797 pin control" |
Manivannan Sadhasivam | f969b7a | 2018-11-07 23:18:44 +0530 | [diff] [blame] | 164 | depends on OF |
| 165 | depends on ARM64 || COMPILE_TEST |
| 166 | default ARM64 && ARCH_MEDIATEK |
| 167 | select PINCTRL_MTK_PARIS |
| 168 | |
Sean Wang | d6ed935 | 2017-12-12 14:24:20 +0800 | [diff] [blame] | 169 | config PINCTRL_MT7622 |
| 170 | bool "MediaTek MT7622 pin control" |
Ryder Lee | 2d2d478 | 2019-01-09 10:13:55 +0800 | [diff] [blame] | 171 | depends on OF |
Sean Wang | d6ed935 | 2017-12-12 14:24:20 +0800 | [diff] [blame] | 172 | depends on ARM64 || COMPILE_TEST |
Ryder Lee | b5af33d | 2018-12-13 10:27:50 +0800 | [diff] [blame] | 173 | default ARM64 && ARCH_MEDIATEK |
| 174 | select PINCTRL_MTK_MOORE |
Sean Wang | d6ed935 | 2017-12-12 14:24:20 +0800 | [diff] [blame] | 175 | |
Daniel Golle | 6c83b2d | 2023-01-26 00:34:56 +0000 | [diff] [blame] | 176 | config PINCTRL_MT7981 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 177 | bool "MediaTek MT7981 pin control" |
Daniel Golle | 6c83b2d | 2023-01-26 00:34:56 +0000 | [diff] [blame] | 178 | depends on OF |
Arınç ÜNAL | c0ad453e | 2023-02-18 09:51:06 +0300 | [diff] [blame] | 179 | depends on ARM64 || COMPILE_TEST |
| 180 | default ARM64 && ARCH_MEDIATEK |
Daniel Golle | 6c83b2d | 2023-01-26 00:34:56 +0000 | [diff] [blame] | 181 | select PINCTRL_MTK_MOORE |
| 182 | |
Sam Shih | 360de67 | 2021-10-22 20:40:34 +0800 | [diff] [blame] | 183 | config PINCTRL_MT7986 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 184 | bool "MediaTek MT7986 pin control" |
Sam Shih | 360de67 | 2021-10-22 20:40:34 +0800 | [diff] [blame] | 185 | depends on OF |
| 186 | depends on ARM64 || COMPILE_TEST |
| 187 | default ARM64 && ARCH_MEDIATEK |
| 188 | select PINCTRL_MTK_MOORE |
| 189 | |
Fabien Parent | 82d70627 | 2020-09-07 13:02:21 +0200 | [diff] [blame] | 190 | config PINCTRL_MT8167 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 191 | bool "MediaTek MT8167 pin control" |
Fabien Parent | 82d70627 | 2020-09-07 13:02:21 +0200 | [diff] [blame] | 192 | depends on OF |
| 193 | depends on ARM64 || COMPILE_TEST |
| 194 | default ARM64 && ARCH_MEDIATEK |
| 195 | select PINCTRL_MTK |
| 196 | |
Hongzhou Yang | 30f010f | 2015-01-27 15:13:55 +0800 | [diff] [blame] | 197 | config PINCTRL_MT8173 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 198 | bool "MediaTek MT8173 pin control" |
Linus Walleij | b99e6fb | 2015-04-15 10:00:35 +0200 | [diff] [blame] | 199 | depends on OF |
Yingjoe Chen | 4a8ade1 | 2015-03-13 22:40:52 +0800 | [diff] [blame] | 200 | depends on ARM64 || COMPILE_TEST |
| 201 | default ARM64 && ARCH_MEDIATEK |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 202 | select PINCTRL_MTK |
Hongzhou Yang | 30f010f | 2015-01-27 15:13:55 +0800 | [diff] [blame] | 203 | |
Zhiyong Tao | 750cd15 | 2018-09-08 19:07:34 +0800 | [diff] [blame] | 204 | config PINCTRL_MT8183 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 205 | bool "MediaTek MT8183 pin control" |
Zhiyong Tao | 750cd15 | 2018-09-08 19:07:34 +0800 | [diff] [blame] | 206 | depends on OF |
| 207 | depends on ARM64 || COMPILE_TEST |
| 208 | default ARM64 && ARCH_MEDIATEK |
| 209 | select PINCTRL_MTK_PARIS |
| 210 | |
Guodong Liu | 8b483bd | 2022-02-16 11:21:23 +0800 | [diff] [blame] | 211 | config PINCTRL_MT8186 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 212 | bool "MediaTek MT8186 pin control" |
Guodong Liu | 8b483bd | 2022-02-16 11:21:23 +0800 | [diff] [blame] | 213 | depends on OF |
| 214 | depends on ARM64 || COMPILE_TEST |
| 215 | default ARM64 && ARCH_MEDIATEK |
| 216 | select PINCTRL_MTK_PARIS |
| 217 | |
Hui.Liu | 11b918d | 2022-08-18 15:50:12 +0800 | [diff] [blame] | 218 | config PINCTRL_MT8188 |
| 219 | bool "MediaTek MT8188 pin control" |
| 220 | depends on OF |
| 221 | depends on ARM64 || COMPILE_TEST |
| 222 | default ARM64 && ARCH_MEDIATEK |
| 223 | select PINCTRL_MTK_PARIS |
| 224 | help |
| 225 | Say yes here to support pin controller and gpio driver |
| 226 | on MediaTek MT8188 SoC. |
| 227 | In MTK platform, we support virtual gpio and use it to |
| 228 | map specific eint which doesn't have real gpio pin. |
| 229 | |
Zhiyong Tao | d32f38f | 2020-08-17 08:17:02 +0800 | [diff] [blame] | 230 | config PINCTRL_MT8192 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 231 | bool "MediaTek MT8192 pin control" |
Zhiyong Tao | d32f38f | 2020-08-17 08:17:02 +0800 | [diff] [blame] | 232 | depends on OF |
| 233 | depends on ARM64 || COMPILE_TEST |
| 234 | default ARM64 && ARCH_MEDIATEK |
| 235 | select PINCTRL_MTK_PARIS |
| 236 | |
Zhiyong Tao | 6cf5e9e | 2021-04-13 13:57:00 +0800 | [diff] [blame] | 237 | config PINCTRL_MT8195 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 238 | bool "MediaTek MT8195 pin control" |
Zhiyong Tao | 6cf5e9e | 2021-04-13 13:57:00 +0800 | [diff] [blame] | 239 | depends on OF |
| 240 | depends on ARM64 || COMPILE_TEST |
Fabien Parent | 931d7fa | 2022-03-27 18:08:13 +0200 | [diff] [blame] | 241 | default ARM64 && ARCH_MEDIATEK |
Zhiyong Tao | 6cf5e9e | 2021-04-13 13:57:00 +0800 | [diff] [blame] | 242 | select PINCTRL_MTK_PARIS |
| 243 | |
Fabien Parent | e94d8b6 | 2021-05-19 18:24:08 +0200 | [diff] [blame] | 244 | config PINCTRL_MT8365 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 245 | bool "MediaTek MT8365 pin control" |
Fabien Parent | e94d8b6 | 2021-05-19 18:24:08 +0200 | [diff] [blame] | 246 | depends on OF |
| 247 | depends on ARM64 || COMPILE_TEST |
| 248 | default ARM64 && ARCH_MEDIATEK |
Linus Walleij | 375eede | 2021-06-07 08:56:20 +0200 | [diff] [blame] | 249 | select PINCTRL_MTK |
Fabien Parent | e94d8b6 | 2021-05-19 18:24:08 +0200 | [diff] [blame] | 250 | |
Fabien Parent | 2646671 | 2019-04-16 10:33:05 +0200 | [diff] [blame] | 251 | config PINCTRL_MT8516 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 252 | bool "MediaTek MT8516 pin control" |
Fabien Parent | 2646671 | 2019-04-16 10:33:05 +0200 | [diff] [blame] | 253 | depends on OF |
| 254 | depends on ARM64 || COMPILE_TEST |
| 255 | default ARM64 && ARCH_MEDIATEK |
| 256 | select PINCTRL_MTK |
| 257 | |
Hongzhou Yang | fc59e66 | 2015-05-18 23:11:17 -0700 | [diff] [blame] | 258 | # For PMIC |
| 259 | config PINCTRL_MT6397 |
Arınç ÜNAL | 6de67ca | 2023-02-18 09:51:07 +0300 | [diff] [blame] | 260 | bool "MediaTek MT6397 pin control" |
Jean Delvare | 79d6208 | 2017-01-25 10:32:09 +0100 | [diff] [blame] | 261 | depends on MFD_MT6397 || COMPILE_TEST |
Linus Walleij | a2202a4 | 2015-05-20 09:11:23 +0200 | [diff] [blame] | 262 | depends on OF |
Hongzhou Yang | fc59e66 | 2015-05-18 23:11:17 -0700 | [diff] [blame] | 263 | default MFD_MT6397 |
Masahiro Yamada | 4a9e006 | 2016-02-10 18:54:32 +0900 | [diff] [blame] | 264 | select PINCTRL_MTK |
Hongzhou Yang | fc59e66 | 2015-05-18 23:11:17 -0700 | [diff] [blame] | 265 | |
Sean Wang | e3fd24a | 2017-12-12 14:24:19 +0800 | [diff] [blame] | 266 | endmenu |