Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015, 2016 Zodiac Inflight Innovations |
| 3 | * |
| 4 | * Based on an original 'vf610-twr.dts' which is Copyright 2015, |
| 5 | * Freescale Semiconductor, Inc. |
| 6 | * |
| 7 | * This file is dual-licensed: you can use it either under the terms |
| 8 | * of the GPL or the X11 license, at your option. Note that this dual |
| 9 | * licensing only applies to this file, and not this project as a |
| 10 | * whole. |
| 11 | * |
| 12 | * a) This file is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License |
| 14 | * version 2 as published by the Free Software Foundation. |
| 15 | * |
| 16 | * This file is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * Or, alternatively, |
| 22 | * |
| 23 | * b) Permission is hereby granted, free of charge, to any person |
| 24 | * obtaining a copy of this software and associated documentation |
| 25 | * files (the "Software"), to deal in the Software without |
| 26 | * restriction, including without limitation the rights to use, |
| 27 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 28 | * sell copies of the Software, and to permit persons to whom the |
| 29 | * Software is furnished to do so, subject to the following |
| 30 | * conditions: |
| 31 | * |
| 32 | * The above copyright notice and this permission notice shall be |
| 33 | * included in all copies or substantial portions of the Software. |
| 34 | * |
| 35 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND, |
| 36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 42 | * OTHER DEALINGS IN THE SOFTWARE. |
| 43 | */ |
| 44 | |
| 45 | #include "vf610.dtsi" |
| 46 | |
| 47 | / { |
| 48 | chosen { |
| 49 | stdout-path = "serial0:115200n8"; |
| 50 | }; |
| 51 | |
Fabio Estevam | 1a2f139 | 2018-03-03 19:40:41 -0300 | [diff] [blame] | 52 | memory@80000000 { |
Fabio Estevam | f535d10 | 2018-11-30 22:44:52 -0200 | [diff] [blame] | 53 | device_type = "memory"; |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 54 | reg = <0x80000000 0x20000000>; |
| 55 | }; |
| 56 | |
| 57 | gpio-leds { |
| 58 | compatible = "gpio-leds"; |
| 59 | pinctrl-0 = <&pinctrl_leds_debug>; |
| 60 | pinctrl-names = "default"; |
| 61 | |
| 62 | debug { |
| 63 | label = "zii:green:debug1"; |
| 64 | gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; |
| 65 | linux,default-trigger = "heartbeat"; |
| 66 | }; |
| 67 | }; |
| 68 | |
| 69 | reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { |
| 70 | compatible = "regulator-fixed"; |
| 71 | regulator-name = "vcc_3v3_mcu"; |
| 72 | regulator-min-microvolt = <3300000>; |
| 73 | regulator-max-microvolt = <3300000>; |
| 74 | }; |
| 75 | |
| 76 | usb0_vbus: regulator-usb0-vbus { |
| 77 | compatible = "regulator-fixed"; |
| 78 | pinctrl-0 = <&pinctrl_usb_vbus>; |
| 79 | regulator-name = "usb_vbus"; |
| 80 | regulator-min-microvolt = <5000000>; |
| 81 | regulator-max-microvolt = <5000000>; |
| 82 | enable-active-high; |
| 83 | regulator-always-on; |
| 84 | regulator-boot-on; |
| 85 | gpio = <&gpio0 6 0>; |
| 86 | }; |
Andrey Smirnov | 6c92d53 | 2020-01-14 07:19:05 -0800 | [diff] [blame] | 87 | |
| 88 | supply-voltage-monitor { |
| 89 | compatible = "iio-hwmon"; |
| 90 | io-channels = <&adc0 8>, /* VCC_1V5 */ |
| 91 | <&adc0 9>, /* VCC_1V8 */ |
| 92 | <&adc1 8>, /* VCC_1V0 */ |
| 93 | <&adc1 9>; /* VCC_1V2 */ |
| 94 | }; |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | &adc0 { |
| 98 | pinctrl-names = "default"; |
| 99 | pinctrl-0 = <&pinctrl_adc0_ad5>; |
| 100 | vref-supply = <®_vcc_3v3_mcu>; |
| 101 | status = "okay"; |
| 102 | }; |
| 103 | |
| 104 | &edma0 { |
| 105 | status = "okay"; |
| 106 | }; |
| 107 | |
Russell King | 2a1c61b | 2017-12-20 23:11:45 +0000 | [diff] [blame] | 108 | &edma1 { |
| 109 | status = "okay"; |
| 110 | }; |
| 111 | |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 112 | &esdhc1 { |
| 113 | pinctrl-names = "default"; |
| 114 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 115 | bus-width = <4>; |
| 116 | status = "okay"; |
| 117 | }; |
| 118 | |
| 119 | &fec0 { |
| 120 | phy-mode = "rmii"; |
| 121 | pinctrl-names = "default"; |
| 122 | pinctrl-0 = <&pinctrl_fec0>; |
| 123 | status = "okay"; |
| 124 | }; |
| 125 | |
| 126 | &fec1 { |
| 127 | phy-mode = "rmii"; |
| 128 | pinctrl-names = "default"; |
| 129 | pinctrl-0 = <&pinctrl_fec1>; |
| 130 | status = "okay"; |
| 131 | |
| 132 | fixed-link { |
| 133 | speed = <100>; |
| 134 | full-duplex; |
| 135 | }; |
| 136 | |
| 137 | mdio1: mdio { |
| 138 | #address-cells = <1>; |
| 139 | #size-cells = <0>; |
| 140 | status = "okay"; |
| 141 | }; |
| 142 | }; |
| 143 | |
| 144 | &i2c0 { |
| 145 | clock-frequency = <100000>; |
| 146 | pinctrl-names = "default", "gpio"; |
| 147 | pinctrl-0 = <&pinctrl_i2c0>; |
| 148 | pinctrl-1 = <&pinctrl_i2c0_gpio>; |
Andrey Smirnov | 1437626 | 2019-04-14 11:35:57 -0700 | [diff] [blame] | 149 | scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 150 | sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
| 151 | status = "okay"; |
| 152 | |
| 153 | lm75@48 { |
| 154 | compatible = "national,lm75"; |
| 155 | reg = <0x48>; |
| 156 | }; |
| 157 | |
Fabio Estevam | 00e3ff8 | 2019-04-03 09:53:14 -0300 | [diff] [blame] | 158 | eeprom@50 { |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 159 | compatible = "atmel,24c04"; |
| 160 | reg = <0x50>; |
| 161 | }; |
| 162 | |
Fabio Estevam | 00e3ff8 | 2019-04-03 09:53:14 -0300 | [diff] [blame] | 163 | eeprom@52 { |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 164 | compatible = "atmel,24c04"; |
| 165 | reg = <0x52>; |
| 166 | }; |
| 167 | |
| 168 | ds1682@6b { |
| 169 | compatible = "dallas,ds1682"; |
| 170 | reg = <0x6b>; |
| 171 | }; |
| 172 | }; |
| 173 | |
| 174 | &i2c1 { |
| 175 | clock-frequency = <100000>; |
| 176 | pinctrl-names = "default"; |
| 177 | pinctrl-0 = <&pinctrl_i2c1>; |
| 178 | status = "okay"; |
| 179 | }; |
| 180 | |
| 181 | &i2c2 { |
| 182 | clock-frequency = <100000>; |
| 183 | pinctrl-names = "default"; |
| 184 | pinctrl-0 = <&pinctrl_i2c2>; |
| 185 | status = "okay"; |
| 186 | }; |
| 187 | |
Andrey Smirnov | af79ef7 | 2019-05-22 00:20:52 -0700 | [diff] [blame] | 188 | &qspi0 { |
| 189 | pinctrl-names = "default"; |
| 190 | pinctrl-0 = <&pinctrl_qspi0>; |
| 191 | status = "okay"; |
| 192 | |
| 193 | /* |
| 194 | * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in STR |
| 195 | * modes, so, spi-max-frequency is limited to 90MHz |
| 196 | */ |
| 197 | flash@0 { |
| 198 | compatible = "jedec,spi-nor"; |
| 199 | #address-cells = <1>; |
| 200 | #size-cells = <1>; |
| 201 | spi-max-frequency = <90000000>; |
| 202 | spi-rx-bus-width = <4>; |
| 203 | reg = <0>; |
| 204 | m25p,fast-read; |
| 205 | }; |
| 206 | |
| 207 | flash@2 { |
| 208 | compatible = "jedec,spi-nor"; |
| 209 | #address-cells = <1>; |
| 210 | #size-cells = <1>; |
| 211 | spi-max-frequency = <90000000>; |
| 212 | spi-rx-bus-width = <4>; |
| 213 | reg = <2>; |
| 214 | m25p,fast-read; |
| 215 | }; |
| 216 | }; |
| 217 | |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 218 | &uart0 { |
| 219 | pinctrl-names = "default"; |
| 220 | pinctrl-0 = <&pinctrl_uart0>; |
| 221 | status = "okay"; |
| 222 | }; |
| 223 | |
| 224 | &uart1 { |
| 225 | pinctrl-names = "default"; |
| 226 | pinctrl-0 = <&pinctrl_uart1>; |
| 227 | status = "okay"; |
| 228 | }; |
| 229 | |
| 230 | &uart2 { |
| 231 | pinctrl-names = "default"; |
| 232 | pinctrl-0 = <&pinctrl_uart2>; |
| 233 | status = "okay"; |
| 234 | }; |
| 235 | |
| 236 | &usbdev0 { |
| 237 | disable-over-current; |
| 238 | vbus-supply = <&usb0_vbus>; |
| 239 | dr_mode = "host"; |
| 240 | status = "okay"; |
| 241 | }; |
| 242 | |
| 243 | &usbh1 { |
| 244 | disable-over-current; |
| 245 | status = "okay"; |
| 246 | }; |
| 247 | |
| 248 | &usbmisc0 { |
| 249 | status = "okay"; |
| 250 | }; |
| 251 | |
| 252 | &usbmisc1 { |
| 253 | status = "okay"; |
| 254 | }; |
| 255 | |
| 256 | &usbphy0 { |
| 257 | status = "okay"; |
| 258 | }; |
| 259 | |
| 260 | &usbphy1 { |
| 261 | status = "okay"; |
| 262 | }; |
| 263 | |
Nikita Yushchenko | e353421 | 2018-05-16 09:39:21 +0300 | [diff] [blame] | 264 | &tempsensor { |
| 265 | io-channels = <&adc0 16>; |
| 266 | }; |
| 267 | |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 268 | &iomuxc { |
| 269 | pinctrl_adc0_ad5: adc0ad5grp { |
| 270 | fsl,pins = < |
| 271 | VF610_PAD_PTC30__ADC0_SE5 0x00a1 |
| 272 | >; |
| 273 | }; |
| 274 | |
| 275 | pinctrl_dspi0: dspi0grp { |
| 276 | fsl,pins = < |
| 277 | VF610_PAD_PTB18__DSPI0_CS1 0x1182 |
| 278 | VF610_PAD_PTB19__DSPI0_CS0 0x1182 |
| 279 | VF610_PAD_PTB20__DSPI0_SIN 0x1181 |
| 280 | VF610_PAD_PTB21__DSPI0_SOUT 0x1182 |
| 281 | VF610_PAD_PTB22__DSPI0_SCK 0x1182 |
| 282 | >; |
| 283 | }; |
| 284 | |
| 285 | pinctrl_dspi2: dspi2grp { |
| 286 | fsl,pins = < |
| 287 | VF610_PAD_PTD31__DSPI2_CS1 0x1182 |
| 288 | VF610_PAD_PTD30__DSPI2_CS0 0x1182 |
| 289 | VF610_PAD_PTD29__DSPI2_SIN 0x1181 |
| 290 | VF610_PAD_PTD28__DSPI2_SOUT 0x1182 |
| 291 | VF610_PAD_PTD27__DSPI2_SCK 0x1182 |
| 292 | >; |
| 293 | }; |
| 294 | |
| 295 | pinctrl_esdhc1: esdhc1grp { |
| 296 | fsl,pins = < |
| 297 | VF610_PAD_PTA24__ESDHC1_CLK 0x31ef |
| 298 | VF610_PAD_PTA25__ESDHC1_CMD 0x31ef |
| 299 | VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef |
| 300 | VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef |
| 301 | VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef |
| 302 | VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef |
| 303 | VF610_PAD_PTA7__GPIO_134 0x219d |
| 304 | >; |
| 305 | }; |
| 306 | |
| 307 | pinctrl_fec0: fec0grp { |
| 308 | fsl,pins = < |
| 309 | VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d2 |
| 310 | VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3 |
| 311 | VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1 |
| 312 | VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1 |
| 313 | VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1 |
| 314 | VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1 |
| 315 | VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2 |
| 316 | VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2 |
| 317 | VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2 |
| 318 | >; |
| 319 | }; |
| 320 | |
| 321 | pinctrl_fec1: fec1grp { |
| 322 | fsl,pins = < |
| 323 | VF610_PAD_PTA6__RMII_CLKIN 0x30d1 |
| 324 | VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |
| 325 | VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 |
| 326 | VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 |
| 327 | VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 |
| 328 | VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 |
| 329 | VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 |
| 330 | VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 |
| 331 | VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 |
| 332 | VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 |
| 333 | >; |
| 334 | }; |
| 335 | |
| 336 | pinctrl_gpio_spi0: pinctrl-gpio-spi0 { |
| 337 | fsl,pins = < |
| 338 | VF610_PAD_PTB22__GPIO_44 0x33e2 |
| 339 | VF610_PAD_PTB21__GPIO_43 0x33e2 |
| 340 | VF610_PAD_PTB20__GPIO_42 0x33e1 |
| 341 | VF610_PAD_PTB19__GPIO_41 0x33e2 |
| 342 | VF610_PAD_PTB18__GPIO_40 0x33e2 |
| 343 | >; |
| 344 | }; |
| 345 | |
Andrew Lunn | 51dab7d | 2017-03-08 03:50:12 +0100 | [diff] [blame] | 346 | pinctrl_gpio_switch0: pinctrl-gpio-switch0 { |
| 347 | fsl,pins = < |
| 348 | VF610_PAD_PTB5__GPIO_27 0x219d |
| 349 | >; |
| 350 | }; |
| 351 | |
| 352 | pinctrl_gpio_switch1: pinctrl-gpio-switch1 { |
| 353 | fsl,pins = < |
| 354 | VF610_PAD_PTB4__GPIO_26 0x219d |
| 355 | >; |
| 356 | }; |
| 357 | |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 358 | pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { |
| 359 | fsl,pins = < |
| 360 | VF610_PAD_PTE14__GPIO_119 0x31c2 |
| 361 | >; |
| 362 | }; |
| 363 | |
| 364 | pinctrl_i2c0: i2c0grp { |
| 365 | fsl,pins = < |
| 366 | VF610_PAD_PTB14__I2C0_SCL 0x37ff |
| 367 | VF610_PAD_PTB15__I2C0_SDA 0x37ff |
| 368 | >; |
| 369 | }; |
| 370 | |
| 371 | pinctrl_i2c0_gpio: i2c0grp-gpio { |
| 372 | fsl,pins = < |
| 373 | VF610_PAD_PTB14__GPIO_36 0x31c2 |
| 374 | VF610_PAD_PTB15__GPIO_37 0x31c2 |
| 375 | >; |
| 376 | }; |
| 377 | |
| 378 | |
| 379 | pinctrl_i2c1: i2c1grp { |
| 380 | fsl,pins = < |
| 381 | VF610_PAD_PTB16__I2C1_SCL 0x37ff |
| 382 | VF610_PAD_PTB17__I2C1_SDA 0x37ff |
| 383 | >; |
| 384 | }; |
| 385 | |
| 386 | pinctrl_i2c2: i2c2grp { |
| 387 | fsl,pins = < |
| 388 | VF610_PAD_PTA22__I2C2_SCL 0x37ff |
| 389 | VF610_PAD_PTA23__I2C2_SDA 0x37ff |
| 390 | >; |
| 391 | }; |
| 392 | |
| 393 | pinctrl_leds_debug: pinctrl-leds-debug { |
| 394 | fsl,pins = < |
| 395 | VF610_PAD_PTD20__GPIO_74 0x31c2 |
| 396 | >; |
| 397 | }; |
| 398 | |
| 399 | pinctrl_qspi0: qspi0grp { |
| 400 | fsl,pins = < |
Andrey Smirnov | af79ef7 | 2019-05-22 00:20:52 -0700 | [diff] [blame] | 401 | VF610_PAD_PTD0__QSPI0_A_QSCK 0x38c2 |
| 402 | VF610_PAD_PTD1__QSPI0_A_CS0 0x38c2 |
| 403 | VF610_PAD_PTD2__QSPI0_A_DATA3 0x38c3 |
| 404 | VF610_PAD_PTD3__QSPI0_A_DATA2 0x38c3 |
| 405 | VF610_PAD_PTD4__QSPI0_A_DATA1 0x38c3 |
| 406 | VF610_PAD_PTD5__QSPI0_A_DATA0 0x38c3 |
| 407 | VF610_PAD_PTD7__QSPI0_B_QSCK 0x38c2 |
| 408 | VF610_PAD_PTD8__QSPI0_B_CS0 0x38c2 |
| 409 | VF610_PAD_PTD9__QSPI0_B_DATA3 0x38c3 |
| 410 | VF610_PAD_PTD10__QSPI0_B_DATA2 0x38c3 |
| 411 | VF610_PAD_PTD11__QSPI0_B_DATA1 0x38c3 |
| 412 | VF610_PAD_PTD12__QSPI0_B_DATA0 0x38c3 |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 413 | >; |
| 414 | }; |
| 415 | |
| 416 | pinctrl_uart0: uart0grp { |
| 417 | fsl,pins = < |
| 418 | VF610_PAD_PTB10__UART0_TX 0x21a2 |
| 419 | VF610_PAD_PTB11__UART0_RX 0x21a1 |
| 420 | >; |
| 421 | }; |
| 422 | |
| 423 | pinctrl_uart1: uart1grp { |
| 424 | fsl,pins = < |
| 425 | VF610_PAD_PTB23__UART1_TX 0x21a2 |
| 426 | VF610_PAD_PTB24__UART1_RX 0x21a1 |
| 427 | >; |
| 428 | }; |
| 429 | |
| 430 | pinctrl_uart2: uart2grp { |
| 431 | fsl,pins = < |
Andrey Smirnov | 36b7ee5 | 2019-05-22 00:20:51 -0700 | [diff] [blame] | 432 | VF610_PAD_PTD23__UART2_TX 0x21a2 |
| 433 | VF610_PAD_PTD22__UART2_RX 0x21a1 |
Andrey Smirnov | d4cd158 | 2017-01-09 23:35:55 -0800 | [diff] [blame] | 434 | >; |
| 435 | }; |
| 436 | |
| 437 | pinctrl_usb_vbus: pinctrl-usb-vbus { |
| 438 | fsl,pins = < |
| 439 | VF610_PAD_PTA16__GPIO_6 0x31c2 |
| 440 | >; |
| 441 | }; |
| 442 | |
| 443 | pinctrl_usb0_host: usb0-host-grp { |
| 444 | fsl,pins = < |
| 445 | VF610_PAD_PTD6__GPIO_85 0x0062 |
| 446 | >; |
| 447 | }; |
| 448 | }; |