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Max Filippove85e3352012-12-03 15:01:43 +04001/*
2 * arch/xtensa/include/asm/xchal_vaddr_remap.h
3 *
4 * Xtensa macros for MMU V3 Support. Deals with re-mapping the Virtual
5 * Memory Addresses from "Virtual == Physical" to their prevvious V2 MMU
6 * mappings (KSEG at 0xD0000000 and KIO at 0XF0000000).
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 * Copyright (C) 2008 - 2012 Tensilica Inc.
13 *
14 * Pete Delaney <piet@tensilica.com>
15 * Marc Gauthier <marc@tensilica.com
16 */
17
18#ifndef _XTENSA_VECTORS_H
19#define _XTENSA_VECTORS_H
20
Max Filippov8f8d5742019-01-01 19:41:55 -080021#include <asm/core.h>
Max Filippovf1883aa2016-04-11 21:07:30 +030022#include <asm/kmem_layout.h>
Max Filippove85e3352012-12-03 15:01:43 +040023
Max Filippov260c64b2015-09-24 23:36:45 +030024#if XCHAL_HAVE_PTP_MMU
Baruch Siach4809bb42013-11-17 08:14:54 +020025#define XCHAL_KIO_CACHED_VADDR 0xe0000000
26#define XCHAL_KIO_BYPASS_VADDR 0xf0000000
Baruch Siach6cb971112013-12-29 11:03:30 +020027#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000
Max Filippov260c64b2015-09-24 23:36:45 +030028#else
29#define XCHAL_KIO_BYPASS_VADDR XCHAL_KIO_PADDR
30#define XCHAL_KIO_DEFAULT_PADDR 0x90000000
31#endif
Baruch Siach4809bb42013-11-17 08:14:54 +020032#define XCHAL_KIO_SIZE 0x10000000
33
Max Filippov260c64b2015-09-24 23:36:45 +030034#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_OF)
Baruch Siach6cb971112013-12-29 11:03:30 +020035#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
Max Filippov260c64b2015-09-24 23:36:45 +030036#ifndef __ASSEMBLY__
37extern unsigned long xtensa_kio_paddr;
38
39static inline unsigned long xtensa_get_kio_paddr(void)
40{
41 return xtensa_kio_paddr;
42}
43#endif
Baruch Siach6cb971112013-12-29 11:03:30 +020044#else
45#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR
46#endif
47
Max Filippove85e3352012-12-03 15:01:43 +040048#if defined(CONFIG_MMU)
49
Max Filippova9f2fc62016-04-13 05:20:02 +030050#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
Max Filippove85e3352012-12-03 15:01:43 +040051/* Image Virtual Start Address */
Max Filippova9f2fc62016-04-13 05:20:02 +030052#define KERNELOFFSET (XCHAL_KSEG_CACHED_VADDR + \
53 CONFIG_KERNEL_LOAD_ADDRESS - \
54 XCHAL_KSEG_PADDR)
Max Filippove85e3352012-12-03 15:01:43 +040055#else
Max Filippova9f2fc62016-04-13 05:20:02 +030056#define KERNELOFFSET CONFIG_KERNEL_LOAD_ADDRESS
Max Filippove85e3352012-12-03 15:01:43 +040057#endif
58
59#else /* !defined(CONFIG_MMU) */
60 /* MMU Not being used - Virtual == Physical */
61
Max Filippova9f2fc62016-04-13 05:20:02 +030062/* Location of the start of the kernel text, _start */
63#define KERNELOFFSET CONFIG_KERNEL_LOAD_ADDRESS
Max Filippove85e3352012-12-03 15:01:43 +040064
Max Filippovab45fb12015-10-16 17:01:04 +030065
Max Filippove85e3352012-12-03 15:01:43 +040066#endif /* CONFIG_MMU */
67
Max Filippova9f2fc62016-04-13 05:20:02 +030068#define RESET_VECTOR1_VADDR (XCHAL_RESET_VECTOR1_VADDR)
Max Filippovb46dcfa2017-01-04 10:40:49 -080069#ifdef CONFIG_VECTORS_OFFSET
Max Filippova9f2fc62016-04-13 05:20:02 +030070#define VECBASE_VADDR (KERNELOFFSET - CONFIG_VECTORS_OFFSET)
Max Filippovb46dcfa2017-01-04 10:40:49 -080071#else
72#define VECBASE_VADDR _vecbase
73#endif
Max Filippove85e3352012-12-03 15:01:43 +040074
Max Filippovf0a34612013-11-18 11:05:52 +040075#if defined(XCHAL_HAVE_VECBASE) && XCHAL_HAVE_VECBASE
Max Filippove85e3352012-12-03 15:01:43 +040076
Max Filippova9f2fc62016-04-13 05:20:02 +030077#define VECTOR_VADDR(offset) (VECBASE_VADDR + offset)
Max Filippove85e3352012-12-03 15:01:43 +040078
Max Filippova9f2fc62016-04-13 05:20:02 +030079#define USER_VECTOR_VADDR VECTOR_VADDR(XCHAL_USER_VECOFS)
80#define KERNEL_VECTOR_VADDR VECTOR_VADDR(XCHAL_KERNEL_VECOFS)
81#define DOUBLEEXC_VECTOR_VADDR VECTOR_VADDR(XCHAL_DOUBLEEXC_VECOFS)
82#define WINDOW_VECTORS_VADDR VECTOR_VADDR(XCHAL_WINDOW_OF4_VECOFS)
83#define INTLEVEL2_VECTOR_VADDR VECTOR_VADDR(XCHAL_INTLEVEL2_VECOFS)
84#define INTLEVEL3_VECTOR_VADDR VECTOR_VADDR(XCHAL_INTLEVEL3_VECOFS)
85#define INTLEVEL4_VECTOR_VADDR VECTOR_VADDR(XCHAL_INTLEVEL4_VECOFS)
86#define INTLEVEL5_VECTOR_VADDR VECTOR_VADDR(XCHAL_INTLEVEL5_VECOFS)
87#define INTLEVEL6_VECTOR_VADDR VECTOR_VADDR(XCHAL_INTLEVEL6_VECOFS)
88#define INTLEVEL7_VECTOR_VADDR VECTOR_VADDR(XCHAL_INTLEVEL7_VECOFS)
89#define DEBUG_VECTOR_VADDR VECTOR_VADDR(XCHAL_DEBUG_VECOFS)
Max Filippove85e3352012-12-03 15:01:43 +040090
91/*
92 * These XCHAL_* #defines from varian/core.h
93 * are not valid to use with V3 MMU. Non-XCHAL
94 * constants are defined above and should be used.
95 */
96#undef XCHAL_VECBASE_RESET_VADDR
Max Filippove85e3352012-12-03 15:01:43 +040097#undef XCHAL_USER_VECTOR_VADDR
98#undef XCHAL_KERNEL_VECTOR_VADDR
99#undef XCHAL_DOUBLEEXC_VECTOR_VADDR
100#undef XCHAL_WINDOW_VECTORS_VADDR
101#undef XCHAL_INTLEVEL2_VECTOR_VADDR
102#undef XCHAL_INTLEVEL3_VECTOR_VADDR
103#undef XCHAL_INTLEVEL4_VECTOR_VADDR
104#undef XCHAL_INTLEVEL5_VECTOR_VADDR
105#undef XCHAL_INTLEVEL6_VECTOR_VADDR
Max Filippove85e3352012-12-03 15:01:43 +0400106#undef XCHAL_INTLEVEL7_VECTOR_VADDR
Max Filippova9f2fc62016-04-13 05:20:02 +0300107#undef XCHAL_DEBUG_VECTOR_VADDR
Max Filippove85e3352012-12-03 15:01:43 +0400108
109#else
110
111#define USER_VECTOR_VADDR XCHAL_USER_VECTOR_VADDR
112#define KERNEL_VECTOR_VADDR XCHAL_KERNEL_VECTOR_VADDR
113#define DOUBLEEXC_VECTOR_VADDR XCHAL_DOUBLEEXC_VECTOR_VADDR
114#define WINDOW_VECTORS_VADDR XCHAL_WINDOW_VECTORS_VADDR
115#define INTLEVEL2_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
116#define INTLEVEL3_VECTOR_VADDR XCHAL_INTLEVEL3_VECTOR_VADDR
117#define INTLEVEL4_VECTOR_VADDR XCHAL_INTLEVEL4_VECTOR_VADDR
118#define INTLEVEL5_VECTOR_VADDR XCHAL_INTLEVEL5_VECTOR_VADDR
119#define INTLEVEL6_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
Max Filippova9f2fc62016-04-13 05:20:02 +0300120#define INTLEVEL7_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
Max Filippove85e3352012-12-03 15:01:43 +0400121#define DEBUG_VECTOR_VADDR XCHAL_DEBUG_VECTOR_VADDR
122
123#endif
124
125#endif /* _XTENSA_VECTORS_H */