Gregory CLEMENT | 4305834 | 2019-02-08 17:09:42 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 2 | /* |
| 3 | * lpc32xx_adc.c - Support for ADC in LPC32XX |
| 4 | * |
| 5 | * 3-channel, 10-bit ADC |
| 6 | * |
| 7 | * Copyright (C) 2011, 2012 Roland Stigge <stigge@antcom.de> |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 8 | */ |
| 9 | |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 10 | #include <linux/clk.h> |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 11 | #include <linux/completion.h> |
Gregory CLEMENT | 1633210 | 2019-03-15 10:52:28 +0100 | [diff] [blame] | 12 | #include <linux/err.h> |
Jonathan Cameron | 06458e2 | 2012-04-25 15:54:58 +0100 | [diff] [blame] | 13 | #include <linux/iio/iio.h> |
Gregory CLEMENT | 1633210 | 2019-03-15 10:52:28 +0100 | [diff] [blame] | 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/io.h> |
Gregory CLEMENT | 1633210 | 2019-03-15 10:52:28 +0100 | [diff] [blame] | 16 | #include <linux/module.h> |
Gregory CLEMENT | 1633210 | 2019-03-15 10:52:28 +0100 | [diff] [blame] | 17 | #include <linux/platform_device.h> |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 18 | #include <linux/regulator/consumer.h> |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * LPC32XX registers definitions |
| 22 | */ |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 23 | #define LPC32XXAD_SELECT(x) ((x) + 0x04) |
| 24 | #define LPC32XXAD_CTRL(x) ((x) + 0x08) |
| 25 | #define LPC32XXAD_VALUE(x) ((x) + 0x48) |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 26 | |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 27 | /* Bit definitions for LPC32XXAD_SELECT: */ |
| 28 | /* constant, always write this value! */ |
| 29 | #define LPC32XXAD_REFm 0x00000200 |
| 30 | /* constant, always write this value! */ |
| 31 | #define LPC32XXAD_REFp 0x00000080 |
| 32 | /* multiple of this is the channel number: 0, 1, 2 */ |
| 33 | #define LPC32XXAD_IN 0x00000010 |
| 34 | /* constant, always write this value! */ |
| 35 | #define LPC32XXAD_INTERNAL 0x00000004 |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 36 | |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 37 | /* Bit definitions for LPC32XXAD_CTRL: */ |
| 38 | #define LPC32XXAD_STROBE 0x00000002 |
| 39 | #define LPC32XXAD_PDN_CTRL 0x00000004 |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 40 | |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 41 | /* Bit definitions for LPC32XXAD_VALUE: */ |
| 42 | #define LPC32XXAD_VALUE_MASK 0x000003FF |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 43 | |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 44 | #define LPC32XXAD_NAME "lpc32xx-adc" |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 45 | |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 46 | struct lpc32xx_adc_state { |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 47 | void __iomem *adc_base; |
| 48 | struct clk *clk; |
| 49 | struct completion completion; |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 50 | struct regulator *vref; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 51 | |
| 52 | u32 value; |
| 53 | }; |
| 54 | |
| 55 | static int lpc32xx_read_raw(struct iio_dev *indio_dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 56 | struct iio_chan_spec const *chan, |
| 57 | int *val, |
| 58 | int *val2, |
| 59 | long mask) |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 60 | { |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 61 | struct lpc32xx_adc_state *st = iio_priv(indio_dev); |
Arvind Yadav | 42d97ac | 2017-05-30 16:35:27 +0530 | [diff] [blame] | 62 | int ret; |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 63 | |
| 64 | switch (mask) { |
| 65 | case IIO_CHAN_INFO_RAW: |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 66 | mutex_lock(&indio_dev->mlock); |
Arvind Yadav | 42d97ac | 2017-05-30 16:35:27 +0530 | [diff] [blame] | 67 | ret = clk_prepare_enable(st->clk); |
| 68 | if (ret) { |
| 69 | mutex_unlock(&indio_dev->mlock); |
| 70 | return ret; |
| 71 | } |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 72 | /* Measurement setup */ |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 73 | __raw_writel(LPC32XXAD_INTERNAL | (chan->address) | |
| 74 | LPC32XXAD_REFp | LPC32XXAD_REFm, |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 75 | LPC32XXAD_SELECT(st->adc_base)); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 76 | /* Trigger conversion */ |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 77 | __raw_writel(LPC32XXAD_PDN_CTRL | LPC32XXAD_STROBE, |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 78 | LPC32XXAD_CTRL(st->adc_base)); |
| 79 | wait_for_completion(&st->completion); /* set by ISR */ |
| 80 | clk_disable_unprepare(st->clk); |
| 81 | *val = st->value; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 82 | mutex_unlock(&indio_dev->mlock); |
| 83 | |
| 84 | return IIO_VAL_INT; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 85 | |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 86 | case IIO_CHAN_INFO_SCALE: |
| 87 | *val = regulator_get_voltage(st->vref) / 1000; |
| 88 | *val2 = 10; |
| 89 | |
| 90 | return IIO_VAL_FRACTIONAL_LOG2; |
| 91 | default: |
| 92 | return -EINVAL; |
| 93 | } |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 94 | } |
| 95 | |
| 96 | static const struct iio_info lpc32xx_adc_iio_info = { |
| 97 | .read_raw = &lpc32xx_read_raw, |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 98 | }; |
| 99 | |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 100 | #define LPC32XX_ADC_CHANNEL_BASE(_index) \ |
Jonathan Cameron | b11f98f | 2012-04-15 17:41:18 +0100 | [diff] [blame] | 101 | .type = IIO_VOLTAGE, \ |
| 102 | .indexed = 1, \ |
| 103 | .channel = _index, \ |
Jonathan Cameron | 066f905 | 2013-03-04 21:10:17 +0000 | [diff] [blame] | 104 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 105 | .address = LPC32XXAD_IN * _index, \ |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 106 | .scan_index = _index, |
| 107 | |
| 108 | #define LPC32XX_ADC_CHANNEL(_index) { \ |
| 109 | LPC32XX_ADC_CHANNEL_BASE(_index) \ |
| 110 | } |
| 111 | |
| 112 | #define LPC32XX_ADC_SCALE_CHANNEL(_index) { \ |
| 113 | LPC32XX_ADC_CHANNEL_BASE(_index) \ |
| 114 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 115 | } |
| 116 | |
Lars-Peter Clausen | f4e4b95 | 2012-08-09 08:51:00 +0100 | [diff] [blame] | 117 | static const struct iio_chan_spec lpc32xx_adc_iio_channels[] = { |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 118 | LPC32XX_ADC_CHANNEL(0), |
| 119 | LPC32XX_ADC_CHANNEL(1), |
| 120 | LPC32XX_ADC_CHANNEL(2), |
| 121 | }; |
| 122 | |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 123 | static const struct iio_chan_spec lpc32xx_adc_iio_scale_channels[] = { |
| 124 | LPC32XX_ADC_SCALE_CHANNEL(0), |
| 125 | LPC32XX_ADC_SCALE_CHANNEL(1), |
| 126 | LPC32XX_ADC_SCALE_CHANNEL(2), |
| 127 | }; |
| 128 | |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 129 | static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id) |
| 130 | { |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 131 | struct lpc32xx_adc_state *st = dev_id; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 132 | |
| 133 | /* Read value and clear irq */ |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 134 | st->value = __raw_readl(LPC32XXAD_VALUE(st->adc_base)) & |
| 135 | LPC32XXAD_VALUE_MASK; |
| 136 | complete(&st->completion); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 137 | |
| 138 | return IRQ_HANDLED; |
| 139 | } |
| 140 | |
Bill Pemberton | 4ae1c61 | 2012-11-19 13:21:57 -0500 | [diff] [blame] | 141 | static int lpc32xx_adc_probe(struct platform_device *pdev) |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 142 | { |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 143 | struct lpc32xx_adc_state *st = NULL; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 144 | struct resource *res; |
| 145 | int retval = -ENODEV; |
| 146 | struct iio_dev *iodev = NULL; |
| 147 | int irq; |
| 148 | |
| 149 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 150 | if (!res) { |
| 151 | dev_err(&pdev->dev, "failed to get platform I/O memory\n"); |
Peng Fan | f6707ef | 2015-08-30 16:12:57 +0800 | [diff] [blame] | 152 | return -ENXIO; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 153 | } |
| 154 | |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 155 | iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); |
Sachin Kamat | 7d456e4 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 156 | if (!iodev) |
| 157 | return -ENOMEM; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 158 | |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 159 | st = iio_priv(iodev); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 160 | |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 161 | st->adc_base = devm_ioremap(&pdev->dev, res->start, |
| 162 | resource_size(res)); |
| 163 | if (!st->adc_base) { |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 164 | dev_err(&pdev->dev, "failed mapping memory\n"); |
Sachin Kamat | 7d456e4 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 165 | return -EBUSY; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 166 | } |
| 167 | |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 168 | st->clk = devm_clk_get(&pdev->dev, NULL); |
| 169 | if (IS_ERR(st->clk)) { |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 170 | dev_err(&pdev->dev, "failed getting clock\n"); |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 171 | return PTR_ERR(st->clk); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 172 | } |
| 173 | |
| 174 | irq = platform_get_irq(pdev, 0); |
Lars-Peter Clausen | 2918ad1 | 2013-10-16 21:45:00 +0100 | [diff] [blame] | 175 | if (irq <= 0) { |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 176 | dev_err(&pdev->dev, "failed getting interrupt resource\n"); |
Peng Fan | f6707ef | 2015-08-30 16:12:57 +0800 | [diff] [blame] | 177 | return -ENXIO; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 178 | } |
| 179 | |
Sachin Kamat | 7d456e4 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 180 | retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0, |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 181 | LPC32XXAD_NAME, st); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 182 | if (retval < 0) { |
| 183 | dev_err(&pdev->dev, "failed requesting interrupt\n"); |
Sachin Kamat | 7d456e4 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 184 | return retval; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 185 | } |
| 186 | |
Gregory CLEMENT | e32cff6 | 2019-03-15 10:52:30 +0100 | [diff] [blame] | 187 | st->vref = devm_regulator_get(&pdev->dev, "vref"); |
| 188 | if (IS_ERR(st->vref)) { |
| 189 | iodev->channels = lpc32xx_adc_iio_channels; |
| 190 | dev_info(&pdev->dev, |
| 191 | "Missing vref regulator: No scaling available\n"); |
| 192 | } else { |
| 193 | iodev->channels = lpc32xx_adc_iio_scale_channels; |
| 194 | } |
| 195 | |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 196 | platform_set_drvdata(pdev, iodev); |
| 197 | |
Jonathan Cameron | 7901b2a | 2017-02-05 13:06:59 +0000 | [diff] [blame] | 198 | init_completion(&st->completion); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 199 | |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 200 | iodev->name = LPC32XXAD_NAME; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 201 | iodev->dev.parent = &pdev->dev; |
| 202 | iodev->info = &lpc32xx_adc_iio_info; |
| 203 | iodev->modes = INDIO_DIRECT_MODE; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 204 | iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels); |
| 205 | |
Sachin Kamat | afb6fd5 | 2013-10-29 11:39:00 +0000 | [diff] [blame] | 206 | retval = devm_iio_device_register(&pdev->dev, iodev); |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 207 | if (retval) |
Sachin Kamat | 7d456e4 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 208 | return retval; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 209 | |
| 210 | dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq); |
| 211 | |
| 212 | return 0; |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 213 | } |
| 214 | |
Roland Stigge | 1f9e349 | 2012-04-21 10:10:16 +0200 | [diff] [blame] | 215 | #ifdef CONFIG_OF |
| 216 | static const struct of_device_id lpc32xx_adc_match[] = { |
| 217 | { .compatible = "nxp,lpc3220-adc" }, |
| 218 | {}, |
| 219 | }; |
| 220 | MODULE_DEVICE_TABLE(of, lpc32xx_adc_match); |
| 221 | #endif |
| 222 | |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 223 | static struct platform_driver lpc32xx_adc_driver = { |
| 224 | .probe = lpc32xx_adc_probe, |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 225 | .driver = { |
Jonathan Cameron | 5023574 | 2017-02-05 13:06:58 +0000 | [diff] [blame] | 226 | .name = LPC32XXAD_NAME, |
Roland Stigge | 1f9e349 | 2012-04-21 10:10:16 +0200 | [diff] [blame] | 227 | .of_match_table = of_match_ptr(lpc32xx_adc_match), |
Roland Stigge | 906ecf6 | 2012-02-14 19:44:56 +0100 | [diff] [blame] | 228 | }, |
| 229 | }; |
| 230 | |
| 231 | module_platform_driver(lpc32xx_adc_driver); |
| 232 | |
| 233 | MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>"); |
| 234 | MODULE_DESCRIPTION("LPC32XX ADC driver"); |
| 235 | MODULE_LICENSE("GPL"); |