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Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +01001/*
2 * CE4100 on Falcon Falls
3 *
4 * (c) Copyright 2010 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
9 */
10/dts-v1/;
11/ {
12 model = "intel,falconfalls";
13 compatible = "intel,falconfalls";
14 #address-cells = <1>;
15 #size-cells = <1>;
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 cpu@0 {
22 device_type = "cpu";
23 compatible = "intel,ce4100";
24 reg = <0>;
25 lapic = <&lapic0>;
26 };
27 };
28
29 soc@0 {
30 #address-cells = <1>;
31 #size-cells = <1>;
32 compatible = "intel,ce4100-cp";
33 ranges;
34
35 ioapic1: interrupt-controller@fec00000 {
36 #interrupt-cells = <2>;
37 compatible = "intel,ce4100-ioapic";
38 interrupt-controller;
39 reg = <0xfec00000 0x1000>;
40 };
41
42 timer@fed00000 {
43 compatible = "intel,ce4100-hpet";
44 reg = <0xfed00000 0x200>;
45 };
46
47 lapic0: interrupt-controller@fee00000 {
48 compatible = "intel,ce4100-lapic";
49 reg = <0xfee00000 0x1000>;
50 };
51
52 pci@3fc {
53 #address-cells = <3>;
54 #size-cells = <2>;
55 compatible = "intel,ce4100-pci", "pci";
56 device_type = "pci";
57 bus-range = <0 0>;
58 ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
59 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
60 0x0000000 0 0x0 0x0 0 0x100>;
61
62 /* Secondary IO-APIC */
63 ioapic2: interrupt-controller@0,1 {
64 #interrupt-cells = <2>;
65 compatible = "intel,ce4100-ioapic";
66 interrupt-controller;
67 reg = <0x100 0x0 0x0 0x0 0x0>;
68 assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
69 };
70
71 pci@1,0 {
72 #address-cells = <3>;
73 #size-cells = <2>;
74 compatible = "intel,ce4100-pci", "pci";
75 device_type = "pci";
76 bus-range = <1 1>;
Sebastian Andrzej Siewior30d746c2011-04-07 14:13:15 +020077 reg = <0x0800 0x0 0x0 0x0 0x0>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +010078 ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
79
80 interrupt-parent = <&ioapic2>;
81
82 display@2,0 {
83 compatible = "pci8086,2e5b.2",
84 "pci8086,2e5b",
85 "pciclass038000",
86 "pciclass0380";
87
88 reg = <0x11000 0x0 0x0 0x0 0x0>;
89 interrupts = <0 1>;
90 };
91
92 multimedia@3,0 {
93 compatible = "pci8086,2e5c.2",
94 "pci8086,2e5c",
95 "pciclass048000",
96 "pciclass0480";
97
98 reg = <0x11800 0x0 0x0 0x0 0x0>;
99 interrupts = <2 1>;
100 };
101
102 multimedia@4,0 {
103 compatible = "pci8086,2e5d.2",
104 "pci8086,2e5d",
105 "pciclass048000",
106 "pciclass0480";
107
108 reg = <0x12000 0x0 0x0 0x0 0x0>;
109 interrupts = <4 1>;
110 };
111
112 multimedia@4,1 {
113 compatible = "pci8086,2e5e.2",
114 "pci8086,2e5e",
115 "pciclass048000",
116 "pciclass0480";
117
118 reg = <0x12100 0x0 0x0 0x0 0x0>;
119 interrupts = <5 1>;
120 };
121
122 sound@6,0 {
123 compatible = "pci8086,2e5f.2",
124 "pci8086,2e5f",
125 "pciclass040100",
126 "pciclass0401";
127
128 reg = <0x13000 0x0 0x0 0x0 0x0>;
129 interrupts = <6 1>;
130 };
131
132 sound@6,1 {
133 compatible = "pci8086,2e5f.2",
134 "pci8086,2e5f",
135 "pciclass040100",
136 "pciclass0401";
137
138 reg = <0x13100 0x0 0x0 0x0 0x0>;
139 interrupts = <7 1>;
140 };
141
142 sound@6,2 {
143 compatible = "pci8086,2e60.2",
144 "pci8086,2e60",
145 "pciclass040100",
146 "pciclass0401";
147
148 reg = <0x13200 0x0 0x0 0x0 0x0>;
149 interrupts = <8 1>;
150 };
151
152 display@8,0 {
153 compatible = "pci8086,2e61.2",
154 "pci8086,2e61",
155 "pciclass038000",
156 "pciclass0380";
157
158 reg = <0x14000 0x0 0x0 0x0 0x0>;
159 interrupts = <9 1>;
160 };
161
162 display@8,1 {
163 compatible = "pci8086,2e62.2",
164 "pci8086,2e62",
165 "pciclass038000",
166 "pciclass0380";
167
168 reg = <0x14100 0x0 0x0 0x0 0x0>;
169 interrupts = <10 1>;
170 };
171
172 multimedia@8,2 {
173 compatible = "pci8086,2e63.2",
174 "pci8086,2e63",
175 "pciclass048000",
176 "pciclass0480";
177
178 reg = <0x14200 0x0 0x0 0x0 0x0>;
179 interrupts = <11 1>;
180 };
181
182 entertainment-encryption@9,0 {
183 compatible = "pci8086,2e64.2",
184 "pci8086,2e64",
185 "pciclass101000",
186 "pciclass1010";
187
188 reg = <0x14800 0x0 0x0 0x0 0x0>;
189 interrupts = <12 1>;
190 };
191
192 localbus@a,0 {
193 compatible = "pci8086,2e65.2",
194 "pci8086,2e65",
195 "pciclassff0000",
196 "pciclassff00";
197
198 reg = <0x15000 0x0 0x0 0x0 0x0>;
199 };
200
201 serial@b,0 {
202 compatible = "pci8086,2e66.2",
203 "pci8086,2e66",
204 "pciclass070003",
205 "pciclass0700";
206
207 reg = <0x15800 0x0 0x0 0x0 0x0>;
208 interrupts = <14 1>;
209 };
210
Sebastian Andrzej Siewiorb43ab902011-06-27 09:26:23 +0200211 pcigpio: gpio@b,1 {
212 #gpio-cells = <2>;
213 #interrupt-cells = <2>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100214 compatible = "pci8086,2e67.2",
215 "pci8086,2e67",
216 "pciclassff0000",
217 "pciclassff00";
218
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100219 reg = <0x15900 0x0 0x0 0x0 0x0>;
220 interrupts = <15 1>;
Sebastian Andrzej Siewiorb43ab902011-06-27 09:26:23 +0200221 interrupt-controller;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100222 gpio-controller;
Sebastian Andrzej Siewiorb43ab902011-06-27 09:26:23 +0200223 intel,muxctl = <0>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100224 };
225
226 i2c-controller@b,2 {
227 #address-cells = <2>;
228 #size-cells = <1>;
229 compatible = "pci8086,2e68.2",
230 "pci8086,2e68",
231 "pciclass,ff0000",
232 "pciclass,ff00";
233
234 reg = <0x15a00 0x0 0x0 0x0 0x0>;
235 interrupts = <16 1>;
236 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
237 1 0 0x02000000 0 0xdffe0600 0x100
238 2 0 0x02000000 0 0xdffe0700 0x100>;
239
240 i2c@0 {
241 #address-cells = <1>;
242 #size-cells = <0>;
243 compatible = "intel,ce4100-i2c-controller";
244 reg = <0 0 0x100>;
245 };
246
247 i2c@1 {
248 #address-cells = <1>;
249 #size-cells = <0>;
250 compatible = "intel,ce4100-i2c-controller";
251 reg = <1 0 0x100>;
252
253 gpio@26 {
254 #gpio-cells = <2>;
255 compatible = "ti,pcf8575";
256 reg = <0x26>;
257 gpio-controller;
258 };
259 };
260
261 i2c@2 {
262 #address-cells = <1>;
263 #size-cells = <0>;
264 compatible = "intel,ce4100-i2c-controller";
265 reg = <2 0 0x100>;
266
267 gpio@26 {
268 #gpio-cells = <2>;
269 compatible = "ti,pcf8575";
270 reg = <0x26>;
271 gpio-controller;
272 };
273 };
274 };
275
276 smard-card@b,3 {
277 compatible = "pci8086,2e69.2",
278 "pci8086,2e69",
279 "pciclass070500",
280 "pciclass0705";
281
282 reg = <0x15b00 0x0 0x0 0x0 0x0>;
283 interrupts = <15 1>;
284 };
285
286 spi-controller@b,4 {
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible =
290 "pci8086,2e6a.2",
291 "pci8086,2e6a",
292 "pciclass,ff0000",
293 "pciclass,ff00";
294
295 reg = <0x15c00 0x0 0x0 0x0 0x0>;
296 interrupts = <15 1>;
297
298 dac@0 {
299 compatible = "ti,pcm1755";
300 reg = <0>;
301 spi-max-frequency = <115200>;
302 };
303
304 dac@1 {
305 compatible = "ti,pcm1609a";
306 reg = <1>;
307 spi-max-frequency = <115200>;
308 };
309
310 eeprom@2 {
311 compatible = "atmel,at93c46";
312 reg = <2>;
313 spi-max-frequency = <115200>;
314 };
315 };
316
317 multimedia@b,7 {
318 compatible = "pci8086,2e6d.2",
319 "pci8086,2e6d",
320 "pciclassff0000",
321 "pciclassff00";
322
323 reg = <0x15f00 0x0 0x0 0x0 0x0>;
324 };
325
326 ethernet@c,0 {
327 compatible = "pci8086,2e6e.2",
328 "pci8086,2e6e",
329 "pciclass020000",
330 "pciclass0200";
331
332 reg = <0x16000 0x0 0x0 0x0 0x0>;
333 interrupts = <21 1>;
334 };
335
336 clock@c,1 {
337 compatible = "pci8086,2e6f.2",
338 "pci8086,2e6f",
339 "pciclassff0000",
340 "pciclassff00";
341
342 reg = <0x16100 0x0 0x0 0x0 0x0>;
343 interrupts = <3 1>;
344 };
345
346 usb@d,0 {
347 compatible = "pci8086,2e70.2",
348 "pci8086,2e70",
349 "pciclass0c0320",
350 "pciclass0c03";
351
352 reg = <0x16800 0x0 0x0 0x0 0x0>;
Sebastian Andrzej Siewior1ff42c32011-04-27 16:30:52 +0200353 interrupts = <22 1>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100354 };
355
356 usb@d,1 {
357 compatible = "pci8086,2e70.2",
358 "pci8086,2e70",
359 "pciclass0c0320",
360 "pciclass0c03";
361
362 reg = <0x16900 0x0 0x0 0x0 0x0>;
Sebastian Andrzej Siewior1ff42c32011-04-27 16:30:52 +0200363 interrupts = <22 1>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100364 };
365
366 sata@e,0 {
367 compatible = "pci8086,2e71.0",
368 "pci8086,2e71",
369 "pciclass010601",
370 "pciclass0106";
371
372 reg = <0x17000 0x0 0x0 0x0 0x0>;
Sebastian Andrzej Siewior1ff42c32011-04-27 16:30:52 +0200373 interrupts = <23 1>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100374 };
375
376 flash@f,0 {
377 compatible = "pci8086,701.1",
378 "pci8086,701",
379 "pciclass050100",
380 "pciclass0501";
381
382 reg = <0x17800 0x0 0x0 0x0 0x0>;
383 interrupts = <13 1>;
384 };
385
386 entertainment-encryption@10,0 {
387 compatible = "pci8086,702.1",
388 "pci8086,702",
389 "pciclass101000",
390 "pciclass1010";
391
392 reg = <0x18000 0x0 0x0 0x0 0x0>;
393 };
394
395 co-processor@11,0 {
396 compatible = "pci8086,703.1",
397 "pci8086,703",
398 "pciclass0b4000",
399 "pciclass0b40";
400
401 reg = <0x18800 0x0 0x0 0x0 0x0>;
402 interrupts = <1 1>;
403 };
404
405 multimedia@12,0 {
406 compatible = "pci8086,704.0",
407 "pci8086,704",
408 "pciclass048000",
409 "pciclass0480";
410
411 reg = <0x19000 0x0 0x0 0x0 0x0>;
412 };
413 };
414
415 isa@1f,0 {
416 #address-cells = <2>;
417 #size-cells = <1>;
418 compatible = "isa";
Sebastian Andrzej Siewior30d746c2011-04-07 14:13:15 +0200419 reg = <0xf800 0x0 0x0 0x0 0x0>;
Sebastian Andrzej Siewiordf2634f2011-02-22 21:07:38 +0100420 ranges = <1 0 0 0 0 0x100>;
421
422 rtc@70 {
423 compatible = "intel,ce4100-rtc", "motorola,mc146818";
424 interrupts = <8 3>;
425 interrupt-parent = <&ioapic1>;
426 ctrl-reg = <2>;
427 freq-reg = <0x26>;
428 reg = <1 0x70 2>;
429 };
430 };
431 };
432 };
433};