blob: 4d3c6991f0aedee0003e285d9050c42108d8aab4 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
3 * iommu.c: IOMMU specific routines for memory management.
4 *
5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6 * Copyright (C) 1995,2002 Pete Zaitcev (zaitcev@yahoo.com)
7 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
8 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
9 */
10
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/mm.h>
14#include <linux/slab.h>
15#include <linux/highmem.h> /* pte_offset_map => kmap_atomic */
Christoph Hellwigce65d362018-12-03 14:04:32 +010016#include <linux/dma-mapping.h>
David S. Miller9dc69232008-08-27 19:54:01 -070017#include <linux/of.h>
18#include <linux/of_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/pgalloc.h>
21#include <asm/pgtable.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <asm/io.h>
23#include <asm/mxcc.h>
24#include <asm/mbus.h>
25#include <asm/cacheflush.h>
26#include <asm/tlbflush.h>
27#include <asm/bitext.h>
28#include <asm/iommu.h>
29#include <asm/dma.h>
30
Sam Ravnborge8c29c82014-04-21 21:39:19 +020031#include "mm_32.h"
32
Linus Torvalds1da177e2005-04-16 15:20:36 -070033/*
34 * This can be sized dynamically, but we will do this
35 * only when we have a guidance about actual I/O pressures.
36 */
37#define IOMMU_RNGE IOMMU_RNGE_256MB
38#define IOMMU_START 0xF0000000
39#define IOMMU_WINSIZE (256*1024*1024U)
Akinobu Mita9a0ac1b2013-03-29 03:44:44 +000040#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 256KB */
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#define IOMMU_ORDER 6 /* 4096 * (1<<6) */
42
Linus Torvalds1da177e2005-04-16 15:20:36 -070043static int viking_flush;
44/* viking.S */
45extern void viking_flush_page(unsigned long page);
46extern void viking_mxcc_flush_page(unsigned long page);
47
48/*
49 * Values precomputed according to CPU type.
50 */
51static unsigned int ioperm_noc; /* Consistent mapping iopte flags */
52static pgprot_t dvma_prot; /* Consistent mapping pte flags */
53
54#define IOPERM (IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID)
55#define MKIOPTE(pfn, perm) (((((pfn)<<8) & IOPTE_PAGE) | (perm)) & ~IOPTE_WAZ)
56
Grant Likelycd4cd732010-07-22 16:04:30 -060057static void __init sbus_iommu_init(struct platform_device *op)
Linus Torvalds1da177e2005-04-16 15:20:36 -070058{
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 struct iommu_struct *iommu;
David S. Millere0039342008-08-25 22:47:20 -070060 unsigned int impl, vers;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 unsigned long *bitmap;
Sam Ravnborgf977ea42014-05-16 23:25:40 +020062 unsigned long control;
63 unsigned long base;
David S. Millere0039342008-08-25 22:47:20 -070064 unsigned long tmp;
65
Julia Lawall71cd03b2010-08-02 16:04:21 -070066 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 if (!iommu) {
68 prom_printf("Unable to allocate iommu structure\n");
69 prom_halt();
70 }
David S. Millere0039342008-08-25 22:47:20 -070071
David S. Miller046e26a2008-08-27 04:54:04 -070072 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3,
David S. Millere0039342008-08-25 22:47:20 -070073 "iommu_regs");
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 if (!iommu->regs) {
75 prom_printf("Cannot map IOMMU registers\n");
76 prom_halt();
77 }
Sam Ravnborgf977ea42014-05-16 23:25:40 +020078
79 control = sbus_readl(&iommu->regs->control);
80 impl = (control & IOMMU_CTRL_IMPL) >> 28;
81 vers = (control & IOMMU_CTRL_VERS) >> 24;
82 control &= ~(IOMMU_CTRL_RNGE);
83 control |= (IOMMU_RNGE_256MB | IOMMU_CTRL_ENAB);
84 sbus_writel(control, &iommu->regs->control);
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 iommu_invalidate(iommu->regs);
87 iommu->start = IOMMU_START;
88 iommu->end = 0xffffffff;
89
90 /* Allocate IOMMU page table */
91 /* Stupid alignment constraints give me a headache.
92 We need 256K or 512K or 1M or 2M area aligned to
93 its size and current gfp will fortunately give
94 it to us. */
95 tmp = __get_free_pages(GFP_KERNEL, IOMMU_ORDER);
96 if (!tmp) {
Akinobu Mita5da444a2012-09-29 03:14:49 +000097 prom_printf("Unable to allocate iommu table [0x%lx]\n",
98 IOMMU_NPTES * sizeof(iopte_t));
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 prom_halt();
100 }
101 iommu->page_table = (iopte_t *)tmp;
102
103 /* Initialize new table. */
104 memset(iommu->page_table, 0, IOMMU_NPTES*sizeof(iopte_t));
105 flush_cache_all();
106 flush_tlb_all();
Sam Ravnborgf977ea42014-05-16 23:25:40 +0200107
108 base = __pa((unsigned long)iommu->page_table) >> 4;
109 sbus_writel(base, &iommu->regs->base);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 iommu_invalidate(iommu->regs);
111
112 bitmap = kmalloc(IOMMU_NPTES>>3, GFP_KERNEL);
113 if (!bitmap) {
114 prom_printf("Unable to allocate iommu bitmap [%d]\n",
115 (int)(IOMMU_NPTES>>3));
116 prom_halt();
117 }
118 bit_map_init(&iommu->usemap, bitmap, IOMMU_NPTES);
119 /* To be coherent on HyperSparc, the page color of DVMA
120 * and physical addresses must match.
121 */
122 if (srmmu_modtype == HyperSparc)
123 iommu->usemap.num_colors = vac_cache_size >> PAGE_SHIFT;
124 else
125 iommu->usemap.num_colors = 1;
126
David S. Miller046e26a2008-08-27 04:54:04 -0700127 printk(KERN_INFO "IOMMU: impl %d vers %d table 0x%p[%d B] map [%d b]\n",
128 impl, vers, iommu->page_table,
129 (int)(IOMMU_NPTES*sizeof(iopte_t)), (int)IOMMU_NPTES);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130
David S. Millere0039342008-08-25 22:47:20 -0700131 op->dev.archdata.iommu = iommu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132}
133
David S. Miller046e26a2008-08-27 04:54:04 -0700134static int __init iommu_init(void)
135{
136 struct device_node *dp;
137
138 for_each_node_by_name(dp, "iommu") {
Grant Likelycd4cd732010-07-22 16:04:30 -0600139 struct platform_device *op = of_find_device_by_node(dp);
David S. Miller046e26a2008-08-27 04:54:04 -0700140
141 sbus_iommu_init(op);
142 of_propagate_archdata(op);
143 }
144
145 return 0;
146}
147
148subsys_initcall(iommu_init);
149
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150/* Flush the iotlb entries to ram. */
151/* This could be better if we didn't have to flush whole pages. */
152static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte)
153{
154 unsigned long start;
155 unsigned long end;
156
Bob Breuer3185d4d2006-06-20 00:36:56 -0700157 start = (unsigned long)iopte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 end = PAGE_ALIGN(start + niopte*sizeof(iopte_t));
Bob Breuer3185d4d2006-06-20 00:36:56 -0700159 start &= PAGE_MASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 if (viking_mxcc_present) {
161 while(start < end) {
162 viking_mxcc_flush_page(start);
163 start += PAGE_SIZE;
164 }
165 } else if (viking_flush) {
166 while(start < end) {
167 viking_flush_page(start);
168 start += PAGE_SIZE;
169 }
170 } else {
171 while(start < end) {
172 __flush_page_to_ram(start);
173 start += PAGE_SIZE;
174 }
175 }
176}
177
Christoph Hellwig376b1372019-04-16 20:23:47 +0200178static dma_addr_t __sbus_iommu_map_page(struct device *dev, struct page *page,
179 unsigned long offset, size_t len, bool per_page_flush)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180{
David S. Miller260489f2008-08-26 23:00:58 -0700181 struct iommu_struct *iommu = dev->archdata.iommu;
Christoph Hellwig376b1372019-04-16 20:23:47 +0200182 phys_addr_t paddr = page_to_phys(page) + offset;
183 unsigned long off = paddr & ~PAGE_MASK;
184 unsigned long npages = (off + len + PAGE_SIZE - 1) >> PAGE_SHIFT;
Christoph Hellwigb8205942019-04-16 20:23:43 +0200185 unsigned long pfn = __phys_to_pfn(paddr);
Christoph Hellwig376b1372019-04-16 20:23:47 +0200186 unsigned int busa, busa0;
187 iopte_t *iopte, *iopte0;
188 int ioptex, i;
189
190 /* XXX So what is maxphys for us and how do drivers know it? */
191 if (!len || len > 256 * 1024)
192 return DMA_MAPPING_ERROR;
193
194 /*
195 * We expect unmapped highmem pages to be not in the cache.
196 * XXX Is this a good assumption?
197 * XXX What if someone else unmaps it here and races us?
198 */
199 if (per_page_flush && !PageHighMem(page)) {
200 unsigned long vaddr, p;
201
202 vaddr = (unsigned long)page_address(page) + offset;
203 for (p = vaddr & PAGE_MASK; p < vaddr + len; p += PAGE_SIZE)
204 flush_page_for_dma(p);
205 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206
207 /* page color = pfn of page */
Christoph Hellwigb8205942019-04-16 20:23:43 +0200208 ioptex = bit_map_string_get(&iommu->usemap, npages, pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 if (ioptex < 0)
210 panic("iommu out");
211 busa0 = iommu->start + (ioptex << PAGE_SHIFT);
212 iopte0 = &iommu->page_table[ioptex];
213
214 busa = busa0;
215 iopte = iopte0;
216 for (i = 0; i < npages; i++) {
Christoph Hellwigb8205942019-04-16 20:23:43 +0200217 iopte_val(*iopte) = MKIOPTE(pfn, IOPERM);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 iommu_invalidate_page(iommu->regs, busa);
219 busa += PAGE_SIZE;
220 iopte++;
Christoph Hellwigb8205942019-04-16 20:23:43 +0200221 pfn++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 }
223
224 iommu_flush_iotlb(iopte0, npages);
Christoph Hellwig376b1372019-04-16 20:23:47 +0200225 return busa0 + off;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
Christoph Hellwigce65d362018-12-03 14:04:32 +0100228static dma_addr_t sbus_iommu_map_page_gflush(struct device *dev,
229 struct page *page, unsigned long offset, size_t len,
230 enum dma_data_direction dir, unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231{
232 flush_page_for_dma(0);
Christoph Hellwig8668b382019-04-16 20:23:44 +0200233 return __sbus_iommu_map_page(dev, page, offset, len, false);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234}
235
Christoph Hellwigce65d362018-12-03 14:04:32 +0100236static dma_addr_t sbus_iommu_map_page_pflush(struct device *dev,
237 struct page *page, unsigned long offset, size_t len,
238 enum dma_data_direction dir, unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239{
Christoph Hellwig8668b382019-04-16 20:23:44 +0200240 return __sbus_iommu_map_page(dev, page, offset, len, true);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241}
242
Christoph Hellwigff5cbec2019-04-16 20:23:42 +0200243static int __sbus_iommu_map_sg(struct device *dev, struct scatterlist *sgl,
244 int nents, enum dma_data_direction dir, unsigned long attrs,
245 bool per_page_flush)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246{
Christoph Hellwig6c503d02018-12-16 10:23:28 +0100247 struct scatterlist *sg;
Christoph Hellwigedb1f072019-04-16 20:23:46 +0200248 int j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249
Christoph Hellwig6c503d02018-12-16 10:23:28 +0100250 for_each_sg(sgl, sg, nents, j) {
Christoph Hellwigedb1f072019-04-16 20:23:46 +0200251 sg->dma_address =__sbus_iommu_map_page(dev, sg_page(sg),
252 sg->offset, sg->length, per_page_flush);
253 if (sg->dma_address == DMA_MAPPING_ERROR)
254 return 0;
Robert Reifaa83a262008-12-11 20:24:58 -0800255 sg->dma_length = sg->length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 }
Christoph Hellwigce65d362018-12-03 14:04:32 +0100257
Christoph Hellwig6c503d02018-12-16 10:23:28 +0100258 return nents;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259}
260
Christoph Hellwigff5cbec2019-04-16 20:23:42 +0200261static int sbus_iommu_map_sg_gflush(struct device *dev, struct scatterlist *sgl,
262 int nents, enum dma_data_direction dir, unsigned long attrs)
263{
264 flush_page_for_dma(0);
265 return __sbus_iommu_map_sg(dev, sgl, nents, dir, attrs, false);
266}
267
268static int sbus_iommu_map_sg_pflush(struct device *dev, struct scatterlist *sgl,
269 int nents, enum dma_data_direction dir, unsigned long attrs)
270{
271 return __sbus_iommu_map_sg(dev, sgl, nents, dir, attrs, true);
272}
273
Christoph Hellwigf25b23b2019-04-16 20:23:41 +0200274static void sbus_iommu_unmap_page(struct device *dev, dma_addr_t dma_addr,
275 size_t len, enum dma_data_direction dir, unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276{
David S. Miller260489f2008-08-26 23:00:58 -0700277 struct iommu_struct *iommu = dev->archdata.iommu;
Christoph Hellwigf25b23b2019-04-16 20:23:41 +0200278 unsigned int busa = dma_addr & PAGE_MASK;
279 unsigned long off = dma_addr & ~PAGE_MASK;
280 unsigned int npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT;
281 unsigned int ioptex = (busa - iommu->start) >> PAGE_SHIFT;
282 unsigned int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283
Eric Sesterhenn1ae61382006-01-17 15:36:05 -0800284 BUG_ON(busa < iommu->start);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285 for (i = 0; i < npages; i++) {
286 iopte_val(iommu->page_table[ioptex + i]) = 0;
287 iommu_invalidate_page(iommu->regs, busa);
288 busa += PAGE_SIZE;
289 }
290 bit_map_clear(&iommu->usemap, ioptex, npages);
291}
292
Christoph Hellwig6c503d02018-12-16 10:23:28 +0100293static void sbus_iommu_unmap_sg(struct device *dev, struct scatterlist *sgl,
294 int nents, enum dma_data_direction dir, unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295{
Christoph Hellwig6c503d02018-12-16 10:23:28 +0100296 struct scatterlist *sg;
Christoph Hellwiga7fce1f2019-04-16 20:23:40 +0200297 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298
Christoph Hellwig6c503d02018-12-16 10:23:28 +0100299 for_each_sg(sgl, sg, nents, i) {
Christoph Hellwiga7fce1f2019-04-16 20:23:40 +0200300 sbus_iommu_unmap_page(dev, sg->dma_address, sg->length, dir,
301 attrs);
Robert Reifaa83a262008-12-11 20:24:58 -0800302 sg->dma_address = 0x21212121;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303 }
304}
305
306#ifdef CONFIG_SBUS
Christoph Hellwigce65d362018-12-03 14:04:32 +0100307static void *sbus_iommu_alloc(struct device *dev, size_t len,
308 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309{
David S. Miller4b1c5df2008-08-27 18:40:38 -0700310 struct iommu_struct *iommu = dev->archdata.iommu;
Christoph Hellwigce65d362018-12-03 14:04:32 +0100311 unsigned long va, addr, page, end, ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 iopte_t *iopte = iommu->page_table;
313 iopte_t *first;
314 int ioptex;
315
Christoph Hellwigce65d362018-12-03 14:04:32 +0100316 /* XXX So what is maxphys for us and how do drivers know it? */
317 if (!len || len > 256 * 1024)
318 return NULL;
319
320 len = PAGE_ALIGN(len);
Christoph Hellwig518a2f12018-12-14 09:00:40 +0100321 va = __get_free_pages(gfp | __GFP_ZERO, get_order(len));
Christoph Hellwigce65d362018-12-03 14:04:32 +0100322 if (va == 0)
323 return NULL;
324
325 addr = ret = sparc_dma_alloc_resource(dev, len);
326 if (!addr)
327 goto out_free_pages;
328
Eric Sesterhenn1ae61382006-01-17 15:36:05 -0800329 BUG_ON((va & ~PAGE_MASK) != 0);
330 BUG_ON((addr & ~PAGE_MASK) != 0);
331 BUG_ON((len & ~PAGE_MASK) != 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332
333 /* page color = physical address */
334 ioptex = bit_map_string_get(&iommu->usemap, len >> PAGE_SHIFT,
335 addr >> PAGE_SHIFT);
336 if (ioptex < 0)
337 panic("iommu out");
338
339 iopte += ioptex;
340 first = iopte;
341 end = addr + len;
342 while(addr < end) {
343 page = va;
344 {
345 pgd_t *pgdp;
Mike Rapoport7235db22019-12-04 16:54:20 -0800346 p4d_t *p4dp;
347 pud_t *pudp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 pmd_t *pmdp;
349 pte_t *ptep;
350
351 if (viking_mxcc_present)
352 viking_mxcc_flush_page(page);
353 else if (viking_flush)
354 viking_flush_page(page);
355 else
356 __flush_page_to_ram(page);
357
358 pgdp = pgd_offset(&init_mm, addr);
Mike Rapoport7235db22019-12-04 16:54:20 -0800359 p4dp = p4d_offset(pgdp, addr);
360 pudp = pud_offset(p4dp, addr);
361 pmdp = pmd_offset(pudp, addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362 ptep = pte_offset_map(pmdp, addr);
363
364 set_pte(ptep, mk_pte(virt_to_page(page), dvma_prot));
365 }
366 iopte_val(*iopte++) =
367 MKIOPTE(page_to_pfn(virt_to_page(page)), ioperm_noc);
368 addr += PAGE_SIZE;
369 va += PAGE_SIZE;
370 }
371 /* P3: why do we need this?
372 *
373 * DAVEM: Because there are several aspects, none of which
374 * are handled by a single interface. Some cpus are
375 * completely not I/O DMA coherent, and some have
376 * virtually indexed caches. The driver DMA flushing
377 * methods handle the former case, but here during
378 * IOMMU page table modifications, and usage of non-cacheable
379 * cpu mappings of pages potentially in the cpu caches, we have
380 * to handle the latter case as well.
381 */
382 flush_cache_all();
383 iommu_flush_iotlb(first, len >> PAGE_SHIFT);
384 flush_tlb_all();
385 iommu_invalidate(iommu->regs);
386
Christoph Hellwigce65d362018-12-03 14:04:32 +0100387 *dma_handle = iommu->start + (ioptex << PAGE_SHIFT);
388 return (void *)ret;
389
390out_free_pages:
391 free_pages(va, get_order(len));
392 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393}
394
Christoph Hellwigce65d362018-12-03 14:04:32 +0100395static void sbus_iommu_free(struct device *dev, size_t len, void *cpu_addr,
396 dma_addr_t busa, unsigned long attrs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397{
David S. Miller4b1c5df2008-08-27 18:40:38 -0700398 struct iommu_struct *iommu = dev->archdata.iommu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 iopte_t *iopte = iommu->page_table;
Christoph Hellwigce65d362018-12-03 14:04:32 +0100400 struct page *page = virt_to_page(cpu_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 int ioptex = (busa - iommu->start) >> PAGE_SHIFT;
Christoph Hellwigce65d362018-12-03 14:04:32 +0100402 unsigned long end;
403
404 if (!sparc_dma_free_resource(cpu_addr, len))
405 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406
Eric Sesterhenn1ae61382006-01-17 15:36:05 -0800407 BUG_ON((busa & ~PAGE_MASK) != 0);
408 BUG_ON((len & ~PAGE_MASK) != 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409
410 iopte += ioptex;
411 end = busa + len;
412 while (busa < end) {
413 iopte_val(*iopte++) = 0;
414 busa += PAGE_SIZE;
415 }
416 flush_tlb_all();
417 iommu_invalidate(iommu->regs);
418 bit_map_clear(&iommu->usemap, ioptex, len >> PAGE_SHIFT);
Christoph Hellwigce65d362018-12-03 14:04:32 +0100419
420 __free_pages(page, get_order(len));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422#endif
423
Christoph Hellwigce65d362018-12-03 14:04:32 +0100424static const struct dma_map_ops sbus_iommu_dma_gflush_ops = {
David S. Millerd894d962012-05-13 13:57:05 -0700425#ifdef CONFIG_SBUS
Christoph Hellwigce65d362018-12-03 14:04:32 +0100426 .alloc = sbus_iommu_alloc,
427 .free = sbus_iommu_free,
David S. Millerd894d962012-05-13 13:57:05 -0700428#endif
Christoph Hellwigce65d362018-12-03 14:04:32 +0100429 .map_page = sbus_iommu_map_page_gflush,
430 .unmap_page = sbus_iommu_unmap_page,
431 .map_sg = sbus_iommu_map_sg_gflush,
432 .unmap_sg = sbus_iommu_unmap_sg,
David S. Millerd894d962012-05-13 13:57:05 -0700433};
434
Christoph Hellwigce65d362018-12-03 14:04:32 +0100435static const struct dma_map_ops sbus_iommu_dma_pflush_ops = {
David S. Millerd894d962012-05-13 13:57:05 -0700436#ifdef CONFIG_SBUS
Christoph Hellwigce65d362018-12-03 14:04:32 +0100437 .alloc = sbus_iommu_alloc,
438 .free = sbus_iommu_free,
David S. Millerd894d962012-05-13 13:57:05 -0700439#endif
Christoph Hellwigce65d362018-12-03 14:04:32 +0100440 .map_page = sbus_iommu_map_page_pflush,
441 .unmap_page = sbus_iommu_unmap_page,
442 .map_sg = sbus_iommu_map_sg_pflush,
443 .unmap_sg = sbus_iommu_unmap_sg,
David S. Millerd894d962012-05-13 13:57:05 -0700444};
445
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446void __init ld_mmu_iommu(void)
447{
David S. Miller5d83d662012-05-13 20:49:31 -0700448 if (flush_page_for_dma_global) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 /* flush_page_for_dma flushes everything, no matter of what page is it */
Christoph Hellwigce65d362018-12-03 14:04:32 +0100450 dma_ops = &sbus_iommu_dma_gflush_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451 } else {
Christoph Hellwigce65d362018-12-03 14:04:32 +0100452 dma_ops = &sbus_iommu_dma_pflush_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454
455 if (viking_mxcc_present || srmmu_modtype == HyperSparc) {
456 dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV);
457 ioperm_noc = IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID;
458 } else {
459 dvma_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV);
460 ioperm_noc = IOPTE_WRITE | IOPTE_VALID;
461 }
462}