Jani Nikula | 440e2b3 | 2019-04-29 15:29:27 +0300 | [diff] [blame] | 1 | /* SPDX-License-Identifier: MIT */ |
| 2 | /* |
| 3 | * Copyright © 2019 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #ifndef __I915_IRQ_H__ |
| 7 | #define __I915_IRQ_H__ |
| 8 | |
| 9 | #include <linux/types.h> |
| 10 | |
| 11 | #include "i915_drv.h" |
| 12 | |
| 13 | struct drm_i915_private; |
| 14 | struct intel_crtc; |
| 15 | |
| 16 | extern void intel_irq_init(struct drm_i915_private *dev_priv); |
| 17 | extern void intel_irq_fini(struct drm_i915_private *dev_priv); |
| 18 | int intel_irq_install(struct drm_i915_private *dev_priv); |
| 19 | void intel_irq_uninstall(struct drm_i915_private *dev_priv); |
| 20 | |
| 21 | u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv, |
| 22 | enum pipe pipe); |
| 23 | void |
| 24 | i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe, |
| 25 | u32 status_mask); |
| 26 | |
| 27 | void |
| 28 | i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe, |
| 29 | u32 status_mask); |
| 30 | |
| 31 | void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv); |
| 32 | void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv); |
| 33 | |
| 34 | void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv, |
| 35 | u32 mask, |
| 36 | u32 bits); |
| 37 | void ilk_update_display_irq(struct drm_i915_private *dev_priv, |
| 38 | u32 interrupt_mask, |
| 39 | u32 enabled_irq_mask); |
| 40 | static inline void |
| 41 | ilk_enable_display_irq(struct drm_i915_private *dev_priv, u32 bits) |
| 42 | { |
| 43 | ilk_update_display_irq(dev_priv, bits, bits); |
| 44 | } |
| 45 | static inline void |
| 46 | ilk_disable_display_irq(struct drm_i915_private *dev_priv, u32 bits) |
| 47 | { |
| 48 | ilk_update_display_irq(dev_priv, bits, 0); |
| 49 | } |
| 50 | void bdw_update_pipe_irq(struct drm_i915_private *dev_priv, |
| 51 | enum pipe pipe, |
| 52 | u32 interrupt_mask, |
| 53 | u32 enabled_irq_mask); |
| 54 | static inline void bdw_enable_pipe_irq(struct drm_i915_private *dev_priv, |
| 55 | enum pipe pipe, u32 bits) |
| 56 | { |
| 57 | bdw_update_pipe_irq(dev_priv, pipe, bits, bits); |
| 58 | } |
| 59 | static inline void bdw_disable_pipe_irq(struct drm_i915_private *dev_priv, |
| 60 | enum pipe pipe, u32 bits) |
| 61 | { |
| 62 | bdw_update_pipe_irq(dev_priv, pipe, bits, 0); |
| 63 | } |
| 64 | void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, |
| 65 | u32 interrupt_mask, |
| 66 | u32 enabled_irq_mask); |
| 67 | static inline void |
| 68 | ibx_enable_display_interrupt(struct drm_i915_private *dev_priv, u32 bits) |
| 69 | { |
| 70 | ibx_display_interrupt_update(dev_priv, bits, bits); |
| 71 | } |
| 72 | static inline void |
| 73 | ibx_disable_display_interrupt(struct drm_i915_private *dev_priv, u32 bits) |
| 74 | { |
| 75 | ibx_display_interrupt_update(dev_priv, bits, 0); |
| 76 | } |
| 77 | |
| 78 | void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, u32 mask); |
| 79 | void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, u32 mask); |
| 80 | void gen6_mask_pm_irq(struct drm_i915_private *dev_priv, u32 mask); |
| 81 | void gen6_unmask_pm_irq(struct drm_i915_private *dev_priv, u32 mask); |
| 82 | void gen11_reset_rps_interrupts(struct drm_i915_private *dev_priv); |
| 83 | void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv); |
| 84 | void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv); |
| 85 | void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv); |
| 86 | void gen6_rps_reset_ei(struct drm_i915_private *dev_priv); |
| 87 | |
| 88 | static inline u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, |
| 89 | u32 mask) |
| 90 | { |
| 91 | return mask & ~i915->gt_pm.rps.pm_intrmsk_mbz; |
| 92 | } |
| 93 | |
| 94 | void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv); |
| 95 | void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv); |
| 96 | static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv) |
| 97 | { |
| 98 | /* |
| 99 | * We only use drm_irq_uninstall() at unload and VT switch, so |
| 100 | * this is the only thing we need to check. |
| 101 | */ |
| 102 | return dev_priv->runtime_pm.irqs_enabled; |
| 103 | } |
| 104 | |
| 105 | int intel_get_crtc_scanline(struct intel_crtc *crtc); |
| 106 | void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv, |
| 107 | u8 pipe_mask); |
| 108 | void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv, |
| 109 | u8 pipe_mask); |
| 110 | void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv); |
| 111 | void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv); |
| 112 | void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv); |
Oscar Mateo | 54c52a8 | 2019-05-27 18:36:08 +0000 | [diff] [blame] | 113 | void gen11_reset_guc_interrupts(struct drm_i915_private *i915); |
| 114 | void gen11_enable_guc_interrupts(struct drm_i915_private *i915); |
| 115 | void gen11_disable_guc_interrupts(struct drm_i915_private *i915); |
Jani Nikula | 440e2b3 | 2019-04-29 15:29:27 +0300 | [diff] [blame] | 116 | |
| 117 | #endif /* __I915_IRQ_H__ */ |