Thomas Gleixner | 97fb5e8 | 2019-05-29 07:17:58 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2013, Sony Mobile Communications AB. |
| 4 | * Copyright (c) 2013, The Linux Foundation. All rights reserved. |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 7 | #include <linux/delay.h> |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 8 | #include <linux/err.h> |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 9 | #include <linux/io.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/of.h> |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/pinctrl/machine.h> |
| 14 | #include <linux/pinctrl/pinctrl.h> |
| 15 | #include <linux/pinctrl/pinmux.h> |
| 16 | #include <linux/pinctrl/pinconf.h> |
| 17 | #include <linux/pinctrl/pinconf-generic.h> |
| 18 | #include <linux/slab.h> |
Linus Walleij | 1c5fb66 | 2018-09-13 13:58:21 +0200 | [diff] [blame] | 19 | #include <linux/gpio/driver.h> |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 20 | #include <linux/interrupt.h> |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 21 | #include <linux/spinlock.h> |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 22 | #include <linux/reboot.h> |
Stephen Boyd | ad64498 | 2015-07-06 18:09:30 -0700 | [diff] [blame] | 23 | #include <linux/pm.h> |
Stephen Boyd | 47a01ee | 2016-06-25 22:21:31 -0700 | [diff] [blame] | 24 | #include <linux/log2.h> |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 25 | #include <linux/qcom_scm.h> |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 26 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 27 | #include <linux/soc/qcom/irq.h> |
| 28 | |
Linus Walleij | 69b78b8 | 2014-07-09 13:55:12 +0200 | [diff] [blame] | 29 | #include "../core.h" |
| 30 | #include "../pinconf.h" |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 31 | #include "pinctrl-msm.h" |
Linus Walleij | 69b78b8 | 2014-07-09 13:55:12 +0200 | [diff] [blame] | 32 | #include "../pinctrl-utils.h" |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 33 | |
Bjorn Andersson | 408e3c6 | 2013-12-14 23:01:53 -0800 | [diff] [blame] | 34 | #define MAX_NR_GPIO 300 |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 35 | #define MAX_NR_TILES 4 |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 36 | #define PS_HOLD_OFFSET 0x820 |
Bjorn Andersson | 408e3c6 | 2013-12-14 23:01:53 -0800 | [diff] [blame] | 37 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 38 | /** |
| 39 | * struct msm_pinctrl - state for a pinctrl-msm device |
| 40 | * @dev: device handle. |
| 41 | * @pctrl: pinctrl handle. |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 42 | * @chip: gpiochip handle. |
Lee Jones | 0b33c72 | 2020-07-13 15:49:10 +0100 | [diff] [blame] | 43 | * @desc: pin controller descriptor |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 44 | * @restart_nb: restart notifier block. |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 45 | * @irq: parent irq for the TLMM irq_chip. |
Lee Jones | 0b33c72 | 2020-07-13 15:49:10 +0100 | [diff] [blame] | 46 | * @intr_target_use_scm: route irq to application cpu using scm calls |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 47 | * @lock: Spinlock to protect register resources as well |
| 48 | * as msm_pinctrl data structures. |
| 49 | * @enabled_irqs: Bitmap of currently enabled irqs. |
| 50 | * @dual_edge_irqs: Bitmap of irqs that need sw emulated dual edge |
| 51 | * detection. |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 52 | * @skip_wake_irqs: Skip IRQs that are handled by wakeup interrupt controller |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 53 | * @disabled_for_mux: These IRQs were disabled because we muxed away. |
Lee Jones | 0b33c72 | 2020-07-13 15:49:10 +0100 | [diff] [blame] | 54 | * @soc: Reference to soc_data of platform specific data. |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 55 | * @regs: Base addresses for the TLMM tiles. |
Lee Jones | 0b33c72 | 2020-07-13 15:49:10 +0100 | [diff] [blame] | 56 | * @phys_base: Physical base address |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 57 | */ |
| 58 | struct msm_pinctrl { |
| 59 | struct device *dev; |
| 60 | struct pinctrl_dev *pctrl; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 61 | struct gpio_chip chip; |
Timur Tabi | f265e8b | 2018-04-25 17:43:26 -0500 | [diff] [blame] | 62 | struct pinctrl_desc desc; |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 63 | struct notifier_block restart_nb; |
Timur Tabi | f265e8b | 2018-04-25 17:43:26 -0500 | [diff] [blame] | 64 | |
Bjorn Andersson | f393e48 | 2013-12-14 23:01:52 -0800 | [diff] [blame] | 65 | int irq; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 66 | |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 67 | bool intr_target_use_scm; |
| 68 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 69 | raw_spinlock_t lock; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 70 | |
Bjorn Andersson | 408e3c6 | 2013-12-14 23:01:53 -0800 | [diff] [blame] | 71 | DECLARE_BITMAP(dual_edge_irqs, MAX_NR_GPIO); |
| 72 | DECLARE_BITMAP(enabled_irqs, MAX_NR_GPIO); |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 73 | DECLARE_BITMAP(skip_wake_irqs, MAX_NR_GPIO); |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 74 | DECLARE_BITMAP(disabled_for_mux, MAX_NR_GPIO); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 75 | |
| 76 | const struct msm_pinctrl_soc_data *soc; |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 77 | void __iomem *regs[MAX_NR_TILES]; |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 78 | u32 phys_base[MAX_NR_TILES]; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 79 | }; |
| 80 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 81 | #define MSM_ACCESSOR(name) \ |
| 82 | static u32 msm_readl_##name(struct msm_pinctrl *pctrl, \ |
| 83 | const struct msm_pingroup *g) \ |
| 84 | { \ |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 85 | return readl(pctrl->regs[g->tile] + g->name##_reg); \ |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 86 | } \ |
| 87 | static void msm_writel_##name(u32 val, struct msm_pinctrl *pctrl, \ |
| 88 | const struct msm_pingroup *g) \ |
| 89 | { \ |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 90 | writel(val, pctrl->regs[g->tile] + g->name##_reg); \ |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | MSM_ACCESSOR(ctl) |
| 94 | MSM_ACCESSOR(io) |
| 95 | MSM_ACCESSOR(intr_cfg) |
| 96 | MSM_ACCESSOR(intr_status) |
| 97 | MSM_ACCESSOR(intr_target) |
| 98 | |
Douglas Anderson | a95881d | 2021-01-14 19:16:23 -0800 | [diff] [blame] | 99 | static void msm_ack_intr_status(struct msm_pinctrl *pctrl, |
| 100 | const struct msm_pingroup *g) |
| 101 | { |
| 102 | u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0; |
| 103 | |
| 104 | msm_writel_intr_status(val, pctrl, g); |
| 105 | } |
| 106 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 107 | static int msm_get_groups_count(struct pinctrl_dev *pctldev) |
| 108 | { |
| 109 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 110 | |
| 111 | return pctrl->soc->ngroups; |
| 112 | } |
| 113 | |
| 114 | static const char *msm_get_group_name(struct pinctrl_dev *pctldev, |
| 115 | unsigned group) |
| 116 | { |
| 117 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 118 | |
| 119 | return pctrl->soc->groups[group].name; |
| 120 | } |
| 121 | |
| 122 | static int msm_get_group_pins(struct pinctrl_dev *pctldev, |
| 123 | unsigned group, |
| 124 | const unsigned **pins, |
| 125 | unsigned *num_pins) |
| 126 | { |
| 127 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 128 | |
| 129 | *pins = pctrl->soc->groups[group].pins; |
| 130 | *num_pins = pctrl->soc->groups[group].npins; |
| 131 | return 0; |
| 132 | } |
| 133 | |
Bjorn Andersson | 1f2b239 | 2013-12-14 23:01:51 -0800 | [diff] [blame] | 134 | static const struct pinctrl_ops msm_pinctrl_ops = { |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 135 | .get_groups_count = msm_get_groups_count, |
| 136 | .get_group_name = msm_get_group_name, |
| 137 | .get_group_pins = msm_get_group_pins, |
| 138 | .dt_node_to_map = pinconf_generic_dt_node_to_map_group, |
Irina Tirdea | d32f7fd | 2016-03-31 14:44:42 +0300 | [diff] [blame] | 139 | .dt_free_map = pinctrl_utils_free_map, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 140 | }; |
| 141 | |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 142 | static int msm_pinmux_request(struct pinctrl_dev *pctldev, unsigned offset) |
| 143 | { |
| 144 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 145 | struct gpio_chip *chip = &pctrl->chip; |
| 146 | |
| 147 | return gpiochip_line_is_valid(chip, offset) ? 0 : -EINVAL; |
| 148 | } |
| 149 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 150 | static int msm_get_functions_count(struct pinctrl_dev *pctldev) |
| 151 | { |
| 152 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 153 | |
| 154 | return pctrl->soc->nfunctions; |
| 155 | } |
| 156 | |
| 157 | static const char *msm_get_function_name(struct pinctrl_dev *pctldev, |
| 158 | unsigned function) |
| 159 | { |
| 160 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 161 | |
| 162 | return pctrl->soc->functions[function].name; |
| 163 | } |
| 164 | |
| 165 | static int msm_get_function_groups(struct pinctrl_dev *pctldev, |
| 166 | unsigned function, |
| 167 | const char * const **groups, |
| 168 | unsigned * const num_groups) |
| 169 | { |
| 170 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 171 | |
| 172 | *groups = pctrl->soc->functions[function].groups; |
| 173 | *num_groups = pctrl->soc->functions[function].ngroups; |
| 174 | return 0; |
| 175 | } |
| 176 | |
Linus Walleij | 03e9f0c | 2014-09-03 13:02:56 +0200 | [diff] [blame] | 177 | static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, |
| 178 | unsigned function, |
| 179 | unsigned group) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 180 | { |
| 181 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 182 | struct gpio_chip *gc = &pctrl->chip; |
| 183 | unsigned int irq = irq_find_mapping(gc->irq.domain, group); |
| 184 | struct irq_data *d = irq_get_irq_data(irq); |
| 185 | unsigned int gpio_func = pctrl->soc->gpio_func; |
Prasad Sodagudi | bebc49c | 2021-11-16 11:08:03 +0530 | [diff] [blame] | 186 | unsigned int egpio_func = pctrl->soc->egpio_func; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 187 | const struct msm_pingroup *g; |
| 188 | unsigned long flags; |
Stephen Boyd | 47a01ee | 2016-06-25 22:21:31 -0700 | [diff] [blame] | 189 | u32 val, mask; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 190 | int i; |
| 191 | |
| 192 | g = &pctrl->soc->groups[group]; |
Stephen Boyd | 47a01ee | 2016-06-25 22:21:31 -0700 | [diff] [blame] | 193 | mask = GENMASK(g->mux_bit + order_base_2(g->nfuncs) - 1, g->mux_bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 194 | |
Bjorn Andersson | 3c25381 | 2014-03-31 14:49:55 -0700 | [diff] [blame] | 195 | for (i = 0; i < g->nfuncs; i++) { |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 196 | if (g->funcs[i] == function) |
| 197 | break; |
| 198 | } |
| 199 | |
Bjorn Andersson | 3c25381 | 2014-03-31 14:49:55 -0700 | [diff] [blame] | 200 | if (WARN_ON(i == g->nfuncs)) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 201 | return -EINVAL; |
| 202 | |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 203 | /* |
| 204 | * If an GPIO interrupt is setup on this pin then we need special |
| 205 | * handling. Specifically interrupt detection logic will still see |
| 206 | * the pin twiddle even when we're muxed away. |
| 207 | * |
| 208 | * When we see a pin with an interrupt setup on it then we'll disable |
| 209 | * (mask) interrupts on it when we mux away until we mux back. Note |
| 210 | * that disable_irq() refcounts and interrupts are disabled as long as |
| 211 | * at least one disable_irq() has been called. |
| 212 | */ |
| 213 | if (d && i != gpio_func && |
| 214 | !test_and_set_bit(d->hwirq, pctrl->disabled_for_mux)) |
| 215 | disable_irq(irq); |
| 216 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 217 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 218 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 219 | val = msm_readl_ctl(pctrl, g); |
Prasad Sodagudi | bebc49c | 2021-11-16 11:08:03 +0530 | [diff] [blame] | 220 | |
| 221 | if (egpio_func && i == egpio_func) { |
| 222 | if (val & BIT(g->egpio_present)) |
| 223 | val &= ~BIT(g->egpio_enable); |
| 224 | } else { |
| 225 | val &= ~mask; |
| 226 | val |= i << g->mux_bit; |
| 227 | /* Claim ownership of pin if egpio capable */ |
| 228 | if (egpio_func && val & BIT(g->egpio_present)) |
| 229 | val |= BIT(g->egpio_enable); |
| 230 | } |
| 231 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 232 | msm_writel_ctl(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 233 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 234 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 235 | |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 236 | if (d && i == gpio_func && |
| 237 | test_and_clear_bit(d->hwirq, pctrl->disabled_for_mux)) { |
| 238 | /* |
| 239 | * Clear interrupts detected while not GPIO since we only |
| 240 | * masked things. |
| 241 | */ |
| 242 | if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 243 | irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, false); |
| 244 | else |
| 245 | msm_ack_intr_status(pctrl, g); |
| 246 | |
| 247 | enable_irq(irq); |
| 248 | } |
| 249 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 250 | return 0; |
| 251 | } |
| 252 | |
Stephen Boyd | 1de7ddb | 2018-08-16 13:06:47 -0700 | [diff] [blame] | 253 | static int msm_pinmux_request_gpio(struct pinctrl_dev *pctldev, |
| 254 | struct pinctrl_gpio_range *range, |
| 255 | unsigned offset) |
| 256 | { |
| 257 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 258 | const struct msm_pingroup *g = &pctrl->soc->groups[offset]; |
| 259 | |
| 260 | /* No funcs? Probably ACPI so can't do anything here */ |
| 261 | if (!g->nfuncs) |
| 262 | return 0; |
| 263 | |
Douglas Anderson | a82e537 | 2021-01-14 19:16:21 -0800 | [diff] [blame] | 264 | return msm_pinmux_set_mux(pctldev, g->funcs[pctrl->soc->gpio_func], offset); |
Stephen Boyd | 1de7ddb | 2018-08-16 13:06:47 -0700 | [diff] [blame] | 265 | } |
| 266 | |
Bjorn Andersson | 1f2b239 | 2013-12-14 23:01:51 -0800 | [diff] [blame] | 267 | static const struct pinmux_ops msm_pinmux_ops = { |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 268 | .request = msm_pinmux_request, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 269 | .get_functions_count = msm_get_functions_count, |
| 270 | .get_function_name = msm_get_function_name, |
| 271 | .get_function_groups = msm_get_function_groups, |
Stephen Boyd | 1de7ddb | 2018-08-16 13:06:47 -0700 | [diff] [blame] | 272 | .gpio_request_enable = msm_pinmux_request_gpio, |
Linus Walleij | 03e9f0c | 2014-09-03 13:02:56 +0200 | [diff] [blame] | 273 | .set_mux = msm_pinmux_set_mux, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 274 | }; |
| 275 | |
| 276 | static int msm_config_reg(struct msm_pinctrl *pctrl, |
| 277 | const struct msm_pingroup *g, |
| 278 | unsigned param, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 279 | unsigned *mask, |
| 280 | unsigned *bit) |
| 281 | { |
| 282 | switch (param) { |
| 283 | case PIN_CONFIG_BIAS_DISABLE: |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 284 | case PIN_CONFIG_BIAS_PULL_DOWN: |
Andy Gross | b831a15 | 2014-06-17 23:49:11 -0500 | [diff] [blame] | 285 | case PIN_CONFIG_BIAS_BUS_HOLD: |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 286 | case PIN_CONFIG_BIAS_PULL_UP: |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 287 | *bit = g->pull_bit; |
| 288 | *mask = 3; |
| 289 | break; |
Jaiganesh Narayanan | 13355ca | 2020-07-03 01:06:45 -0700 | [diff] [blame] | 290 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
| 291 | *bit = g->od_bit; |
| 292 | *mask = 1; |
| 293 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 294 | case PIN_CONFIG_DRIVE_STRENGTH: |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 295 | *bit = g->drv_bit; |
| 296 | *mask = 7; |
| 297 | break; |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 298 | case PIN_CONFIG_OUTPUT: |
Stanimir Varbanov | 407f5e3 | 2015-03-04 12:41:57 +0200 | [diff] [blame] | 299 | case PIN_CONFIG_INPUT_ENABLE: |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 300 | *bit = g->oe_bit; |
| 301 | *mask = 1; |
| 302 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 303 | default: |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 304 | return -ENOTSUPP; |
| 305 | } |
| 306 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 307 | return 0; |
| 308 | } |
| 309 | |
Ram Chandra Jangir | 83cf5fa | 2017-07-14 16:14:11 +0200 | [diff] [blame] | 310 | #define MSM_NO_PULL 0 |
| 311 | #define MSM_PULL_DOWN 1 |
| 312 | #define MSM_KEEPER 2 |
| 313 | #define MSM_PULL_UP_NO_KEEPER 2 |
| 314 | #define MSM_PULL_UP 3 |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 315 | |
Stephen Boyd | 7cc34e2 | 2014-03-06 22:44:44 -0800 | [diff] [blame] | 316 | static unsigned msm_regval_to_drive(u32 val) |
| 317 | { |
| 318 | return (val + 1) * 2; |
| 319 | } |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 320 | |
| 321 | static int msm_config_group_get(struct pinctrl_dev *pctldev, |
| 322 | unsigned int group, |
| 323 | unsigned long *config) |
| 324 | { |
| 325 | const struct msm_pingroup *g; |
| 326 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 327 | unsigned param = pinconf_to_config_param(*config); |
| 328 | unsigned mask; |
| 329 | unsigned arg; |
| 330 | unsigned bit; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 331 | int ret; |
| 332 | u32 val; |
| 333 | |
| 334 | g = &pctrl->soc->groups[group]; |
| 335 | |
Stephen Boyd | 051a58b | 2014-03-06 22:44:46 -0800 | [diff] [blame] | 336 | ret = msm_config_reg(pctrl, g, param, &mask, &bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 337 | if (ret < 0) |
| 338 | return ret; |
| 339 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 340 | val = msm_readl_ctl(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 341 | arg = (val >> bit) & mask; |
| 342 | |
| 343 | /* Convert register value to pinconf value */ |
| 344 | switch (param) { |
| 345 | case PIN_CONFIG_BIAS_DISABLE: |
Douglas Anderson | 05e0c82 | 2018-07-02 15:59:38 -0700 | [diff] [blame] | 346 | if (arg != MSM_NO_PULL) |
| 347 | return -EINVAL; |
| 348 | arg = 1; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 349 | break; |
| 350 | case PIN_CONFIG_BIAS_PULL_DOWN: |
Douglas Anderson | 05e0c82 | 2018-07-02 15:59:38 -0700 | [diff] [blame] | 351 | if (arg != MSM_PULL_DOWN) |
| 352 | return -EINVAL; |
| 353 | arg = 1; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 354 | break; |
Andy Gross | b831a15 | 2014-06-17 23:49:11 -0500 | [diff] [blame] | 355 | case PIN_CONFIG_BIAS_BUS_HOLD: |
Ram Chandra Jangir | 83cf5fa | 2017-07-14 16:14:11 +0200 | [diff] [blame] | 356 | if (pctrl->soc->pull_no_keeper) |
| 357 | return -ENOTSUPP; |
| 358 | |
Douglas Anderson | 05e0c82 | 2018-07-02 15:59:38 -0700 | [diff] [blame] | 359 | if (arg != MSM_KEEPER) |
| 360 | return -EINVAL; |
| 361 | arg = 1; |
Andy Gross | b831a15 | 2014-06-17 23:49:11 -0500 | [diff] [blame] | 362 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 363 | case PIN_CONFIG_BIAS_PULL_UP: |
Ram Chandra Jangir | 83cf5fa | 2017-07-14 16:14:11 +0200 | [diff] [blame] | 364 | if (pctrl->soc->pull_no_keeper) |
| 365 | arg = arg == MSM_PULL_UP_NO_KEEPER; |
| 366 | else |
| 367 | arg = arg == MSM_PULL_UP; |
Douglas Anderson | 05e0c82 | 2018-07-02 15:59:38 -0700 | [diff] [blame] | 368 | if (!arg) |
| 369 | return -EINVAL; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 370 | break; |
Jaiganesh Narayanan | 13355ca | 2020-07-03 01:06:45 -0700 | [diff] [blame] | 371 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
| 372 | /* Pin is not open-drain */ |
| 373 | if (!arg) |
| 374 | return -EINVAL; |
| 375 | arg = 1; |
| 376 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 377 | case PIN_CONFIG_DRIVE_STRENGTH: |
Stephen Boyd | 7cc34e2 | 2014-03-06 22:44:44 -0800 | [diff] [blame] | 378 | arg = msm_regval_to_drive(arg); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 379 | break; |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 380 | case PIN_CONFIG_OUTPUT: |
| 381 | /* Pin is not output */ |
| 382 | if (!arg) |
| 383 | return -EINVAL; |
| 384 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 385 | val = msm_readl_io(pctrl, g); |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 386 | arg = !!(val & BIT(g->in_bit)); |
| 387 | break; |
Stanimir Varbanov | 407f5e3 | 2015-03-04 12:41:57 +0200 | [diff] [blame] | 388 | case PIN_CONFIG_INPUT_ENABLE: |
| 389 | /* Pin is output */ |
| 390 | if (arg) |
| 391 | return -EINVAL; |
| 392 | arg = 1; |
| 393 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 394 | default: |
Stanimir Varbanov | 38d756a | 2015-03-04 12:41:56 +0200 | [diff] [blame] | 395 | return -ENOTSUPP; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 396 | } |
| 397 | |
| 398 | *config = pinconf_to_config_packed(param, arg); |
| 399 | |
| 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | static int msm_config_group_set(struct pinctrl_dev *pctldev, |
| 404 | unsigned group, |
| 405 | unsigned long *configs, |
| 406 | unsigned num_configs) |
| 407 | { |
| 408 | const struct msm_pingroup *g; |
| 409 | struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
| 410 | unsigned long flags; |
| 411 | unsigned param; |
| 412 | unsigned mask; |
| 413 | unsigned arg; |
| 414 | unsigned bit; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 415 | int ret; |
| 416 | u32 val; |
| 417 | int i; |
| 418 | |
| 419 | g = &pctrl->soc->groups[group]; |
| 420 | |
| 421 | for (i = 0; i < num_configs; i++) { |
| 422 | param = pinconf_to_config_param(configs[i]); |
| 423 | arg = pinconf_to_config_argument(configs[i]); |
| 424 | |
Stephen Boyd | 051a58b | 2014-03-06 22:44:46 -0800 | [diff] [blame] | 425 | ret = msm_config_reg(pctrl, g, param, &mask, &bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 426 | if (ret < 0) |
| 427 | return ret; |
| 428 | |
| 429 | /* Convert pinconf values to register values */ |
| 430 | switch (param) { |
| 431 | case PIN_CONFIG_BIAS_DISABLE: |
| 432 | arg = MSM_NO_PULL; |
| 433 | break; |
| 434 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 435 | arg = MSM_PULL_DOWN; |
| 436 | break; |
Andy Gross | b831a15 | 2014-06-17 23:49:11 -0500 | [diff] [blame] | 437 | case PIN_CONFIG_BIAS_BUS_HOLD: |
Ram Chandra Jangir | 83cf5fa | 2017-07-14 16:14:11 +0200 | [diff] [blame] | 438 | if (pctrl->soc->pull_no_keeper) |
| 439 | return -ENOTSUPP; |
| 440 | |
Andy Gross | b831a15 | 2014-06-17 23:49:11 -0500 | [diff] [blame] | 441 | arg = MSM_KEEPER; |
| 442 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 443 | case PIN_CONFIG_BIAS_PULL_UP: |
Ram Chandra Jangir | 83cf5fa | 2017-07-14 16:14:11 +0200 | [diff] [blame] | 444 | if (pctrl->soc->pull_no_keeper) |
| 445 | arg = MSM_PULL_UP_NO_KEEPER; |
| 446 | else |
| 447 | arg = MSM_PULL_UP; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 448 | break; |
Jaiganesh Narayanan | 13355ca | 2020-07-03 01:06:45 -0700 | [diff] [blame] | 449 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
| 450 | arg = 1; |
| 451 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 452 | case PIN_CONFIG_DRIVE_STRENGTH: |
| 453 | /* Check for invalid values */ |
Stephen Boyd | 7cc34e2 | 2014-03-06 22:44:44 -0800 | [diff] [blame] | 454 | if (arg > 16 || arg < 2 || (arg % 2) != 0) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 455 | arg = -1; |
| 456 | else |
Stephen Boyd | 7cc34e2 | 2014-03-06 22:44:44 -0800 | [diff] [blame] | 457 | arg = (arg / 2) - 1; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 458 | break; |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 459 | case PIN_CONFIG_OUTPUT: |
| 460 | /* set output value */ |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 461 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 462 | val = msm_readl_io(pctrl, g); |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 463 | if (arg) |
| 464 | val |= BIT(g->out_bit); |
| 465 | else |
| 466 | val &= ~BIT(g->out_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 467 | msm_writel_io(val, pctrl, g); |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 468 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | ed118a5 | 2014-02-04 19:55:31 -0800 | [diff] [blame] | 469 | |
| 470 | /* enable output */ |
| 471 | arg = 1; |
| 472 | break; |
Stanimir Varbanov | 407f5e3 | 2015-03-04 12:41:57 +0200 | [diff] [blame] | 473 | case PIN_CONFIG_INPUT_ENABLE: |
| 474 | /* disable output */ |
| 475 | arg = 0; |
| 476 | break; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 477 | default: |
| 478 | dev_err(pctrl->dev, "Unsupported config parameter: %x\n", |
| 479 | param); |
| 480 | return -EINVAL; |
| 481 | } |
| 482 | |
| 483 | /* Range-check user-supplied value */ |
| 484 | if (arg & ~mask) { |
| 485 | dev_err(pctrl->dev, "config %x: %x is invalid\n", param, arg); |
| 486 | return -EINVAL; |
| 487 | } |
| 488 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 489 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 490 | val = msm_readl_ctl(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 491 | val &= ~(mask << bit); |
| 492 | val |= arg << bit; |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 493 | msm_writel_ctl(val, pctrl, g); |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 494 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 495 | } |
| 496 | |
| 497 | return 0; |
| 498 | } |
| 499 | |
Bjorn Andersson | 1f2b239 | 2013-12-14 23:01:51 -0800 | [diff] [blame] | 500 | static const struct pinconf_ops msm_pinconf_ops = { |
Stanimir Varbanov | 38d756a | 2015-03-04 12:41:56 +0200 | [diff] [blame] | 501 | .is_generic = true, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 502 | .pin_config_group_get = msm_config_group_get, |
| 503 | .pin_config_group_set = msm_config_group_set, |
| 504 | }; |
| 505 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 506 | static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
| 507 | { |
| 508 | const struct msm_pingroup *g; |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 509 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 510 | unsigned long flags; |
| 511 | u32 val; |
| 512 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 513 | g = &pctrl->soc->groups[offset]; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 514 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 515 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 516 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 517 | val = msm_readl_ctl(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 518 | val &= ~BIT(g->oe_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 519 | msm_writel_ctl(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 520 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 521 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 522 | |
| 523 | return 0; |
| 524 | } |
| 525 | |
| 526 | static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) |
| 527 | { |
| 528 | const struct msm_pingroup *g; |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 529 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 530 | unsigned long flags; |
| 531 | u32 val; |
| 532 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 533 | g = &pctrl->soc->groups[offset]; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 534 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 535 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 536 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 537 | val = msm_readl_io(pctrl, g); |
Axel Lin | e476e77 | 2013-12-13 21:35:55 +0800 | [diff] [blame] | 538 | if (value) |
| 539 | val |= BIT(g->out_bit); |
| 540 | else |
| 541 | val &= ~BIT(g->out_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 542 | msm_writel_io(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 543 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 544 | val = msm_readl_ctl(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 545 | val |= BIT(g->oe_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 546 | msm_writel_ctl(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 547 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 548 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 549 | |
| 550 | return 0; |
| 551 | } |
| 552 | |
Timur Tabi | 8e51533 | 2017-02-10 17:21:00 -0600 | [diff] [blame] | 553 | static int msm_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) |
| 554 | { |
| 555 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
| 556 | const struct msm_pingroup *g; |
| 557 | u32 val; |
| 558 | |
| 559 | g = &pctrl->soc->groups[offset]; |
| 560 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 561 | val = msm_readl_ctl(pctrl, g); |
Timur Tabi | 8e51533 | 2017-02-10 17:21:00 -0600 | [diff] [blame] | 562 | |
Matti Vaittinen | 3c82787 | 2020-02-14 15:57:12 +0200 | [diff] [blame] | 563 | return val & BIT(g->oe_bit) ? GPIO_LINE_DIRECTION_OUT : |
| 564 | GPIO_LINE_DIRECTION_IN; |
Timur Tabi | 8e51533 | 2017-02-10 17:21:00 -0600 | [diff] [blame] | 565 | } |
| 566 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 567 | static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 568 | { |
| 569 | const struct msm_pingroup *g; |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 570 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 571 | u32 val; |
| 572 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 573 | g = &pctrl->soc->groups[offset]; |
| 574 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 575 | val = msm_readl_io(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 576 | return !!(val & BIT(g->in_bit)); |
| 577 | } |
| 578 | |
| 579 | static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 580 | { |
| 581 | const struct msm_pingroup *g; |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 582 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 583 | unsigned long flags; |
| 584 | u32 val; |
| 585 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 586 | g = &pctrl->soc->groups[offset]; |
| 587 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 588 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 589 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 590 | val = msm_readl_io(pctrl, g); |
Axel Lin | e476e77 | 2013-12-13 21:35:55 +0800 | [diff] [blame] | 591 | if (value) |
| 592 | val |= BIT(g->out_bit); |
| 593 | else |
| 594 | val &= ~BIT(g->out_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 595 | msm_writel_io(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 596 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 597 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 598 | } |
| 599 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 600 | #ifdef CONFIG_DEBUG_FS |
| 601 | #include <linux/seq_file.h> |
| 602 | |
| 603 | static void msm_gpio_dbg_show_one(struct seq_file *s, |
| 604 | struct pinctrl_dev *pctldev, |
| 605 | struct gpio_chip *chip, |
| 606 | unsigned offset, |
| 607 | unsigned gpio) |
| 608 | { |
| 609 | const struct msm_pingroup *g; |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 610 | struct msm_pinctrl *pctrl = gpiochip_get_data(chip); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 611 | unsigned func; |
| 612 | int is_out; |
| 613 | int drive; |
| 614 | int pull; |
Stephen Boyd | 59a18c24 | 2018-05-07 17:15:23 -0700 | [diff] [blame] | 615 | int val; |
Jonathan Marek | 06e12b7 | 2022-02-10 08:12:09 -0500 | [diff] [blame] | 616 | int egpio_enable; |
Stephen Boyd | 59a18c24 | 2018-05-07 17:15:23 -0700 | [diff] [blame] | 617 | u32 ctl_reg, io_reg; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 618 | |
Clément Péron | 53e73a2 | 2018-05-04 16:57:28 -0700 | [diff] [blame] | 619 | static const char * const pulls_keeper[] = { |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 620 | "no pull", |
| 621 | "pull down", |
| 622 | "keeper", |
| 623 | "pull up" |
| 624 | }; |
| 625 | |
Clément Péron | 53e73a2 | 2018-05-04 16:57:28 -0700 | [diff] [blame] | 626 | static const char * const pulls_no_keeper[] = { |
| 627 | "no pull", |
| 628 | "pull down", |
| 629 | "pull up", |
| 630 | }; |
| 631 | |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 632 | if (!gpiochip_line_is_valid(chip, offset)) |
| 633 | return; |
| 634 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 635 | g = &pctrl->soc->groups[offset]; |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 636 | ctl_reg = msm_readl_ctl(pctrl, g); |
| 637 | io_reg = msm_readl_io(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 638 | |
| 639 | is_out = !!(ctl_reg & BIT(g->oe_bit)); |
| 640 | func = (ctl_reg >> g->mux_bit) & 7; |
| 641 | drive = (ctl_reg >> g->drv_bit) & 7; |
| 642 | pull = (ctl_reg >> g->pull_bit) & 3; |
Jonathan Marek | 06e12b7 | 2022-02-10 08:12:09 -0500 | [diff] [blame] | 643 | egpio_enable = 0; |
| 644 | if (pctrl->soc->egpio_func && ctl_reg & BIT(g->egpio_present)) |
| 645 | egpio_enable = !(ctl_reg & BIT(g->egpio_enable)); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 646 | |
Stephen Boyd | 59a18c24 | 2018-05-07 17:15:23 -0700 | [diff] [blame] | 647 | if (is_out) |
| 648 | val = !!(io_reg & BIT(g->out_bit)); |
| 649 | else |
| 650 | val = !!(io_reg & BIT(g->in_bit)); |
| 651 | |
Jonathan Marek | 06e12b7 | 2022-02-10 08:12:09 -0500 | [diff] [blame] | 652 | if (egpio_enable) { |
| 653 | seq_printf(s, " %-8s: egpio\n", g->name); |
| 654 | return; |
| 655 | } |
| 656 | |
Stephen Boyd | 59a18c24 | 2018-05-07 17:15:23 -0700 | [diff] [blame] | 657 | seq_printf(s, " %-8s: %-3s", g->name, is_out ? "out" : "in"); |
| 658 | seq_printf(s, " %-4s func%d", val ? "high" : "low", func); |
Stephen Boyd | 7cc34e2 | 2014-03-06 22:44:44 -0800 | [diff] [blame] | 659 | seq_printf(s, " %dmA", msm_regval_to_drive(drive)); |
Clément Péron | 53e73a2 | 2018-05-04 16:57:28 -0700 | [diff] [blame] | 660 | if (pctrl->soc->pull_no_keeper) |
| 661 | seq_printf(s, " %s", pulls_no_keeper[pull]); |
| 662 | else |
| 663 | seq_printf(s, " %s", pulls_keeper[pull]); |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 664 | seq_puts(s, "\n"); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 665 | } |
| 666 | |
| 667 | static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
| 668 | { |
| 669 | unsigned gpio = chip->base; |
| 670 | unsigned i; |
| 671 | |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 672 | for (i = 0; i < chip->ngpio; i++, gpio++) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 673 | msm_gpio_dbg_show_one(s, NULL, chip, i, gpio); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 674 | } |
| 675 | |
| 676 | #else |
| 677 | #define msm_gpio_dbg_show NULL |
| 678 | #endif |
| 679 | |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 680 | static int msm_gpio_init_valid_mask(struct gpio_chip *gc, |
| 681 | unsigned long *valid_mask, |
| 682 | unsigned int ngpios) |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 683 | { |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 684 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 685 | int ret; |
| 686 | unsigned int len, i; |
Lee Jones | 4c0efbf | 2019-06-10 09:42:08 +0100 | [diff] [blame] | 687 | const int *reserved = pctrl->soc->reserved_gpios; |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 688 | u16 *tmp; |
| 689 | |
Lee Jones | 4c0efbf | 2019-06-10 09:42:08 +0100 | [diff] [blame] | 690 | /* Driver provided reserved list overrides DT and ACPI */ |
| 691 | if (reserved) { |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 692 | bitmap_fill(valid_mask, ngpios); |
Lee Jones | 4c0efbf | 2019-06-10 09:42:08 +0100 | [diff] [blame] | 693 | for (i = 0; reserved[i] >= 0; i++) { |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 694 | if (i >= ngpios || reserved[i] >= ngpios) { |
Lee Jones | 4c0efbf | 2019-06-10 09:42:08 +0100 | [diff] [blame] | 695 | dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); |
| 696 | return -EINVAL; |
| 697 | } |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 698 | clear_bit(reserved[i], valid_mask); |
Lee Jones | 4c0efbf | 2019-06-10 09:42:08 +0100 | [diff] [blame] | 699 | } |
| 700 | |
| 701 | return 0; |
| 702 | } |
| 703 | |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 704 | /* The number of GPIOs in the ACPI tables */ |
Andy Shevchenko | 720b8ec | 2019-07-23 22:27:37 +0300 | [diff] [blame] | 705 | len = ret = device_property_count_u16(pctrl->dev, "gpios"); |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 706 | if (ret < 0) |
| 707 | return 0; |
| 708 | |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 709 | if (ret > ngpios) |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 710 | return -EINVAL; |
| 711 | |
| 712 | tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL); |
| 713 | if (!tmp) |
| 714 | return -ENOMEM; |
| 715 | |
| 716 | ret = device_property_read_u16_array(pctrl->dev, "gpios", tmp, len); |
| 717 | if (ret < 0) { |
| 718 | dev_err(pctrl->dev, "could not read list of GPIOs\n"); |
| 719 | goto out; |
| 720 | } |
| 721 | |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 722 | bitmap_zero(valid_mask, ngpios); |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 723 | for (i = 0; i < len; i++) |
Linus Walleij | c9fc5af | 2019-08-19 10:49:04 +0200 | [diff] [blame] | 724 | set_bit(tmp[i], valid_mask); |
Ricardo Ribalda Delgado | 6f0ec09 | 2018-10-05 08:52:59 +0200 | [diff] [blame] | 725 | |
| 726 | out: |
| 727 | kfree(tmp); |
| 728 | return ret; |
| 729 | } |
| 730 | |
Gustavo A. R. Silva | 12cb90ba | 2017-07-11 13:34:14 -0500 | [diff] [blame] | 731 | static const struct gpio_chip msm_gpio_template = { |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 732 | .direction_input = msm_gpio_direction_input, |
| 733 | .direction_output = msm_gpio_direction_output, |
Timur Tabi | 8e51533 | 2017-02-10 17:21:00 -0600 | [diff] [blame] | 734 | .get_direction = msm_gpio_get_direction, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 735 | .get = msm_gpio_get, |
| 736 | .set = msm_gpio_set, |
Jonas Gorski | 98c85d5 | 2015-10-11 17:34:19 +0200 | [diff] [blame] | 737 | .request = gpiochip_generic_request, |
| 738 | .free = gpiochip_generic_free, |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 739 | .dbg_show = msm_gpio_dbg_show, |
| 740 | }; |
| 741 | |
| 742 | /* For dual-edge interrupts in software, since some hardware has no |
| 743 | * such support: |
| 744 | * |
| 745 | * At appropriate moments, this function may be called to flip the polarity |
| 746 | * settings of both-edge irq lines to try and catch the next edge. |
| 747 | * |
| 748 | * The attempt is considered successful if: |
| 749 | * - the status bit goes high, indicating that an edge was caught, or |
| 750 | * - the input value of the gpio doesn't change during the attempt. |
| 751 | * If the value changes twice during the process, that would cause the first |
| 752 | * test to fail but would force the second, as two opposite |
| 753 | * transitions would cause a detection no matter the polarity setting. |
| 754 | * |
| 755 | * The do-loop tries to sledge-hammer closed the timing hole between |
| 756 | * the initial value-read and the polarity-write - if the line value changes |
| 757 | * during that window, an interrupt is lost, the new polarity setting is |
| 758 | * incorrect, and the first success test will fail, causing a retry. |
| 759 | * |
| 760 | * Algorithm comes from Google's msmgpio driver. |
| 761 | */ |
| 762 | static void msm_gpio_update_dual_edge_pos(struct msm_pinctrl *pctrl, |
| 763 | const struct msm_pingroup *g, |
| 764 | struct irq_data *d) |
| 765 | { |
| 766 | int loop_limit = 100; |
| 767 | unsigned val, val2, intstat; |
| 768 | unsigned pol; |
| 769 | |
| 770 | do { |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 771 | val = msm_readl_io(pctrl, g) & BIT(g->in_bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 772 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 773 | pol = msm_readl_intr_cfg(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 774 | pol ^= BIT(g->intr_polarity_bit); |
Ansuel Smith | 90bcb0c | 2020-04-14 02:37:26 +0200 | [diff] [blame] | 775 | msm_writel_intr_cfg(pol, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 776 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 777 | val2 = msm_readl_io(pctrl, g) & BIT(g->in_bit); |
| 778 | intstat = msm_readl_intr_status(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 779 | if (intstat || (val == val2)) |
| 780 | return; |
| 781 | } while (loop_limit-- > 0); |
| 782 | dev_err(pctrl->dev, "dual-edge irq failed to stabilize, %#08x != %#08x\n", |
| 783 | val, val2); |
| 784 | } |
| 785 | |
| 786 | static void msm_gpio_irq_mask(struct irq_data *d) |
| 787 | { |
Linus Walleij | cdcb0ab | 2014-04-29 11:00:40 -0700 | [diff] [blame] | 788 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 789 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 790 | const struct msm_pingroup *g; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 791 | unsigned long flags; |
| 792 | u32 val; |
| 793 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 794 | if (d->parent_data) |
| 795 | irq_chip_mask_parent(d); |
| 796 | |
| 797 | if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 798 | return; |
| 799 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 800 | g = &pctrl->soc->groups[d->hwirq]; |
| 801 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 802 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 803 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 804 | val = msm_readl_intr_cfg(pctrl, g); |
Stephen Boyd | b55326d | 2018-08-16 13:06:46 -0700 | [diff] [blame] | 805 | /* |
| 806 | * There are two bits that control interrupt forwarding to the CPU. The |
| 807 | * RAW_STATUS_EN bit causes the level or edge sensed on the line to be |
| 808 | * latched into the interrupt status register when the hardware detects |
| 809 | * an irq that it's configured for (either edge for edge type or level |
| 810 | * for level type irq). The 'non-raw' status enable bit causes the |
| 811 | * hardware to assert the summary interrupt to the CPU if the latched |
| 812 | * status bit is set. There's a bug though, the edge detection logic |
| 813 | * seems to have a problem where toggling the RAW_STATUS_EN bit may |
| 814 | * cause the status bit to latch spuriously when there isn't any edge |
| 815 | * so we can't touch that bit for edge type irqs and we have to keep |
| 816 | * the bit set anyway so that edges are latched while the line is masked. |
| 817 | * |
| 818 | * To make matters more complicated, leaving the RAW_STATUS_EN bit |
| 819 | * enabled all the time causes level interrupts to re-latch into the |
| 820 | * status register because the level is still present on the line after |
| 821 | * we ack it. We clear the raw status enable bit during mask here and |
| 822 | * set the bit on unmask so the interrupt can't latch into the hardware |
| 823 | * while it's masked. |
| 824 | */ |
| 825 | if (irqd_get_trigger_type(d) & IRQ_TYPE_LEVEL_MASK) |
| 826 | val &= ~BIT(g->intr_raw_status_bit); |
| 827 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 828 | val &= ~BIT(g->intr_enable_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 829 | msm_writel_intr_cfg(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 830 | |
| 831 | clear_bit(d->hwirq, pctrl->enabled_irqs); |
| 832 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 833 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 834 | } |
| 835 | |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 836 | static void msm_gpio_irq_unmask(struct irq_data *d) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 837 | { |
Linus Walleij | cdcb0ab | 2014-04-29 11:00:40 -0700 | [diff] [blame] | 838 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 839 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 840 | const struct msm_pingroup *g; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 841 | unsigned long flags; |
| 842 | u32 val; |
| 843 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 844 | if (d->parent_data) |
| 845 | irq_chip_unmask_parent(d); |
| 846 | |
| 847 | if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 848 | return; |
| 849 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 850 | g = &pctrl->soc->groups[d->hwirq]; |
| 851 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 852 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 853 | |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 854 | val = msm_readl_intr_cfg(pctrl, g); |
Stephen Boyd | b55326d | 2018-08-16 13:06:46 -0700 | [diff] [blame] | 855 | val |= BIT(g->intr_raw_status_bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 856 | val |= BIT(g->intr_enable_bit); |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 857 | msm_writel_intr_cfg(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 858 | |
| 859 | set_bit(d->hwirq, pctrl->enabled_irqs); |
| 860 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 861 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 862 | } |
| 863 | |
Srinivas Ramana | 4b7618f | 2019-06-25 19:44:46 +0530 | [diff] [blame] | 864 | static void msm_gpio_irq_enable(struct irq_data *d) |
| 865 | { |
Maulik Shah | 71266d9 | 2020-11-05 13:08:04 +0530 | [diff] [blame] | 866 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 867 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Srinivas Ramana | 4b7618f | 2019-06-25 19:44:46 +0530 | [diff] [blame] | 868 | |
Marc Zyngier | 14dbe18 | 2022-04-19 15:18:43 +0100 | [diff] [blame] | 869 | gpiochip_enable_irq(gc, d->hwirq); |
| 870 | |
Maulik Shah | 71266d9 | 2020-11-05 13:08:04 +0530 | [diff] [blame] | 871 | if (d->parent_data) |
| 872 | irq_chip_enable_parent(d); |
| 873 | |
| 874 | if (!test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 875 | msm_gpio_irq_unmask(d); |
Srinivas Ramana | 4b7618f | 2019-06-25 19:44:46 +0530 | [diff] [blame] | 876 | } |
| 877 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 878 | static void msm_gpio_irq_disable(struct irq_data *d) |
| 879 | { |
| 880 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 881 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 882 | |
| 883 | if (d->parent_data) |
| 884 | irq_chip_disable_parent(d); |
| 885 | |
| 886 | if (!test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 887 | msm_gpio_irq_mask(d); |
Marc Zyngier | 14dbe18 | 2022-04-19 15:18:43 +0100 | [diff] [blame] | 888 | |
| 889 | gpiochip_disable_irq(gc, d->hwirq); |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 890 | } |
| 891 | |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 892 | /** |
| 893 | * msm_gpio_update_dual_edge_parent() - Prime next edge for IRQs handled by parent. |
| 894 | * @d: The irq dta. |
| 895 | * |
| 896 | * This is much like msm_gpio_update_dual_edge_pos() but for IRQs that are |
| 897 | * normally handled by the parent irqchip. The logic here is slightly |
| 898 | * different due to what's easy to do with our parent, but in principle it's |
| 899 | * the same. |
| 900 | */ |
| 901 | static void msm_gpio_update_dual_edge_parent(struct irq_data *d) |
| 902 | { |
| 903 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 904 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 905 | const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq]; |
| 906 | int loop_limit = 100; |
| 907 | unsigned int val; |
| 908 | unsigned int type; |
| 909 | |
| 910 | /* Read the value and make a guess about what edge we need to catch */ |
| 911 | val = msm_readl_io(pctrl, g) & BIT(g->in_bit); |
| 912 | type = val ? IRQ_TYPE_EDGE_FALLING : IRQ_TYPE_EDGE_RISING; |
| 913 | |
| 914 | do { |
| 915 | /* Set the parent to catch the next edge */ |
| 916 | irq_chip_set_type_parent(d, type); |
| 917 | |
| 918 | /* |
| 919 | * Possibly the line changed between when we last read "val" |
| 920 | * (and decided what edge we needed) and when set the edge. |
| 921 | * If the value didn't change (or changed and then changed |
| 922 | * back) then we're done. |
| 923 | */ |
| 924 | val = msm_readl_io(pctrl, g) & BIT(g->in_bit); |
| 925 | if (type == IRQ_TYPE_EDGE_RISING) { |
| 926 | if (!val) |
| 927 | return; |
| 928 | type = IRQ_TYPE_EDGE_FALLING; |
| 929 | } else if (type == IRQ_TYPE_EDGE_FALLING) { |
| 930 | if (val) |
| 931 | return; |
| 932 | type = IRQ_TYPE_EDGE_RISING; |
| 933 | } |
| 934 | } while (loop_limit-- > 0); |
| 935 | dev_warn_once(pctrl->dev, "dual-edge irq failed to stabilize\n"); |
| 936 | } |
| 937 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 938 | static void msm_gpio_irq_ack(struct irq_data *d) |
| 939 | { |
Linus Walleij | cdcb0ab | 2014-04-29 11:00:40 -0700 | [diff] [blame] | 940 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 941 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 942 | const struct msm_pingroup *g; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 943 | unsigned long flags; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 944 | |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 945 | if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) { |
| 946 | if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) |
| 947 | msm_gpio_update_dual_edge_parent(d); |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 948 | return; |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 949 | } |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 950 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 951 | g = &pctrl->soc->groups[d->hwirq]; |
| 952 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 953 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 954 | |
Douglas Anderson | a95881d | 2021-01-14 19:16:23 -0800 | [diff] [blame] | 955 | msm_ack_intr_status(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 956 | |
| 957 | if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) |
| 958 | msm_gpio_update_dual_edge_pos(pctrl, g, d); |
| 959 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 960 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 961 | } |
| 962 | |
Marc Zyngier | 14dbe18 | 2022-04-19 15:18:43 +0100 | [diff] [blame] | 963 | static void msm_gpio_irq_eoi(struct irq_data *d) |
| 964 | { |
| 965 | d = d->parent_data; |
| 966 | |
| 967 | if (d) |
| 968 | d->chip->irq_eoi(d); |
| 969 | } |
| 970 | |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 971 | static bool msm_gpio_needs_dual_edge_parent_workaround(struct irq_data *d, |
| 972 | unsigned int type) |
| 973 | { |
| 974 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 975 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 976 | |
| 977 | return type == IRQ_TYPE_EDGE_BOTH && |
| 978 | pctrl->soc->wakeirq_dual_edge_errata && d->parent_data && |
| 979 | test_bit(d->hwirq, pctrl->skip_wake_irqs); |
| 980 | } |
| 981 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 982 | static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
| 983 | { |
Linus Walleij | cdcb0ab | 2014-04-29 11:00:40 -0700 | [diff] [blame] | 984 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 985 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 986 | const struct msm_pingroup *g; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 987 | unsigned long flags; |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 988 | bool was_enabled; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 989 | u32 val; |
| 990 | |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 991 | if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) { |
| 992 | set_bit(d->hwirq, pctrl->dual_edge_irqs); |
| 993 | irq_set_handler_locked(d, handle_fasteoi_ack_irq); |
| 994 | msm_gpio_update_dual_edge_parent(d); |
| 995 | return 0; |
| 996 | } |
| 997 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 998 | if (d->parent_data) |
| 999 | irq_chip_set_type_parent(d, type); |
| 1000 | |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 1001 | if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) { |
| 1002 | clear_bit(d->hwirq, pctrl->dual_edge_irqs); |
| 1003 | irq_set_handler_locked(d, handle_fasteoi_irq); |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1004 | return 0; |
Douglas Anderson | c3c0c2e | 2020-07-14 08:04:17 -0700 | [diff] [blame] | 1005 | } |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1006 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1007 | g = &pctrl->soc->groups[d->hwirq]; |
| 1008 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 1009 | raw_spin_lock_irqsave(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1010 | |
| 1011 | /* |
| 1012 | * For hw without possibility of detecting both edges |
| 1013 | */ |
| 1014 | if (g->intr_detection_width == 1 && type == IRQ_TYPE_EDGE_BOTH) |
| 1015 | set_bit(d->hwirq, pctrl->dual_edge_irqs); |
| 1016 | else |
| 1017 | clear_bit(d->hwirq, pctrl->dual_edge_irqs); |
| 1018 | |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 1019 | /* Route interrupts to application cpu. |
| 1020 | * With intr_target_use_scm interrupts are routed to |
| 1021 | * application cpu using scm calls. |
| 1022 | */ |
| 1023 | if (pctrl->intr_target_use_scm) { |
| 1024 | u32 addr = pctrl->phys_base[0] + g->intr_target_reg; |
| 1025 | int ret; |
| 1026 | |
| 1027 | qcom_scm_io_readl(addr, &val); |
| 1028 | |
| 1029 | val &= ~(7 << g->intr_target_bit); |
| 1030 | val |= g->intr_target_kpss_val << g->intr_target_bit; |
| 1031 | |
| 1032 | ret = qcom_scm_io_writel(addr, val); |
| 1033 | if (ret) |
| 1034 | dev_err(pctrl->dev, |
| 1035 | "Failed routing %lu interrupt to Apps proc", |
| 1036 | d->hwirq); |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 1037 | } else { |
| 1038 | val = msm_readl_intr_target(pctrl, g); |
| 1039 | val &= ~(7 << g->intr_target_bit); |
| 1040 | val |= g->intr_target_kpss_val << g->intr_target_bit; |
| 1041 | msm_writel_intr_target(val, pctrl, g); |
| 1042 | } |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1043 | |
| 1044 | /* Update configuration for gpio. |
| 1045 | * RAW_STATUS_EN is left on for all gpio irqs. Due to the |
| 1046 | * internal circuitry of TLMM, toggling the RAW_STATUS |
| 1047 | * could cause the INTR_STATUS to be set for EDGE interrupts. |
| 1048 | */ |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 1049 | val = msm_readl_intr_cfg(pctrl, g); |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 1050 | was_enabled = val & BIT(g->intr_raw_status_bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1051 | val |= BIT(g->intr_raw_status_bit); |
| 1052 | if (g->intr_detection_width == 2) { |
| 1053 | val &= ~(3 << g->intr_detection_bit); |
| 1054 | val &= ~(1 << g->intr_polarity_bit); |
| 1055 | switch (type) { |
| 1056 | case IRQ_TYPE_EDGE_RISING: |
| 1057 | val |= 1 << g->intr_detection_bit; |
| 1058 | val |= BIT(g->intr_polarity_bit); |
| 1059 | break; |
| 1060 | case IRQ_TYPE_EDGE_FALLING: |
| 1061 | val |= 2 << g->intr_detection_bit; |
| 1062 | val |= BIT(g->intr_polarity_bit); |
| 1063 | break; |
| 1064 | case IRQ_TYPE_EDGE_BOTH: |
| 1065 | val |= 3 << g->intr_detection_bit; |
| 1066 | val |= BIT(g->intr_polarity_bit); |
| 1067 | break; |
| 1068 | case IRQ_TYPE_LEVEL_LOW: |
| 1069 | break; |
| 1070 | case IRQ_TYPE_LEVEL_HIGH: |
| 1071 | val |= BIT(g->intr_polarity_bit); |
| 1072 | break; |
| 1073 | } |
| 1074 | } else if (g->intr_detection_width == 1) { |
| 1075 | val &= ~(1 << g->intr_detection_bit); |
| 1076 | val &= ~(1 << g->intr_polarity_bit); |
| 1077 | switch (type) { |
| 1078 | case IRQ_TYPE_EDGE_RISING: |
| 1079 | val |= BIT(g->intr_detection_bit); |
| 1080 | val |= BIT(g->intr_polarity_bit); |
| 1081 | break; |
| 1082 | case IRQ_TYPE_EDGE_FALLING: |
| 1083 | val |= BIT(g->intr_detection_bit); |
| 1084 | break; |
| 1085 | case IRQ_TYPE_EDGE_BOTH: |
| 1086 | val |= BIT(g->intr_detection_bit); |
Bjorn Andersson | 48f15e9 | 2014-03-31 14:49:54 -0700 | [diff] [blame] | 1087 | val |= BIT(g->intr_polarity_bit); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1088 | break; |
| 1089 | case IRQ_TYPE_LEVEL_LOW: |
| 1090 | break; |
| 1091 | case IRQ_TYPE_LEVEL_HIGH: |
| 1092 | val |= BIT(g->intr_polarity_bit); |
| 1093 | break; |
| 1094 | } |
| 1095 | } else { |
| 1096 | BUG(); |
| 1097 | } |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 1098 | msm_writel_intr_cfg(val, pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1099 | |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 1100 | /* |
| 1101 | * The first time we set RAW_STATUS_EN it could trigger an interrupt. |
| 1102 | * Clear the interrupt. This is safe because we have |
| 1103 | * IRQCHIP_SET_TYPE_MASKED. |
| 1104 | */ |
| 1105 | if (!was_enabled) |
| 1106 | msm_ack_intr_status(pctrl, g); |
| 1107 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1108 | if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) |
| 1109 | msm_gpio_update_dual_edge_pos(pctrl, g, d); |
| 1110 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 1111 | raw_spin_unlock_irqrestore(&pctrl->lock, flags); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1112 | |
| 1113 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
Thomas Gleixner | 34c0ad8 | 2015-06-23 15:52:51 +0200 | [diff] [blame] | 1114 | irq_set_handler_locked(d, handle_level_irq); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1115 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
Thomas Gleixner | 34c0ad8 | 2015-06-23 15:52:51 +0200 | [diff] [blame] | 1116 | irq_set_handler_locked(d, handle_edge_irq); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1117 | |
| 1118 | return 0; |
| 1119 | } |
| 1120 | |
| 1121 | static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) |
| 1122 | { |
Linus Walleij | cdcb0ab | 2014-04-29 11:00:40 -0700 | [diff] [blame] | 1123 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 1124 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1125 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1126 | /* |
| 1127 | * While they may not wake up when the TLMM is powered off, |
| 1128 | * some GPIOs would like to wakeup the system from suspend |
| 1129 | * when TLMM is powered on. To allow that, enable the GPIO |
| 1130 | * summary line to be wakeup capable at GIC. |
| 1131 | */ |
Maulik Shah | f41aaca | 2020-09-28 10:02:00 +0530 | [diff] [blame] | 1132 | if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 1133 | return irq_chip_set_wake_parent(d, on); |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1134 | |
Maulik Shah | f41aaca | 2020-09-28 10:02:00 +0530 | [diff] [blame] | 1135 | return irq_set_irq_wake(pctrl->irq, on); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1136 | } |
| 1137 | |
Stephen Boyd | fe27312 | 2018-08-16 13:06:48 -0700 | [diff] [blame] | 1138 | static int msm_gpio_irq_reqres(struct irq_data *d) |
| 1139 | { |
| 1140 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 1141 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 1142 | int ret; |
| 1143 | |
| 1144 | if (!try_module_get(gc->owner)) |
| 1145 | return -ENODEV; |
| 1146 | |
| 1147 | ret = msm_pinmux_request_gpio(pctrl->pctrl, NULL, d->hwirq); |
| 1148 | if (ret) |
| 1149 | goto out; |
| 1150 | msm_gpio_direction_input(gc, d->hwirq); |
| 1151 | |
| 1152 | if (gpiochip_lock_as_irq(gc, d->hwirq)) { |
| 1153 | dev_err(gc->parent, |
| 1154 | "unable to lock HW IRQ %lu for IRQ\n", |
| 1155 | d->hwirq); |
| 1156 | ret = -EINVAL; |
| 1157 | goto out; |
| 1158 | } |
Maulik Shah | 71266d9 | 2020-11-05 13:08:04 +0530 | [diff] [blame] | 1159 | |
| 1160 | /* |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 1161 | * The disable / clear-enable workaround we do in msm_pinmux_set_mux() |
| 1162 | * only works if disable is not lazy since we only clear any bogus |
| 1163 | * interrupt in hardware. Explicitly mark the interrupt as UNLAZY. |
Maulik Shah | 71266d9 | 2020-11-05 13:08:04 +0530 | [diff] [blame] | 1164 | */ |
Douglas Anderson | cf9d052 | 2021-01-14 19:16:24 -0800 | [diff] [blame] | 1165 | irq_set_status_flags(d->irq, IRQ_DISABLE_UNLAZY); |
Maulik Shah | 71266d9 | 2020-11-05 13:08:04 +0530 | [diff] [blame] | 1166 | |
Stephen Boyd | fe27312 | 2018-08-16 13:06:48 -0700 | [diff] [blame] | 1167 | return 0; |
| 1168 | out: |
| 1169 | module_put(gc->owner); |
| 1170 | return ret; |
| 1171 | } |
| 1172 | |
| 1173 | static void msm_gpio_irq_relres(struct irq_data *d) |
| 1174 | { |
| 1175 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 1176 | |
| 1177 | gpiochip_unlock_as_irq(gc, d->hwirq); |
| 1178 | module_put(gc->owner); |
| 1179 | } |
| 1180 | |
Venkata Narendra Kumar Gutta | dca4f40 | 2020-05-01 12:00:17 +0530 | [diff] [blame] | 1181 | static int msm_gpio_irq_set_affinity(struct irq_data *d, |
| 1182 | const struct cpumask *dest, bool force) |
| 1183 | { |
| 1184 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 1185 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 1186 | |
| 1187 | if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 1188 | return irq_chip_set_affinity_parent(d, dest, force); |
| 1189 | |
Manivannan Sadhasivam | b9dc88d | 2022-01-13 21:56:17 +0530 | [diff] [blame] | 1190 | return -EINVAL; |
Venkata Narendra Kumar Gutta | dca4f40 | 2020-05-01 12:00:17 +0530 | [diff] [blame] | 1191 | } |
| 1192 | |
| 1193 | static int msm_gpio_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) |
| 1194 | { |
| 1195 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 1196 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 1197 | |
| 1198 | if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) |
| 1199 | return irq_chip_set_vcpu_affinity_parent(d, vcpu_info); |
| 1200 | |
Manivannan Sadhasivam | b9dc88d | 2022-01-13 21:56:17 +0530 | [diff] [blame] | 1201 | return -EINVAL; |
Venkata Narendra Kumar Gutta | dca4f40 | 2020-05-01 12:00:17 +0530 | [diff] [blame] | 1202 | } |
| 1203 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 1204 | static void msm_gpio_irq_handler(struct irq_desc *desc) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1205 | { |
Linus Walleij | cdcb0ab | 2014-04-29 11:00:40 -0700 | [diff] [blame] | 1206 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1207 | const struct msm_pingroup *g; |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 1208 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
Jiang Liu | 5663bb2 | 2015-06-04 12:13:16 +0800 | [diff] [blame] | 1209 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1210 | int handled = 0; |
| 1211 | u32 val; |
| 1212 | int i; |
| 1213 | |
| 1214 | chained_irq_enter(chip, desc); |
| 1215 | |
| 1216 | /* |
Bjorn Andersson | 1f2b239 | 2013-12-14 23:01:51 -0800 | [diff] [blame] | 1217 | * Each pin has it's own IRQ status register, so use |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1218 | * enabled_irq bitmap to limit the number of reads. |
| 1219 | */ |
| 1220 | for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { |
| 1221 | g = &pctrl->soc->groups[i]; |
Bjorn Andersson | 6c73698 | 2018-09-24 15:17:45 -0700 | [diff] [blame] | 1222 | val = msm_readl_intr_status(pctrl, g); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1223 | if (val & BIT(g->intr_status_bit)) { |
Marc Zyngier | a9cb09b | 2021-05-04 17:42:18 +0100 | [diff] [blame] | 1224 | generic_handle_domain_irq(gc->irq.domain, i); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1225 | handled++; |
| 1226 | } |
| 1227 | } |
| 1228 | |
Bjorn Andersson | 1f2b239 | 2013-12-14 23:01:51 -0800 | [diff] [blame] | 1229 | /* No interrupts were flagged */ |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1230 | if (handled == 0) |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 1231 | handle_bad_irq(desc); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1232 | |
| 1233 | chained_irq_exit(chip, desc); |
| 1234 | } |
| 1235 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1236 | static int msm_gpio_wakeirq(struct gpio_chip *gc, |
| 1237 | unsigned int child, |
| 1238 | unsigned int child_type, |
| 1239 | unsigned int *parent, |
| 1240 | unsigned int *parent_type) |
| 1241 | { |
| 1242 | struct msm_pinctrl *pctrl = gpiochip_get_data(gc); |
| 1243 | const struct msm_gpio_wakeirq_map *map; |
| 1244 | int i; |
| 1245 | |
| 1246 | *parent = GPIO_NO_WAKE_IRQ; |
| 1247 | *parent_type = IRQ_TYPE_EDGE_RISING; |
| 1248 | |
| 1249 | for (i = 0; i < pctrl->soc->nwakeirq_map; i++) { |
| 1250 | map = &pctrl->soc->wakeirq_map[i]; |
| 1251 | if (map->gpio == child) { |
| 1252 | *parent = map->wakeirq; |
| 1253 | break; |
| 1254 | } |
| 1255 | } |
| 1256 | |
| 1257 | return 0; |
| 1258 | } |
| 1259 | |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 1260 | static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) |
| 1261 | { |
Lee Jones | 4c0efbf | 2019-06-10 09:42:08 +0100 | [diff] [blame] | 1262 | if (pctrl->soc->reserved_gpios) |
| 1263 | return true; |
| 1264 | |
Andy Shevchenko | 720b8ec | 2019-07-23 22:27:37 +0300 | [diff] [blame] | 1265 | return device_property_count_u16(pctrl->dev, "gpios") > 0; |
Stephen Boyd | 691bf5d | 2018-03-23 09:34:53 -0700 | [diff] [blame] | 1266 | } |
| 1267 | |
Marc Zyngier | 14dbe18 | 2022-04-19 15:18:43 +0100 | [diff] [blame] | 1268 | static const struct irq_chip msm_gpio_irq_chip = { |
| 1269 | .name = "msmgpio", |
| 1270 | .irq_enable = msm_gpio_irq_enable, |
| 1271 | .irq_disable = msm_gpio_irq_disable, |
| 1272 | .irq_mask = msm_gpio_irq_mask, |
| 1273 | .irq_unmask = msm_gpio_irq_unmask, |
| 1274 | .irq_ack = msm_gpio_irq_ack, |
| 1275 | .irq_eoi = msm_gpio_irq_eoi, |
| 1276 | .irq_set_type = msm_gpio_irq_set_type, |
| 1277 | .irq_set_wake = msm_gpio_irq_set_wake, |
| 1278 | .irq_request_resources = msm_gpio_irq_reqres, |
| 1279 | .irq_release_resources = msm_gpio_irq_relres, |
| 1280 | .irq_set_affinity = msm_gpio_irq_set_affinity, |
| 1281 | .irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity, |
| 1282 | .flags = (IRQCHIP_MASK_ON_SUSPEND | |
| 1283 | IRQCHIP_SET_TYPE_MASKED | |
| 1284 | IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND | |
| 1285 | IRQCHIP_IMMUTABLE), |
| 1286 | }; |
| 1287 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1288 | static int msm_gpio_init(struct msm_pinctrl *pctrl) |
| 1289 | { |
| 1290 | struct gpio_chip *chip; |
Linus Walleij | 0ce242a | 2019-07-24 10:38:28 +0200 | [diff] [blame] | 1291 | struct gpio_irq_chip *girq; |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1292 | int i, ret; |
| 1293 | unsigned gpio, ngpio = pctrl->soc->ngpios; |
| 1294 | struct device_node *np; |
| 1295 | bool skip; |
Stephen Boyd | dcd278b | 2014-03-06 22:44:41 -0800 | [diff] [blame] | 1296 | |
| 1297 | if (WARN_ON(ngpio > MAX_NR_GPIO)) |
| 1298 | return -EINVAL; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1299 | |
| 1300 | chip = &pctrl->chip; |
Bjorn Andersson | a7aa75a | 2018-01-28 16:59:48 -0800 | [diff] [blame] | 1301 | chip->base = -1; |
Stephen Boyd | dcd278b | 2014-03-06 22:44:41 -0800 | [diff] [blame] | 1302 | chip->ngpio = ngpio; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1303 | chip->label = dev_name(pctrl->dev); |
Linus Walleij | 58383c78 | 2015-11-04 09:56:26 +0100 | [diff] [blame] | 1304 | chip->parent = pctrl->dev; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1305 | chip->owner = THIS_MODULE; |
Linus Walleij | eb1e8bd | 2019-08-19 11:30:58 +0200 | [diff] [blame] | 1306 | if (msm_gpio_needs_valid_mask(pctrl)) |
| 1307 | chip->init_valid_mask = msm_gpio_init_valid_mask; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1308 | |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1309 | np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); |
| 1310 | if (np) { |
| 1311 | chip->irq.parent_domain = irq_find_matching_host(np, |
| 1312 | DOMAIN_BUS_WAKEUP); |
| 1313 | of_node_put(np); |
| 1314 | if (!chip->irq.parent_domain) |
| 1315 | return -EPROBE_DEFER; |
| 1316 | chip->irq.child_to_parent_hwirq = msm_gpio_wakeirq; |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1317 | /* |
| 1318 | * Let's skip handling the GPIOs, if the parent irqchip |
| 1319 | * is handling the direct connect IRQ of the GPIO. |
| 1320 | */ |
| 1321 | skip = irq_domain_qcom_handle_wakeup(chip->irq.parent_domain); |
| 1322 | for (i = 0; skip && i < pctrl->soc->nwakeirq_map; i++) { |
| 1323 | gpio = pctrl->soc->wakeirq_map[i].gpio; |
| 1324 | set_bit(gpio, pctrl->skip_wake_irqs); |
| 1325 | } |
| 1326 | } |
| 1327 | |
Linus Walleij | 0ce242a | 2019-07-24 10:38:28 +0200 | [diff] [blame] | 1328 | girq = &chip->irq; |
Marc Zyngier | 14dbe18 | 2022-04-19 15:18:43 +0100 | [diff] [blame] | 1329 | gpio_irq_chip_set_chip(girq, &msm_gpio_irq_chip); |
Linus Walleij | 0ce242a | 2019-07-24 10:38:28 +0200 | [diff] [blame] | 1330 | girq->parent_handler = msm_gpio_irq_handler; |
Lina Iyer | e35a6ae | 2019-11-15 15:11:51 -0700 | [diff] [blame] | 1331 | girq->fwnode = pctrl->dev->fwnode; |
Linus Walleij | 0ce242a | 2019-07-24 10:38:28 +0200 | [diff] [blame] | 1332 | girq->num_parents = 1; |
| 1333 | girq->parents = devm_kcalloc(pctrl->dev, 1, sizeof(*girq->parents), |
| 1334 | GFP_KERNEL); |
| 1335 | if (!girq->parents) |
| 1336 | return -ENOMEM; |
| 1337 | girq->default_type = IRQ_TYPE_NONE; |
| 1338 | girq->handler = handle_bad_irq; |
| 1339 | girq->parents[0] = pctrl->irq; |
| 1340 | |
Linus Walleij | fded3f4 | 2015-12-08 09:49:18 +0100 | [diff] [blame] | 1341 | ret = gpiochip_add_data(&pctrl->chip, pctrl); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1342 | if (ret) { |
| 1343 | dev_err(pctrl->dev, "Failed register gpiochip\n"); |
| 1344 | return ret; |
| 1345 | } |
| 1346 | |
Christian Lamparter | a86caa9 | 2018-05-21 22:57:37 +0200 | [diff] [blame] | 1347 | /* |
| 1348 | * For DeviceTree-supported systems, the gpio core checks the |
| 1349 | * pinctrl's device node for the "gpio-ranges" property. |
| 1350 | * If it is present, it takes care of adding the pin ranges |
| 1351 | * for the driver. In this case the driver can skip ahead. |
| 1352 | * |
| 1353 | * In order to remain compatible with older, existing DeviceTree |
| 1354 | * files which don't set the "gpio-ranges" property or systems that |
| 1355 | * utilize ACPI the driver has to call gpiochip_add_pin_range(). |
| 1356 | */ |
| 1357 | if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) { |
| 1358 | ret = gpiochip_add_pin_range(&pctrl->chip, |
| 1359 | dev_name(pctrl->dev), 0, 0, chip->ngpio); |
| 1360 | if (ret) { |
| 1361 | dev_err(pctrl->dev, "Failed to add pin range\n"); |
| 1362 | gpiochip_remove(&pctrl->chip); |
| 1363 | return ret; |
| 1364 | } |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1365 | } |
| 1366 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1367 | return 0; |
| 1368 | } |
| 1369 | |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 1370 | static int msm_ps_hold_restart(struct notifier_block *nb, unsigned long action, |
| 1371 | void *data) |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1372 | { |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 1373 | struct msm_pinctrl *pctrl = container_of(nb, struct msm_pinctrl, restart_nb); |
| 1374 | |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 1375 | writel(0, pctrl->regs[0] + PS_HOLD_OFFSET); |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 1376 | mdelay(1000); |
| 1377 | return NOTIFY_DONE; |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1378 | } |
| 1379 | |
Stephen Boyd | ad64498 | 2015-07-06 18:09:30 -0700 | [diff] [blame] | 1380 | static struct msm_pinctrl *poweroff_pctrl; |
| 1381 | |
| 1382 | static void msm_ps_hold_poweroff(void) |
| 1383 | { |
| 1384 | msm_ps_hold_restart(&poweroff_pctrl->restart_nb, 0, NULL); |
| 1385 | } |
| 1386 | |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1387 | static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) |
| 1388 | { |
Stephen Boyd | bcd53f8 | 2015-01-19 11:17:45 +0100 | [diff] [blame] | 1389 | int i; |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1390 | const struct msm_function *func = pctrl->soc->functions; |
| 1391 | |
Stephen Boyd | bcd53f8 | 2015-01-19 11:17:45 +0100 | [diff] [blame] | 1392 | for (i = 0; i < pctrl->soc->nfunctions; i++) |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1393 | if (!strcmp(func[i].name, "ps_hold")) { |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 1394 | pctrl->restart_nb.notifier_call = msm_ps_hold_restart; |
| 1395 | pctrl->restart_nb.priority = 128; |
| 1396 | if (register_restart_handler(&pctrl->restart_nb)) |
| 1397 | dev_err(pctrl->dev, |
| 1398 | "failed to setup restart handler.\n"); |
Stephen Boyd | ad64498 | 2015-07-06 18:09:30 -0700 | [diff] [blame] | 1399 | poweroff_pctrl = pctrl; |
| 1400 | pm_power_off = msm_ps_hold_poweroff; |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 1401 | break; |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1402 | } |
| 1403 | } |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1404 | |
Arnd Bergmann | d1040ea | 2018-12-10 21:59:45 +0100 | [diff] [blame] | 1405 | static __maybe_unused int msm_pinctrl_suspend(struct device *dev) |
Evan Green | 977d057 | 2018-11-16 10:58:53 -0800 | [diff] [blame] | 1406 | { |
| 1407 | struct msm_pinctrl *pctrl = dev_get_drvdata(dev); |
| 1408 | |
| 1409 | return pinctrl_force_sleep(pctrl->pctrl); |
| 1410 | } |
| 1411 | |
Arnd Bergmann | d1040ea | 2018-12-10 21:59:45 +0100 | [diff] [blame] | 1412 | static __maybe_unused int msm_pinctrl_resume(struct device *dev) |
Evan Green | 977d057 | 2018-11-16 10:58:53 -0800 | [diff] [blame] | 1413 | { |
| 1414 | struct msm_pinctrl *pctrl = dev_get_drvdata(dev); |
| 1415 | |
| 1416 | return pinctrl_force_default(pctrl->pctrl); |
| 1417 | } |
| 1418 | |
| 1419 | SIMPLE_DEV_PM_OPS(msm_pinctrl_dev_pm_ops, msm_pinctrl_suspend, |
| 1420 | msm_pinctrl_resume); |
| 1421 | |
| 1422 | EXPORT_SYMBOL(msm_pinctrl_dev_pm_ops); |
| 1423 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1424 | int msm_pinctrl_probe(struct platform_device *pdev, |
| 1425 | const struct msm_pinctrl_soc_data *soc_data) |
| 1426 | { |
| 1427 | struct msm_pinctrl *pctrl; |
| 1428 | struct resource *res; |
| 1429 | int ret; |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 1430 | int i; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1431 | |
| 1432 | pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); |
Markus Elfring | 203f4b0 | 2017-12-27 22:04:22 +0100 | [diff] [blame] | 1433 | if (!pctrl) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1434 | return -ENOMEM; |
Markus Elfring | 203f4b0 | 2017-12-27 22:04:22 +0100 | [diff] [blame] | 1435 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1436 | pctrl->dev = &pdev->dev; |
| 1437 | pctrl->soc = soc_data; |
| 1438 | pctrl->chip = msm_gpio_template; |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 1439 | pctrl->intr_target_use_scm = of_device_is_compatible( |
| 1440 | pctrl->dev->of_node, |
| 1441 | "qcom,ipq8064-pinctrl"); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1442 | |
Julia Cartwright | 47b03ca | 2017-01-20 10:13:47 -0600 | [diff] [blame] | 1443 | raw_spin_lock_init(&pctrl->lock); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1444 | |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 1445 | if (soc_data->tiles) { |
| 1446 | for (i = 0; i < soc_data->ntiles; i++) { |
| 1447 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 1448 | soc_data->tiles[i]); |
| 1449 | pctrl->regs[i] = devm_ioremap_resource(&pdev->dev, res); |
| 1450 | if (IS_ERR(pctrl->regs[i])) |
| 1451 | return PTR_ERR(pctrl->regs[i]); |
| 1452 | } |
| 1453 | } else { |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 1454 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1455 | pctrl->regs[0] = devm_ioremap_resource(&pdev->dev, res); |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 1456 | if (IS_ERR(pctrl->regs[0])) |
| 1457 | return PTR_ERR(pctrl->regs[0]); |
Ajay Kishore | 13bec8d | 2020-03-27 23:32:08 +0100 | [diff] [blame] | 1458 | |
| 1459 | pctrl->phys_base[0] = res->start; |
Bjorn Andersson | a46d5e9 | 2018-09-24 15:17:46 -0700 | [diff] [blame] | 1460 | } |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1461 | |
Pramod Gurav | 3274558 | 2014-08-29 20:00:59 +0530 | [diff] [blame] | 1462 | msm_pinctrl_setup_pm_reset(pctrl); |
| 1463 | |
Bjorn Andersson | f393e48 | 2013-12-14 23:01:52 -0800 | [diff] [blame] | 1464 | pctrl->irq = platform_get_irq(pdev, 0); |
Stephen Boyd | 64c4dcb | 2019-07-30 11:15:33 -0700 | [diff] [blame] | 1465 | if (pctrl->irq < 0) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1466 | return pctrl->irq; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1467 | |
Timur Tabi | f265e8b | 2018-04-25 17:43:26 -0500 | [diff] [blame] | 1468 | pctrl->desc.owner = THIS_MODULE; |
| 1469 | pctrl->desc.pctlops = &msm_pinctrl_ops; |
| 1470 | pctrl->desc.pmxops = &msm_pinmux_ops; |
| 1471 | pctrl->desc.confops = &msm_pinconf_ops; |
| 1472 | pctrl->desc.name = dev_name(&pdev->dev); |
| 1473 | pctrl->desc.pins = pctrl->soc->pins; |
| 1474 | pctrl->desc.npins = pctrl->soc->npins; |
| 1475 | |
| 1476 | pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl); |
Masahiro Yamada | 323de9e | 2015-06-09 13:01:16 +0900 | [diff] [blame] | 1477 | if (IS_ERR(pctrl->pctrl)) { |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1478 | dev_err(&pdev->dev, "Couldn't register pinctrl driver\n"); |
Masahiro Yamada | 323de9e | 2015-06-09 13:01:16 +0900 | [diff] [blame] | 1479 | return PTR_ERR(pctrl->pctrl); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1480 | } |
| 1481 | |
| 1482 | ret = msm_gpio_init(pctrl); |
Laxman Dewangan | fe0267f | 2016-02-24 14:44:07 +0530 | [diff] [blame] | 1483 | if (ret) |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1484 | return ret; |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1485 | |
| 1486 | platform_set_drvdata(pdev, pctrl); |
| 1487 | |
| 1488 | dev_dbg(&pdev->dev, "Probed Qualcomm pinctrl driver\n"); |
| 1489 | |
| 1490 | return 0; |
| 1491 | } |
| 1492 | EXPORT_SYMBOL(msm_pinctrl_probe); |
| 1493 | |
| 1494 | int msm_pinctrl_remove(struct platform_device *pdev) |
| 1495 | { |
| 1496 | struct msm_pinctrl *pctrl = platform_get_drvdata(pdev); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1497 | |
Linus Walleij | 2fcea6c | 2014-09-16 15:05:41 -0700 | [diff] [blame] | 1498 | gpiochip_remove(&pctrl->chip); |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1499 | |
Josh Cartwright | cf1fc18 | 2014-09-23 15:59:53 -0500 | [diff] [blame] | 1500 | unregister_restart_handler(&pctrl->restart_nb); |
| 1501 | |
Bjorn Andersson | f365be0 | 2013-12-05 18:10:03 -0800 | [diff] [blame] | 1502 | return 0; |
| 1503 | } |
| 1504 | EXPORT_SYMBOL(msm_pinctrl_remove); |
| 1505 | |
John Stultz | 38e86f5 | 2020-11-06 04:27:09 +0000 | [diff] [blame] | 1506 | MODULE_DESCRIPTION("Qualcomm Technologies, Inc. TLMM driver"); |
| 1507 | MODULE_LICENSE("GPL v2"); |