blob: 2d14774af6b41c6628b3b0fdb47875648e1179f0 [file] [log] [blame]
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
Paul Mackerras14cf11a2005-09-26 16:04:21 +10002 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
11 *
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
14 *
Benjamin Herrenschmidt0ebc4cd2009-06-02 21:17:38 +000015 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
17 * variants.
Paul Mackerras14cf11a2005-09-26 16:04:21 +100018 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 */
24
Paul Mackerras14cf11a2005-09-26 16:04:21 +100025#include <linux/threads.h>
Paul Gortmakerc1416112014-01-09 00:44:29 -050026#include <linux/init.h>
Paul Mackerrasb5bbeb22005-10-10 14:01:07 +100027#include <asm/reg.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100028#include <asm/page.h>
29#include <asm/mmu.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100030#include <asm/ppc_asm.h>
31#include <asm/asm-offsets.h>
32#include <asm/bug.h>
33#include <asm/cputable.h>
34#include <asm/setup.h>
35#include <asm/hvcall.h>
David Gibson6cb7bfe2005-10-21 15:45:50 +100036#include <asm/thread_info.h>
Stephen Rothwell3f639ee2006-09-25 18:19:00 +100037#include <asm/firmware.h>
Stephen Rothwell16a15a32007-08-20 14:58:36 +100038#include <asm/page_64.h>
Benjamin Herrenschmidt945feb12008-04-17 14:35:01 +100039#include <asm/irqflags.h>
Alexander Graf2191d6572010-04-16 00:11:32 +020040#include <asm/kvm_book3s_asm.h>
Stephen Rothwell46f52212010-11-18 15:06:17 +000041#include <asm/ptrace.h>
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110042#include <asm/hw_irq.h>
chenhui zhao6becef72015-11-20 17:14:02 +080043#include <asm/cputhreads.h>
Scott Wood7a25d912016-03-15 01:47:38 -050044#include <asm/ppc-opcode.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100045
Lucas De Marchi25985ed2011-03-30 22:57:33 -030046/* The physical memory is laid out such that the secondary processor
Benjamin Herrenschmidt0ebc4cd2009-06-02 21:17:38 +000047 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
48 * using the layout described in exceptions-64s.S
Paul Mackerras14cf11a2005-09-26 16:04:21 +100049 */
50
51/*
52 * Entering into this code we make the following assumptions:
Benjamin Herrenschmidt0ebc4cd2009-06-02 21:17:38 +000053 *
54 * For pSeries or server processors:
Paul Mackerras14cf11a2005-09-26 16:04:21 +100055 * 1. The MMU is off & open firmware is running in real mode.
56 * 2. The kernel is entered at __start
Benjamin Herrenschmidt27f448882011-09-19 18:27:58 +000057 * -or- For OPAL entry:
58 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
Benjamin Herrenschmidtdaea1172011-09-19 17:44:59 +000059 * with device-tree in gpr3. We also get OPAL base in r8 and
60 * entry in r9 for debugging purposes
Benjamin Herrenschmidt27f448882011-09-19 18:27:58 +000061 * 2. Secondary processors enter at 0x60 with PIR in gpr3
Paul Mackerras14cf11a2005-09-26 16:04:21 +100062 *
Benjamin Herrenschmidt0ebc4cd2009-06-02 21:17:38 +000063 * For Book3E processors:
64 * 1. The MMU is on running in AS0 in a state defined in ePAPR
65 * 2. The kernel is entered at __start
Paul Mackerras14cf11a2005-09-26 16:04:21 +100066 */
67
68 .text
69 .globl _stext
70_stext:
Paul Mackerras14cf11a2005-09-26 16:04:21 +100071_GLOBAL(__start)
72 /* NOP this out unconditionally */
73BEGIN_FTR_SECTION
Benjamin Herrenschmidt5c0484e2013-09-23 12:04:45 +100074 FIXUP_ENDIAN
Anton Blanchardb1576fe2014-02-04 16:04:35 +110075 b __start_initialization_multiplatform
Paul Mackerras14cf11a2005-09-26 16:04:21 +100076END_FTR_SECTION(0, 1)
Paul Mackerras14cf11a2005-09-26 16:04:21 +100077
78 /* Catch branch to 0 in real mode */
79 trap
80
Anton Blanchard2751b622014-03-11 11:54:06 +110081 /* Secondary processors spin on this value until it becomes non-zero.
82 * When non-zero, it contains the real address of the function the cpu
83 * should jump to.
Paul Mackerras1f6a93e2008-08-30 11:40:24 +100084 */
Olof Johansson7d4151b2013-12-28 13:01:47 -080085 .balign 8
Paul Mackerras14cf11a2005-09-26 16:04:21 +100086 .globl __secondary_hold_spinloop
87__secondary_hold_spinloop:
88 .llong 0x0
89
90 /* Secondary processors write this value with their cpu # */
91 /* after they enter the spin loop immediately below. */
92 .globl __secondary_hold_acknowledge
93__secondary_hold_acknowledge:
94 .llong 0x0
95
Sonny Rao928a3192010-11-18 00:35:07 +000096#ifdef CONFIG_RELOCATABLE
Milton Miller8b8b0cc2008-10-23 18:41:09 +000097 /* This flag is set to 1 by a loader if the kernel should run
98 * at the loaded address instead of the linked address. This
99 * is used by kexec-tools to keep the the kdump kernel in the
100 * crash_kernel region. The loader is responsible for
101 * observing the alignment requirement.
102 */
103 /* Do not move this variable as kexec-tools knows about it. */
104 . = 0x5c
105 .globl __run_at_load
106__run_at_load:
107 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
108#endif
109
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000110 . = 0x60
111/*
Geoff Levand75423b72007-06-16 08:06:23 +1000112 * The following code is used to hold secondary processors
113 * in a spin loop after they have entered the kernel, but
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000114 * before the bulk of the kernel has been relocated. This code
115 * is relocated to physical address 0x60 before prom_init is run.
116 * All of it must fit below the first exception vector at 0x100.
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000117 * Use .globl here not _GLOBAL because we want __secondary_hold
118 * to be the actual text address, not a descriptor.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000119 */
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000120 .globl __secondary_hold
121__secondary_hold:
Benjamin Herrenschmidt5c0484e2013-09-23 12:04:45 +1000122 FIXUP_ENDIAN
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000123#ifndef CONFIG_PPC_BOOK3E
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000124 mfmsr r24
125 ori r24,r24,MSR_RI
126 mtmsrd r24 /* RI on */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000127#endif
Anton Blanchardf1870f72006-02-13 18:11:13 +1100128 /* Grab our physical cpu number */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000129 mr r24,r3
Jimi Xenidis96f013f2012-12-03 17:05:47 +0000130 /* stash r4 for book3e */
131 mr r25,r4
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000132
133 /* Tell the master cpu we're here */
134 /* Relocation is off & we are located at an address less */
135 /* than 0x100, so only need to grab low order offset. */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000136 std r24,__secondary_hold_acknowledge-_stext(0)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000137 sync
138
Jimi Xenidis96f013f2012-12-03 17:05:47 +0000139 li r26,0
140#ifdef CONFIG_PPC_BOOK3E
141 tovirt(r26,r26)
142#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000143 /* All secondary cpus wait here until told to start. */
Anton Blanchardcc7efbf2014-02-04 16:07:47 +1100144100: ld r12,__secondary_hold_spinloop-_stext(r26)
145 cmpdi 0,r12,0
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000146 beq 100b
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000147
Anton Blanchardf1870f72006-02-13 18:11:13 +1100148#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
Jimi Xenidis96f013f2012-12-03 17:05:47 +0000149#ifdef CONFIG_PPC_BOOK3E
Anton Blanchardcc7efbf2014-02-04 16:07:47 +1100150 tovirt(r12,r12)
Jimi Xenidis96f013f2012-12-03 17:05:47 +0000151#endif
Anton Blanchardcc7efbf2014-02-04 16:07:47 +1100152 mtctr r12
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000153 mr r3,r24
Jimi Xenidis96f013f2012-12-03 17:05:47 +0000154 /*
155 * it may be the case that other platforms have r4 right to
156 * begin with, this gives us some safety in case it is not
157 */
158#ifdef CONFIG_PPC_BOOK3E
159 mr r4,r25
160#else
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000161 li r4,0
Jimi Xenidis96f013f2012-12-03 17:05:47 +0000162#endif
Benjamin Herrenschmidtdd797732011-04-05 14:34:58 +1000163 /* Make sure that patched code is visible */
164 isync
Michael Ellerman758438a2005-12-05 15:49:00 -0600165 bctr
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000166#else
167 BUG_OPCODE
168#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000169
170/* This value is used to mark exception frames on the stack. */
171 .section ".toc","aw"
172exception_marker:
173 .tc ID_72656773_68657265[TC],0x7265677368657265
174 .text
175
176/*
Benjamin Herrenschmidt0ebc4cd2009-06-02 21:17:38 +0000177 * On server, we include the exception vectors code here as it
178 * relies on absolute addressing which is only possible within
179 * this compilation unit
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000180 */
Benjamin Herrenschmidt0ebc4cd2009-06-02 21:17:38 +0000181#ifdef CONFIG_PPC_BOOK3S
182#include "exceptions-64s.S"
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000183#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000184
Andy Fleminge16c8762011-12-08 01:20:27 -0600185#ifdef CONFIG_PPC_BOOK3E
chenhui zhaod17799f2015-11-20 17:13:59 +0800186/*
chenhui zhao6becef72015-11-20 17:14:02 +0800187 * The booting_thread_hwid holds the thread id we want to boot in cpu
188 * hotplug case. It is set by cpu hotplug code, and is invalid by default.
189 * The thread id is the same as the initial value of SPRN_PIR[THREAD_ID]
190 * bit field.
191 */
192 .globl booting_thread_hwid
193booting_thread_hwid:
194 .long INVALID_THREAD_HWID
195 .align 3
196/*
197 * start a thread in the same core
198 * input parameters:
199 * r3 = the thread physical id
200 * r4 = the entry point where thread starts
201 */
202_GLOBAL(book3e_start_thread)
203 LOAD_REG_IMMEDIATE(r5, MSR_KERNEL)
204 cmpi 0, r3, 0
205 beq 10f
206 cmpi 0, r3, 1
207 beq 11f
208 /* If the thread id is invalid, just exit. */
209 b 13f
21010:
Scott Wood7a25d912016-03-15 01:47:38 -0500211 MTTMR(TMRN_IMSR0, 5)
212 MTTMR(TMRN_INIA0, 4)
chenhui zhao6becef72015-11-20 17:14:02 +0800213 b 12f
21411:
Scott Wood7a25d912016-03-15 01:47:38 -0500215 MTTMR(TMRN_IMSR1, 5)
216 MTTMR(TMRN_INIA1, 4)
chenhui zhao6becef72015-11-20 17:14:02 +080021712:
218 isync
219 li r6, 1
220 sld r6, r6, r3
221 mtspr SPRN_TENS, r6
22213:
223 blr
224
225/*
chenhui zhaod17799f2015-11-20 17:13:59 +0800226 * stop a thread in the same core
227 * input parameter:
228 * r3 = the thread physical id
229 */
230_GLOBAL(book3e_stop_thread)
231 cmpi 0, r3, 0
232 beq 10f
233 cmpi 0, r3, 1
234 beq 10f
235 /* If the thread id is invalid, just exit. */
236 b 13f
23710:
238 li r4, 1
239 sld r4, r4, r3
240 mtspr SPRN_TENC, r4
24113:
242 blr
243
Andy Fleminge16c8762011-12-08 01:20:27 -0600244_GLOBAL(fsl_secondary_thread_init)
Scott Woodf34b3e12015-10-06 22:48:12 -0500245 mfspr r4,SPRN_BUCSR
246
Andy Fleminge16c8762011-12-08 01:20:27 -0600247 /* Enable branch prediction */
248 lis r3,BUCSR_INIT@h
249 ori r3,r3,BUCSR_INIT@l
250 mtspr SPRN_BUCSR,r3
251 isync
252
253 /*
254 * Fix PIR to match the linear numbering in the device tree.
255 *
256 * On e6500, the reset value of PIR uses the low three bits for
257 * the thread within a core, and the upper bits for the core
258 * number. There are two threads per core, so shift everything
259 * but the low bit right by two bits so that the cpu numbering is
260 * continuous.
Scott Woodf34b3e12015-10-06 22:48:12 -0500261 *
262 * If the old value of BUCSR is non-zero, this thread has run
263 * before. Thus, we assume we are coming from kexec or a similar
264 * scenario, and PIR is already set to the correct value. This
265 * is a bit of a hack, but there are limited opportunities for
266 * getting information into the thread and the alternatives
267 * seemed like they'd be overkill. We can't tell just by looking
268 * at the old PIR value which state it's in, since the same value
269 * could be valid for one thread out of reset and for a different
270 * thread in Linux.
Andy Fleminge16c8762011-12-08 01:20:27 -0600271 */
Scott Woodf34b3e12015-10-06 22:48:12 -0500272
Andy Fleminge16c8762011-12-08 01:20:27 -0600273 mfspr r3, SPRN_PIR
Scott Woodf34b3e12015-10-06 22:48:12 -0500274 cmpwi r4,0
275 bne 1f
Andy Fleminge16c8762011-12-08 01:20:27 -0600276 rlwimi r3, r3, 30, 2, 30
277 mtspr SPRN_PIR, r3
Scott Woodf34b3e12015-10-06 22:48:12 -05002781:
Andy Fleminge16c8762011-12-08 01:20:27 -0600279#endif
280
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000281_GLOBAL(generic_secondary_thread_init)
282 mr r24,r3
283
284 /* turn on 64-bit mode */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100285 bl enable_64b_mode
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000286
287 /* get a valid TOC pointer, wherever we're mapped at */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100288 bl relative_toc
Anton Blanchard1fbe9cf2012-11-26 17:41:08 +0000289 tovirt(r2,r2)
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000290
291#ifdef CONFIG_PPC_BOOK3E
292 /* Book3E initialization */
293 mr r3,r24
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100294 bl book3e_secondary_thread_init
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000295#endif
296 b generic_secondary_common_init
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000297
298/*
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500299 * On pSeries and most other platforms, secondary processors spin
300 * in the following code.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000301 * At entry, r3 = this processor's number (physical cpu id)
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000302 *
303 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
304 * this core already exists (setup via some other mechanism such
305 * as SCOM before entry).
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000306 */
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500307_GLOBAL(generic_secondary_smp_init)
Benjamin Herrenschmidt5c0484e2013-09-23 12:04:45 +1000308 FIXUP_ENDIAN
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000309 mr r24,r3
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000310 mr r25,r4
311
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000312 /* turn on 64-bit mode */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100313 bl enable_64b_mode
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000314
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000315 /* get a valid TOC pointer, wherever we're mapped at */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100316 bl relative_toc
Anton Blanchard1fbe9cf2012-11-26 17:41:08 +0000317 tovirt(r2,r2)
Paul Mackerrase31aa452008-08-30 11:41:12 +1000318
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000319#ifdef CONFIG_PPC_BOOK3E
320 /* Book3E initialization */
321 mr r3,r24
322 mr r4,r25
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100323 bl book3e_secondary_core_init
chenhui zhao6becef72015-11-20 17:14:02 +0800324
325/*
326 * After common core init has finished, check if the current thread is the
327 * one we wanted to boot. If not, start the specified thread and stop the
328 * current thread.
329 */
330 LOAD_REG_ADDR(r4, booting_thread_hwid)
331 lwz r3, 0(r4)
332 li r5, INVALID_THREAD_HWID
333 cmpw r3, r5
334 beq 20f
335
336 /*
337 * The value of booting_thread_hwid has been stored in r3,
338 * so make it invalid.
339 */
340 stw r5, 0(r4)
341
342 /*
343 * Get the current thread id and check if it is the one we wanted.
344 * If not, start the one specified in booting_thread_hwid and stop
345 * the current thread.
346 */
347 mfspr r8, SPRN_TIR
348 cmpw r3, r8
349 beq 20f
350
351 /* start the specified thread */
352 LOAD_REG_ADDR(r5, fsl_secondary_thread_init)
353 ld r4, 0(r5)
354 bl book3e_start_thread
355
356 /* stop the current thread */
357 mr r3, r8
358 bl book3e_stop_thread
35910:
360 b 10b
36120:
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000362#endif
363
364generic_secondary_common_init:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000365 /* Set up a paca value for this processor. Since we have the
366 * physical cpu id in r24, we need to search the pacas to find
367 * which logical id maps to our physical one.
368 */
Michael Ellerman1426d5a2010-01-28 13:23:22 +0000369 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
370 ld r13,0(r13) /* Get base vaddr of paca array */
Milton Miller768d18a2011-05-10 19:28:37 +0000371#ifndef CONFIG_SMP
372 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100373 b kexec_wait /* wait for next kernel if !SMP */
Milton Miller768d18a2011-05-10 19:28:37 +0000374#else
375 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
376 lwz r7,0(r7) /* also the max paca allocated */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000377 li r5,0 /* logical cpu id */
3781: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
379 cmpw r6,r24 /* Compare to our id */
380 beq 2f
381 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
382 addi r5,r5,1
Milton Miller768d18a2011-05-10 19:28:37 +0000383 cmpw r5,r7 /* Check if more pacas exist */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000384 blt 1b
385
386 mr r3,r24 /* not found, copy phys to r3 */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100387 b kexec_wait /* next kernel might do better */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000388
Benjamin Herrenschmidt2dd60d72011-01-20 17:50:21 +11003892: SET_PACA(r13)
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000390#ifdef CONFIG_PPC_BOOK3E
391 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
392 mtspr SPRN_SPRG_TLB_EXFRAME,r12
393#endif
394
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000395 /* From now on, r24 is expected to be logical cpuid */
396 mr r24,r5
Sonny Raob6f6b982008-07-12 09:00:26 +1000397
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500398 /* See if we need to call a cpu state restore handler */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000399 LOAD_REG_ADDR(r23, cur_cpu_spec)
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500400 ld r23,0(r23)
Anton Blanchard2751b622014-03-11 11:54:06 +1100401 ld r12,CPU_SPEC_RESTORE(r23)
402 cmpdi 0,r12,0
Benjamin Herrenschmidt9d07bc82011-03-16 14:54:35 +1100403 beq 3f
Anton Blanchard2751b622014-03-11 11:54:06 +1100404#if !defined(_CALL_ELF) || _CALL_ELF != 2
405 ld r12,0(r12)
406#endif
Anton Blanchardcc7efbf2014-02-04 16:07:47 +1100407 mtctr r12
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500408 bctrl
409
Matt Evans7ac87ab2011-05-25 18:09:12 +00004103: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
Benjamin Herrenschmidt9d07bc82011-03-16 14:54:35 +1100411 lwarx r4,0,r3
412 subi r4,r4,1
413 stwcx. r4,0,r3
414 bne 3b
415 isync
416
4174: HMT_LOW
Benjamin Herrenschmidtad0693e2011-02-01 12:13:09 +1100418 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
419 /* start. */
Benjamin Herrenschmidtad0693e2011-02-01 12:13:09 +1100420 cmpwi 0,r23,0
Benjamin Herrenschmidt9d07bc82011-03-16 14:54:35 +1100421 beq 4b /* Loop until told to go */
Benjamin Herrenschmidtad0693e2011-02-01 12:13:09 +1100422
423 sync /* order paca.run and cur_cpu_spec */
Benjamin Herrenschmidt9d07bc82011-03-16 14:54:35 +1100424 isync /* In case code patching happened */
Benjamin Herrenschmidtad0693e2011-02-01 12:13:09 +1100425
Benjamin Herrenschmidt9d07bc82011-03-16 14:54:35 +1100426 /* Create a temp kernel stack for use before relocation is on. */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000427 ld r1,PACAEMERGSP(r13)
428 subi r1,r1,STACK_FRAME_OVERHEAD
429
Stephen Rothwellc7056772006-11-27 14:59:50 +1100430 b __secondary_start
Milton Miller768d18a2011-05-10 19:28:37 +0000431#endif /* SMP */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000432
Paul Mackerrase31aa452008-08-30 11:41:12 +1000433/*
434 * Turn the MMU off.
435 * Assumes we're mapped EA == RA if the MMU is on.
436 */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000437#ifdef CONFIG_PPC_BOOK3S
Anton Blanchard6a3bab92014-02-04 16:06:11 +1100438__mmu_off:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000439 mfmsr r3
440 andi. r0,r3,MSR_IR|MSR_DR
441 beqlr
Paul Mackerrase31aa452008-08-30 11:41:12 +1000442 mflr r4
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000443 andc r3,r3,r0
444 mtspr SPRN_SRR0,r4
445 mtspr SPRN_SRR1,r3
446 sync
447 rfid
448 b . /* prevent speculative execution */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000449#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000450
451
452/*
453 * Here is our main kernel entry point. We support currently 2 kind of entries
454 * depending on the value of r5.
455 *
456 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
457 * in r3...r7
458 *
459 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
460 * DT block, r4 is a physical pointer to the kernel itself
461 *
462 */
Anton Blanchard6a3bab92014-02-04 16:06:11 +1100463__start_initialization_multiplatform:
Paul Mackerrase31aa452008-08-30 11:41:12 +1000464 /* Make sure we are running in 64 bits mode */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100465 bl enable_64b_mode
Paul Mackerrase31aa452008-08-30 11:41:12 +1000466
467 /* Get TOC pointer (current runtime address) */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100468 bl relative_toc
Paul Mackerrase31aa452008-08-30 11:41:12 +1000469
470 /* find out where we are now */
471 bcl 20,31,$+4
4720: mflr r26 /* r26 = runtime addr here */
473 addis r26,r26,(_stext - 0b)@ha
474 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
475
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000476 /*
477 * Are we booted from a PROM Of-type client-interface ?
478 */
479 cmpldi cr0,r5,0
Stephen Rothwell939e60f62007-07-31 16:44:13 +1000480 beq 1f
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100481 b __boot_from_prom /* yes -> prom */
Stephen Rothwell939e60f62007-07-31 16:44:13 +10004821:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000483 /* Save parameters */
484 mr r31,r3
485 mr r30,r4
Benjamin Herrenschmidtdaea1172011-09-19 17:44:59 +0000486#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
487 /* Save OPAL entry */
488 mr r28,r8
489 mr r29,r9
490#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000491
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000492#ifdef CONFIG_PPC_BOOK3E
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100493 bl start_initialization_book3e
494 b __after_prom_start
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000495#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000496 /* Setup some critical 970 SPRs before switching MMU off */
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500497 mfspr r0,SPRN_PVR
498 srwi r0,r0,16
499 cmpwi r0,0x39 /* 970 */
500 beq 1f
501 cmpwi r0,0x3c /* 970FX */
502 beq 1f
503 cmpwi r0,0x44 /* 970MP */
Olof Johansson190a24f2006-10-25 17:32:40 -0500504 beq 1f
505 cmpwi r0,0x45 /* 970GX */
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500506 bne 2f
Anton Blanchardb1576fe2014-02-04 16:04:35 +11005071: bl __cpu_preinit_ppc970
Olof Johanssonf39b7a52006-08-11 00:07:08 -05005082:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000509
Paul Mackerrase31aa452008-08-30 11:41:12 +1000510 /* Switch off MMU if not already off */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100511 bl __mmu_off
512 b __after_prom_start
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000513#endif /* CONFIG_PPC_BOOK3E */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000514
Anton Blanchard6a3bab92014-02-04 16:06:11 +1100515__boot_from_prom:
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000516#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000517 /* Save parameters */
518 mr r31,r3
519 mr r30,r4
520 mr r29,r5
521 mr r28,r6
522 mr r27,r7
523
Olaf Hering60888572006-03-23 21:50:59 +0100524 /*
525 * Align the stack to 16-byte boundary
526 * Depending on the size and layout of the ELF sections in the initial
Paul Mackerrase31aa452008-08-30 11:41:12 +1000527 * boot binary, the stack pointer may be unaligned on PowerMac
Olaf Hering60888572006-03-23 21:50:59 +0100528 */
Linus Torvaldsc05b4772006-03-04 15:00:45 -0800529 rldicr r1,r1,0,59
530
Paul Mackerras549e8152008-08-30 11:43:47 +1000531#ifdef CONFIG_RELOCATABLE
532 /* Relocate code for where we are now */
533 mr r3,r26
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100534 bl relocate
Paul Mackerras549e8152008-08-30 11:43:47 +1000535#endif
536
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000537 /* Restore parameters */
538 mr r3,r31
539 mr r4,r30
540 mr r5,r29
541 mr r6,r28
542 mr r7,r27
543
544 /* Do all of the interaction with OF client interface */
Paul Mackerras549e8152008-08-30 11:43:47 +1000545 mr r8,r26
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100546 bl prom_init
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000547#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
548
549 /* We never return. We also hit that trap if trying to boot
550 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000551 trap
552
Anton Blanchard6a3bab92014-02-04 16:06:11 +1100553__after_prom_start:
Paul Mackerras549e8152008-08-30 11:43:47 +1000554#ifdef CONFIG_RELOCATABLE
555 /* process relocations for the final address of the kernel */
556 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
557 sldi r25,r25,32
Tiejun Chen1cb6e062015-10-06 22:48:15 -0500558#if defined(CONFIG_PPC_BOOK3E)
559 tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */
560#endif
Milton Miller8b8b0cc2008-10-23 18:41:09 +0000561 lwz r7,__run_at_load-_stext(r26)
Tiejun Chen1cb6e062015-10-06 22:48:15 -0500562#if defined(CONFIG_PPC_BOOK3E)
563 tophys(r26,r26)
564#endif
Sonny Rao928a3192010-11-18 00:35:07 +0000565 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
Mohan Kumar M54622f12008-10-21 17:38:10 +0000566 bne 1f
567 add r25,r25,r26
Mohan Kumar M54622f12008-10-21 17:38:10 +00005681: mr r3,r25
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100569 bl relocate
Tiejun Chen1cb6e062015-10-06 22:48:15 -0500570#if defined(CONFIG_PPC_BOOK3E)
571 /* IVPR needs to be set after relocation. */
572 bl init_core_book3e
573#endif
Paul Mackerras549e8152008-08-30 11:43:47 +1000574#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000575
576/*
Paul Mackerrase31aa452008-08-30 11:41:12 +1000577 * We need to run with _stext at physical address PHYSICAL_START.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000578 * This will leave some code in the first 256B of
579 * real memory, which are reserved for software use.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000580 *
581 * Note: This process overwrites the OF exception vectors.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000582 */
Paul Mackerras549e8152008-08-30 11:43:47 +1000583 li r3,0 /* target addr */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000584#ifdef CONFIG_PPC_BOOK3E
Tiejun Chen835c0312015-10-06 22:48:14 -0500585 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000586#endif
Paul Mackerras549e8152008-08-30 11:43:47 +1000587 mr. r4,r26 /* In some cases the loader may */
Tiejun Chen835c0312015-10-06 22:48:14 -0500588#if defined(CONFIG_PPC_BOOK3E)
589 tovirt(r4,r4)
590#endif
Paul Mackerrase31aa452008-08-30 11:41:12 +1000591 beq 9f /* have already put us at zero */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000592 li r6,0x100 /* Start offset, the first 0x100 */
593 /* bytes were copied earlier. */
594
Anton Blanchard11ee7e92012-11-11 19:01:05 +0000595#ifdef CONFIG_RELOCATABLE
Mohan Kumar M54622f12008-10-21 17:38:10 +0000596/*
597 * Check if the kernel has to be running as relocatable kernel based on the
Milton Miller8b8b0cc2008-10-23 18:41:09 +0000598 * variable __run_at_load, if it is set the kernel is treated as relocatable
Mohan Kumar M54622f12008-10-21 17:38:10 +0000599 * kernel, otherwise it will be moved to PHYSICAL_START
600 */
Tiejun Chen1cb6e062015-10-06 22:48:15 -0500601#if defined(CONFIG_PPC_BOOK3E)
602 tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */
603#endif
Milton Miller8b8b0cc2008-10-23 18:41:09 +0000604 lwz r7,__run_at_load-_stext(r26)
605 cmplwi cr0,r7,1
Mohan Kumar M54622f12008-10-21 17:38:10 +0000606 bne 3f
607
Tiejun Chen1cb6e062015-10-06 22:48:15 -0500608#ifdef CONFIG_PPC_BOOK3E
609 LOAD_REG_ADDR(r5, __end_interrupts)
610 LOAD_REG_ADDR(r11, _stext)
611 sub r5,r5,r11
612#else
Michael Neulingc1fb6812012-11-02 17:21:43 +1100613 /* just copy interrupts */
614 LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
Tiejun Chen1cb6e062015-10-06 22:48:15 -0500615#endif
Mohan Kumar M54622f12008-10-21 17:38:10 +0000616 b 5f
6173:
618#endif
619 lis r5,(copy_to_here - _stext)@ha
620 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
621
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100622 bl copy_and_flush /* copy the first n bytes */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000623 /* this includes the code being */
624 /* executed here. */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000625 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
Anton Blanchardcc7efbf2014-02-04 16:07:47 +1100626 addi r12,r8,(4f - _stext)@l /* that we just made */
627 mtctr r12
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000628 bctr
629
Anton Blanchard286e4f92013-12-23 12:19:51 +1100630.balign 8
Mohan Kumar M54622f12008-10-21 17:38:10 +0000631p_end: .llong _end - _stext
632
Paul Mackerrase31aa452008-08-30 11:41:12 +10006334: /* Now copy the rest of the kernel up to _end */
634 addis r5,r26,(p_end - _stext)@ha
635 ld r5,(p_end - _stext)@l(r5) /* get _end */
Anton Blanchardb1576fe2014-02-04 16:04:35 +11006365: bl copy_and_flush /* copy the rest */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000637
Anton Blanchardb1576fe2014-02-04 16:04:35 +11006389: b start_here_multiplatform
Paul Mackerrase31aa452008-08-30 11:41:12 +1000639
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000640/*
641 * Copy routine used to copy the kernel to start at physical address 0
642 * and flush and invalidate the caches as needed.
643 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
644 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
645 *
646 * Note: this routine *only* clobbers r0, r6 and lr
647 */
648_GLOBAL(copy_and_flush)
649 addi r5,r5,-8
650 addi r6,r6,-8
Olof Johansson5a2fe382006-09-06 14:34:41 -05006514: li r0,8 /* Use the smallest common */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000652 /* denominator cache line */
653 /* size. This results in */
654 /* extra cache line flushes */
655 /* but operation is correct. */
656 /* Can't get cache line size */
657 /* from NACA as it is being */
658 /* moved too. */
659
660 mtctr r0 /* put # words/line in ctr */
6613: addi r6,r6,8 /* copy a cache line */
662 ldx r0,r6,r4
663 stdx r0,r6,r3
664 bdnz 3b
665 dcbst r6,r3 /* write it to memory */
666 sync
667 icbi r6,r3 /* flush the icache line */
668 cmpld 0,r6,r5
669 blt 4b
670 sync
671 addi r5,r5,8
672 addi r6,r6,8
Michael Neuling29ce3c52013-04-24 00:30:09 +0000673 isync
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000674 blr
675
676.align 8
677copy_to_here:
678
679#ifdef CONFIG_SMP
680#ifdef CONFIG_PPC_PMAC
681/*
682 * On PowerMac, secondary processors starts from the reset vector, which
683 * is temporarily turned into a call to one of the functions below.
684 */
685 .section ".text";
686 .align 2 ;
687
Paul Mackerras35499c02005-10-22 16:02:39 +1000688 .globl __secondary_start_pmac_0
689__secondary_start_pmac_0:
690 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
691 li r24,0
692 b 1f
693 li r24,1
694 b 1f
695 li r24,2
696 b 1f
697 li r24,3
6981:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000699
700_GLOBAL(pmac_secondary_start)
701 /* turn on 64-bit mode */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100702 bl enable_64b_mode
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000703
Benjamin Herrenschmidtc478b582009-01-11 19:03:45 +0000704 li r0,0
705 mfspr r3,SPRN_HID4
706 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
707 sync
708 mtspr SPRN_HID4,r3
709 isync
710 sync
711 slbia
712
Paul Mackerrase31aa452008-08-30 11:41:12 +1000713 /* get TOC pointer (real address) */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100714 bl relative_toc
Anton Blanchard1fbe9cf2012-11-26 17:41:08 +0000715 tovirt(r2,r2)
Paul Mackerrase31aa452008-08-30 11:41:12 +1000716
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000717 /* Copy some CPU settings from CPU 0 */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100718 bl __restore_cpu_ppc970
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000719
720 /* pSeries do that early though I don't think we really need it */
721 mfmsr r3
722 ori r3,r3,MSR_RI
723 mtmsrd r3 /* RI on */
724
725 /* Set up a paca value for this processor. */
Michael Ellerman1426d5a2010-01-28 13:23:22 +0000726 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
727 ld r4,0(r4) /* Get base vaddr of paca array */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000728 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000729 add r13,r13,r4 /* for this processor. */
Benjamin Herrenschmidt2dd60d72011-01-20 17:50:21 +1100730 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000731
Benjamin Herrenschmidt62cc67b2011-02-21 16:49:58 +1100732 /* Mark interrupts soft and hard disabled (they might be enabled
733 * in the PACA when doing hotplug)
734 */
735 li r0,0
736 stb r0,PACASOFTIRQEN(r13)
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100737 li r0,PACA_IRQ_HARD_DIS
738 stb r0,PACAIRQHAPPENED(r13)
Benjamin Herrenschmidt62cc67b2011-02-21 16:49:58 +1100739
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000740 /* Create a temp kernel stack for use before relocation is on. */
741 ld r1,PACAEMERGSP(r13)
742 subi r1,r1,STACK_FRAME_OVERHEAD
743
Stephen Rothwellc7056772006-11-27 14:59:50 +1100744 b __secondary_start
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000745
746#endif /* CONFIG_PPC_PMAC */
747
748/*
749 * This function is called after the master CPU has released the
750 * secondary processors. The execution environment is relocation off.
751 * The paca for this processor has the following fields initialized at
752 * this point:
753 * 1. Processor number
754 * 2. Segment table pointer (virtual address)
755 * On entry the following are set:
Benjamin Herrenschmidt4f8cf362012-02-28 13:44:58 +1100756 * r1 = stack pointer (real addr of temp stack)
Benjamin Herrenschmidtee43eb72009-07-14 20:52:54 +0000757 * r24 = cpu# (in Linux terms)
758 * r13 = paca virtual address
759 * SPRG_PACA = paca virtual address
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000760 */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000761 .section ".text";
762 .align 2 ;
763
Stephen Rothwellfc68e862007-08-22 13:44:58 +1000764 .globl __secondary_start
Stephen Rothwellc7056772006-11-27 14:59:50 +1100765__secondary_start:
Paul Mackerras799d6042005-11-10 13:37:51 +1100766 /* Set thread priority to MEDIUM */
767 HMT_MEDIUM
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000768
Benjamin Herrenschmidt4f8cf362012-02-28 13:44:58 +1100769 /* Initialize the kernel stack */
David Gibsone58c3492006-01-13 14:56:25 +1100770 LOAD_REG_ADDR(r3, current_set)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000771 sldi r28,r24,3 /* get current_set[cpu#] */
Michael Neuling54a83402010-08-25 21:04:25 +0000772 ldx r14,r3,r28
773 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
774 std r14,PACAKSAVE(r13)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000775
Michael Ellerman376af592014-07-10 12:29:19 +1000776 /* Do early setup for that CPU (SLB and hash table pointer) */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100777 bl early_setup_secondary
Matt Evansf7616222010-08-12 20:58:28 +0000778
Michael Neuling54a83402010-08-25 21:04:25 +0000779 /*
780 * setup the new stack pointer, but *don't* use this until
781 * translation is on.
782 */
783 mr r1, r14
784
Paul Mackerras799d6042005-11-10 13:37:51 +1100785 /* Clear backchain so we get nice backtraces */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000786 li r7,0
787 mtlr r7
788
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100789 /* Mark interrupts soft and hard disabled (they might be enabled
790 * in the PACA when doing hotplug)
791 */
Benjamin Herrenschmidt4f8cf362012-02-28 13:44:58 +1100792 stb r7,PACASOFTIRQEN(r13)
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100793 li r0,PACA_IRQ_HARD_DIS
794 stb r0,PACAIRQHAPPENED(r13)
Benjamin Herrenschmidt4f8cf362012-02-28 13:44:58 +1100795
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000796 /* enable MMU and jump to start_secondary */
Anton Blanchardad0289e2014-02-04 16:04:52 +1100797 LOAD_REG_ADDR(r3, start_secondary_prolog)
David Gibsone58c3492006-01-13 14:56:25 +1100798 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
Paul Mackerrasd04c56f2006-10-04 16:47:49 +1000799
Paul Mackerrasb5bbeb22005-10-10 14:01:07 +1000800 mtspr SPRN_SRR0,r3
801 mtspr SPRN_SRR1,r4
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000802 RFI
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000803 b . /* prevent speculative execution */
804
805/*
806 * Running with relocation on at this point. All we want to do is
Paul Mackerrase31aa452008-08-30 11:41:12 +1000807 * zero the stack back-chain pointer and get the TOC virtual address
808 * before going into C code.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000809 */
Anton Blanchardad0289e2014-02-04 16:04:52 +1100810start_secondary_prolog:
Paul Mackerrase31aa452008-08-30 11:41:12 +1000811 ld r2,PACATOC(r13)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000812 li r3,0
813 std r3,0(r1) /* Zero the stack frame pointer */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100814 bl start_secondary
Paul Mackerras799d6042005-11-10 13:37:51 +1100815 b .
Vaidyanathan Srinivasan8dbce532010-03-01 02:58:09 +0000816/*
817 * Reset stack pointer and call start_secondary
818 * to continue with online operation when woken up
819 * from cede in cpu offline.
820 */
821_GLOBAL(start_secondary_resume)
822 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
823 li r3,0
824 std r3,0(r1) /* Zero the stack frame pointer */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100825 bl start_secondary
Vaidyanathan Srinivasan8dbce532010-03-01 02:58:09 +0000826 b .
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000827#endif
828
829/*
830 * This subroutine clobbers r11 and r12
831 */
Anton Blanchard6a3bab92014-02-04 16:06:11 +1100832enable_64b_mode:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000833 mfmsr r11 /* grab the current MSR */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000834#ifdef CONFIG_PPC_BOOK3E
835 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
836 mtmsr r11
837#else /* CONFIG_PPC_BOOK3E */
Michael Ellerman9f0b0792011-04-07 21:56:03 +0000838 li r12,(MSR_64BIT | MSR_ISF)@highest
Paul Mackerrase31aa452008-08-30 11:41:12 +1000839 sldi r12,r12,48
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000840 or r11,r11,r12
841 mtmsrd r11
842 isync
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000843#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000844 blr
845
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000846/*
Paul Mackerrase31aa452008-08-30 11:41:12 +1000847 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
848 * by the toolchain). It computes the correct value for wherever we
849 * are running at the moment, using position-independent code.
Anton Blanchard1fbe9cf2012-11-26 17:41:08 +0000850 *
851 * Note: The compiler constructs pointers using offsets from the
852 * TOC in -mcmodel=medium mode. After we relocate to 0 but before
853 * the MMU is on we need our TOC to be a virtual address otherwise
854 * these pointers will be real addresses which may get stored and
855 * accessed later with the MMU on. We use tovirt() at the call
856 * sites to handle this.
Paul Mackerrase31aa452008-08-30 11:41:12 +1000857 */
858_GLOBAL(relative_toc)
859 mflr r0
860 bcl 20,31,$+4
Benjamin Herrenschmidte5505922011-09-19 17:44:51 +00008610: mflr r11
862 ld r2,(p_toc - 0b)(r11)
863 add r2,r2,r11
Paul Mackerrase31aa452008-08-30 11:41:12 +1000864 mtlr r0
865 blr
866
Anton Blanchard5b63fee2013-08-07 02:01:18 +1000867.balign 8
Paul Mackerrase31aa452008-08-30 11:41:12 +1000868p_toc: .llong __toc_start + 0x8000 - 0b
869
870/*
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000871 * This is where the main kernel code starts.
872 */
Anton Blanchard6a3bab92014-02-04 16:06:11 +1100873start_here_multiplatform:
Anton Blanchard1fbe9cf2012-11-26 17:41:08 +0000874 /* set up the TOC */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100875 bl relative_toc
Anton Blanchard1fbe9cf2012-11-26 17:41:08 +0000876 tovirt(r2,r2)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000877
878 /* Clear out the BSS. It may have been done in prom_init,
879 * already but that's irrelevant since prom_init will soon
880 * be detached from the kernel completely. Besides, we need
881 * to clear it now for kexec-style entry.
882 */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000883 LOAD_REG_ADDR(r11,__bss_stop)
884 LOAD_REG_ADDR(r8,__bss_start)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000885 sub r11,r11,r8 /* bss size */
886 addi r11,r11,7 /* round up to an even double word */
Paul Mackerrase31aa452008-08-30 11:41:12 +1000887 srdi. r11,r11,3 /* shift right by 3 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000888 beq 4f
889 addi r8,r8,-8
890 li r0,0
891 mtctr r11 /* zero this many doublewords */
8923: stdu r0,8(r8)
893 bdnz 3b
8944:
895
Benjamin Herrenschmidtdaea1172011-09-19 17:44:59 +0000896#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
897 /* Setup OPAL entry */
Benjamin Herrenschmidtab7f9612012-10-21 14:30:52 +0000898 LOAD_REG_ADDR(r11, opal)
Benjamin Herrenschmidtdaea1172011-09-19 17:44:59 +0000899 std r28,0(r11);
900 std r29,8(r11);
901#endif
902
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000903#ifndef CONFIG_PPC_BOOK3E
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000904 mfmsr r6
905 ori r6,r6,MSR_RI
906 mtmsrd r6 /* RI on */
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000907#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000908
Paul Mackerras549e8152008-08-30 11:43:47 +1000909#ifdef CONFIG_RELOCATABLE
910 /* Save the physical address we're running at in kernstart_addr */
911 LOAD_REG_ADDR(r4, kernstart_addr)
912 clrldi r0,r25,2
913 std r0,0(r4)
914#endif
915
Paul Mackerrase31aa452008-08-30 11:41:12 +1000916 /* The following gets the stack set up with the regs */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000917 /* pointing to the real addr of the kernel stack. This is */
918 /* all done to support the C function call below which sets */
919 /* up the htab. This is done because we have relocated the */
920 /* kernel but are still running in real mode. */
921
Paul Mackerrase31aa452008-08-30 11:41:12 +1000922 LOAD_REG_ADDR(r3,init_thread_union)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000923
Paul Mackerrase31aa452008-08-30 11:41:12 +1000924 /* set up a stack pointer */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000925 addi r1,r3,THREAD_SIZE
926 li r0,0
927 stdu r0,-STACK_FRAME_OVERHEAD(r1)
928
Michael Ellerman376af592014-07-10 12:29:19 +1000929 /*
930 * Do very early kernel initializations, including initial hash table
931 * and SLB setup before we turn on relocation.
932 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000933
934 /* Restore parameters passed from prom_init/kexec */
935 mr r3,r31
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100936 bl early_setup /* also sets r13 and SPRG_PACA */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000937
Anton Blanchardad0289e2014-02-04 16:04:52 +1100938 LOAD_REG_ADDR(r3, start_here_common)
Paul Mackerrase31aa452008-08-30 11:41:12 +1000939 ld r4,PACAKMSR(r13)
Paul Mackerrasb5bbeb22005-10-10 14:01:07 +1000940 mtspr SPRN_SRR0,r3
941 mtspr SPRN_SRR1,r4
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000942 RFI
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000943 b . /* prevent speculative execution */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000944
945 /* This is where all platforms converge execution */
Anton Blanchardad0289e2014-02-04 16:04:52 +1100946
947start_here_common:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000948 /* relocation is on at this point */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000949 std r1,PACAKSAVE(r13)
950
Paul Mackerrase31aa452008-08-30 11:41:12 +1000951 /* Load the TOC (virtual address) */
952 ld r2,PACATOC(r13)
953
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100954 /* Do more system initializations in virtual mode */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100955 bl setup_system
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000956
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100957 /* Mark interrupts soft and hard disabled (they might be enabled
958 * in the PACA when doing hotplug)
959 */
960 li r0,0
961 stb r0,PACASOFTIRQEN(r13)
962 li r0,PACA_IRQ_HARD_DIS
963 stb r0,PACAIRQHAPPENED(r13)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000964
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100965 /* Generic kernel entry */
Anton Blanchardb1576fe2014-02-04 16:04:35 +1100966 bl start_kernel
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000967
Anton Blanchardf1870f72006-02-13 18:11:13 +1100968 /* Not reached */
969 BUG_OPCODE
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000970
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000971/*
972 * We put a few things here that have to be page-aligned.
973 * This stuff goes at the beginning of the bss, which is page-aligned.
974 */
975 .section ".bss"
Aneesh Kumar K.V43a5c682016-04-29 23:26:26 +1000976/*
977 * pgd dir should be aligned to PGD_TABLE_SIZE which is 64K.
978 * We will need to find a better way to fix this
979 */
980 .align 16
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000981
982 .globl swapper_pg_dir
983swapper_pg_dir:
Stephen Rothwellee7a76d2007-09-18 17:22:59 +1000984 .space PGD_TABLE_SIZE
Aneesh Kumar K.V43a5c682016-04-29 23:26:26 +1000985
986 .globl empty_zero_page
987empty_zero_page:
988 .space PAGE_SIZE