Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 1 | /* |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 2 | * Copyright (C) 2012-2013 Avionic Design GmbH |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 3 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
| 4 | * |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 5 | * Based on the KMS/FB CMA helpers |
| 6 | * Copyright (C) 2012 Analog Device Inc. |
| 7 | * |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 13 | #include <linux/console.h> |
| 14 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 15 | #include "drm.h" |
| 16 | #include "gem.h" |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 17 | #include <drm/drm_gem_framebuffer_helper.h> |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 18 | |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 19 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 20 | static inline struct tegra_fbdev *to_tegra_fbdev(struct drm_fb_helper *helper) |
| 21 | { |
| 22 | return container_of(helper, struct tegra_fbdev, base); |
| 23 | } |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 24 | #endif |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 25 | |
| 26 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
| 27 | unsigned int index) |
| 28 | { |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 29 | return to_tegra_bo(drm_gem_fb_get_obj(framebuffer, index)); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 30 | } |
| 31 | |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 32 | bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer) |
| 33 | { |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 34 | struct tegra_bo *bo = tegra_fb_get_plane(framebuffer, 0); |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 35 | |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 36 | if (bo->flags & TEGRA_BO_BOTTOM_UP) |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 37 | return true; |
| 38 | |
| 39 | return false; |
| 40 | } |
| 41 | |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 42 | int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, |
| 43 | struct tegra_bo_tiling *tiling) |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 44 | { |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 45 | uint64_t modifier = framebuffer->modifier; |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 46 | |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 47 | switch (modifier) { |
Thierry Reding | 4ae4b5c | 2018-03-15 16:45:45 +0100 | [diff] [blame] | 48 | case DRM_FORMAT_MOD_LINEAR: |
| 49 | tiling->mode = TEGRA_BO_TILING_MODE_PITCH; |
| 50 | tiling->value = 0; |
| 51 | break; |
| 52 | |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 53 | case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED: |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 54 | tiling->mode = TEGRA_BO_TILING_MODE_TILED; |
| 55 | tiling->value = 0; |
| 56 | break; |
| 57 | |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 58 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0): |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 59 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 60 | tiling->value = 0; |
| 61 | break; |
| 62 | |
| 63 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1): |
| 64 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 65 | tiling->value = 1; |
| 66 | break; |
| 67 | |
| 68 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2): |
| 69 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 70 | tiling->value = 2; |
| 71 | break; |
| 72 | |
| 73 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3): |
| 74 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 75 | tiling->value = 3; |
| 76 | break; |
| 77 | |
| 78 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4): |
| 79 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 80 | tiling->value = 4; |
| 81 | break; |
| 82 | |
| 83 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5): |
| 84 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 85 | tiling->value = 5; |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 86 | break; |
| 87 | |
| 88 | default: |
Thierry Reding | 4ae4b5c | 2018-03-15 16:45:45 +0100 | [diff] [blame] | 89 | return -EINVAL; |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 90 | } |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 91 | |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 92 | return 0; |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 93 | } |
| 94 | |
Ville Syrjälä | 4ecae78 | 2015-12-15 12:21:13 +0100 | [diff] [blame] | 95 | static const struct drm_framebuffer_funcs tegra_fb_funcs = { |
Daniel Stone | 5cb8b99 | 2018-03-30 15:11:29 +0100 | [diff] [blame] | 96 | .destroy = drm_gem_fb_destroy, |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 97 | .create_handle = drm_gem_fb_create_handle, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 98 | }; |
| 99 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 100 | static struct drm_framebuffer *tegra_fb_alloc(struct drm_device *drm, |
| 101 | const struct drm_mode_fb_cmd2 *mode_cmd, |
| 102 | struct tegra_bo **planes, |
| 103 | unsigned int num_planes) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 104 | { |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 105 | struct drm_framebuffer *fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 106 | unsigned int i; |
| 107 | int err; |
| 108 | |
| 109 | fb = kzalloc(sizeof(*fb), GFP_KERNEL); |
| 110 | if (!fb) |
| 111 | return ERR_PTR(-ENOMEM); |
| 112 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 113 | drm_helper_mode_fill_fb_struct(drm, fb, mode_cmd); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 114 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 115 | for (i = 0; i < fb->format->num_planes; i++) |
| 116 | fb->obj[i] = &planes[i]->gem; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 117 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 118 | err = drm_framebuffer_init(drm, fb, &tegra_fb_funcs); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 119 | if (err < 0) { |
| 120 | dev_err(drm->dev, "failed to initialize framebuffer: %d\n", |
| 121 | err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 122 | kfree(fb); |
| 123 | return ERR_PTR(err); |
| 124 | } |
| 125 | |
| 126 | return fb; |
| 127 | } |
| 128 | |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 129 | struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, |
| 130 | struct drm_file *file, |
Ville Syrjälä | 1eb83451 | 2015-11-11 19:11:29 +0200 | [diff] [blame] | 131 | const struct drm_mode_fb_cmd2 *cmd) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 132 | { |
| 133 | unsigned int hsub, vsub, i; |
| 134 | struct tegra_bo *planes[4]; |
| 135 | struct drm_gem_object *gem; |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 136 | struct drm_framebuffer *fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 137 | int err; |
| 138 | |
| 139 | hsub = drm_format_horz_chroma_subsampling(cmd->pixel_format); |
| 140 | vsub = drm_format_vert_chroma_subsampling(cmd->pixel_format); |
| 141 | |
| 142 | for (i = 0; i < drm_format_num_planes(cmd->pixel_format); i++) { |
| 143 | unsigned int width = cmd->width / (i ? hsub : 1); |
| 144 | unsigned int height = cmd->height / (i ? vsub : 1); |
| 145 | unsigned int size, bpp; |
| 146 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 147 | gem = drm_gem_object_lookup(file, cmd->handles[i]); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 148 | if (!gem) { |
| 149 | err = -ENXIO; |
| 150 | goto unreference; |
| 151 | } |
| 152 | |
| 153 | bpp = drm_format_plane_cpp(cmd->pixel_format, i); |
| 154 | |
| 155 | size = (height - 1) * cmd->pitches[i] + |
| 156 | width * bpp + cmd->offsets[i]; |
| 157 | |
| 158 | if (gem->size < size) { |
| 159 | err = -EINVAL; |
| 160 | goto unreference; |
| 161 | } |
| 162 | |
| 163 | planes[i] = to_tegra_bo(gem); |
| 164 | } |
| 165 | |
| 166 | fb = tegra_fb_alloc(drm, cmd, planes, i); |
| 167 | if (IS_ERR(fb)) { |
| 168 | err = PTR_ERR(fb); |
| 169 | goto unreference; |
| 170 | } |
| 171 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 172 | return fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 173 | |
| 174 | unreference: |
| 175 | while (i--) |
Cihangir Akturk | 7664b2f | 2017-08-11 15:33:07 +0300 | [diff] [blame] | 176 | drm_gem_object_put_unlocked(&planes[i]->gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 177 | |
| 178 | return ERR_PTR(err); |
| 179 | } |
| 180 | |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 181 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | b8f3f50 | 2018-02-07 18:45:56 +0100 | [diff] [blame] | 182 | static int tegra_fb_mmap(struct fb_info *info, struct vm_area_struct *vma) |
| 183 | { |
| 184 | struct drm_fb_helper *helper = info->par; |
| 185 | struct tegra_bo *bo; |
| 186 | int err; |
| 187 | |
| 188 | bo = tegra_fb_get_plane(helper->fb, 0); |
| 189 | |
| 190 | err = drm_gem_mmap_obj(&bo->gem, bo->gem.size, vma); |
| 191 | if (err < 0) |
| 192 | return err; |
| 193 | |
| 194 | return __tegra_gem_mmap(&bo->gem, vma); |
| 195 | } |
| 196 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 197 | static struct fb_ops tegra_fb_ops = { |
| 198 | .owner = THIS_MODULE, |
Stefan Christ | 902c255 | 2016-11-14 00:03:22 +0100 | [diff] [blame] | 199 | DRM_FB_HELPER_DEFAULT_OPS, |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 200 | .fb_fillrect = drm_fb_helper_sys_fillrect, |
| 201 | .fb_copyarea = drm_fb_helper_sys_copyarea, |
| 202 | .fb_imageblit = drm_fb_helper_sys_imageblit, |
Thierry Reding | b8f3f50 | 2018-02-07 18:45:56 +0100 | [diff] [blame] | 203 | .fb_mmap = tegra_fb_mmap, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 204 | }; |
| 205 | |
| 206 | static int tegra_fbdev_probe(struct drm_fb_helper *helper, |
| 207 | struct drm_fb_helper_surface_size *sizes) |
| 208 | { |
| 209 | struct tegra_fbdev *fbdev = to_tegra_fbdev(helper); |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 210 | struct tegra_drm *tegra = helper->dev->dev_private; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 211 | struct drm_device *drm = helper->dev; |
| 212 | struct drm_mode_fb_cmd2 cmd = { 0 }; |
| 213 | unsigned int bytes_per_pixel; |
| 214 | struct drm_framebuffer *fb; |
| 215 | unsigned long offset; |
| 216 | struct fb_info *info; |
| 217 | struct tegra_bo *bo; |
| 218 | size_t size; |
| 219 | int err; |
| 220 | |
| 221 | bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8); |
| 222 | |
| 223 | cmd.width = sizes->surface_width; |
| 224 | cmd.height = sizes->surface_height; |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 225 | cmd.pitches[0] = round_up(sizes->surface_width * bytes_per_pixel, |
| 226 | tegra->pitch_align); |
Thierry Reding | 71835ca | 2017-11-14 16:09:30 +0100 | [diff] [blame] | 227 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 228 | cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, |
| 229 | sizes->surface_depth); |
| 230 | |
| 231 | size = cmd.pitches[0] * cmd.height; |
| 232 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 233 | bo = tegra_bo_create(drm, size, 0); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 234 | if (IS_ERR(bo)) |
| 235 | return PTR_ERR(bo); |
| 236 | |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 237 | info = drm_fb_helper_alloc_fbi(helper); |
| 238 | if (IS_ERR(info)) { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 239 | dev_err(drm->dev, "failed to allocate framebuffer info\n"); |
Cihangir Akturk | 7664b2f | 2017-08-11 15:33:07 +0300 | [diff] [blame] | 240 | drm_gem_object_put_unlocked(&bo->gem); |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 241 | return PTR_ERR(info); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 242 | } |
| 243 | |
| 244 | fbdev->fb = tegra_fb_alloc(drm, &cmd, &bo, 1); |
| 245 | if (IS_ERR(fbdev->fb)) { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 246 | err = PTR_ERR(fbdev->fb); |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 247 | dev_err(drm->dev, "failed to allocate DRM framebuffer: %d\n", |
| 248 | err); |
Cihangir Akturk | 7664b2f | 2017-08-11 15:33:07 +0300 | [diff] [blame] | 249 | drm_gem_object_put_unlocked(&bo->gem); |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 250 | return PTR_ERR(fbdev->fb); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 251 | } |
| 252 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 253 | fb = fbdev->fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 254 | helper->fb = fb; |
| 255 | helper->fbdev = info; |
| 256 | |
| 257 | info->par = helper; |
| 258 | info->flags = FBINFO_FLAG_DEFAULT; |
| 259 | info->fbops = &tegra_fb_ops; |
| 260 | |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 261 | drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 262 | drm_fb_helper_fill_var(info, helper, fb->width, fb->height); |
| 263 | |
| 264 | offset = info->var.xoffset * bytes_per_pixel + |
| 265 | info->var.yoffset * fb->pitches[0]; |
| 266 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 267 | if (bo->pages) { |
| 268 | bo->vaddr = vmap(bo->pages, bo->num_pages, VM_MAP, |
| 269 | pgprot_writecombine(PAGE_KERNEL)); |
| 270 | if (!bo->vaddr) { |
| 271 | dev_err(drm->dev, "failed to vmap() framebuffer\n"); |
| 272 | err = -ENOMEM; |
| 273 | goto destroy; |
| 274 | } |
| 275 | } |
| 276 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 277 | drm->mode_config.fb_base = (resource_size_t)bo->paddr; |
Thierry Reding | 9ab3415 | 2013-11-08 13:18:14 +0100 | [diff] [blame] | 278 | info->screen_base = (void __iomem *)bo->vaddr + offset; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 279 | info->screen_size = size; |
| 280 | info->fix.smem_start = (unsigned long)(bo->paddr + offset); |
| 281 | info->fix.smem_len = size; |
| 282 | |
| 283 | return 0; |
| 284 | |
| 285 | destroy: |
Daniel Vetter | 3e7d2fdd | 2016-12-27 11:49:25 +0100 | [diff] [blame] | 286 | drm_framebuffer_remove(fb); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 287 | return err; |
| 288 | } |
| 289 | |
Thierry Reding | 3a49387 | 2014-06-27 17:19:23 +0200 | [diff] [blame] | 290 | static const struct drm_fb_helper_funcs tegra_fb_helper_funcs = { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 291 | .fb_probe = tegra_fbdev_probe, |
| 292 | }; |
| 293 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 294 | static struct tegra_fbdev *tegra_fbdev_create(struct drm_device *drm) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 295 | { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 296 | struct tegra_fbdev *fbdev; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 297 | |
| 298 | fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL); |
| 299 | if (!fbdev) { |
| 300 | dev_err(drm->dev, "failed to allocate DRM fbdev\n"); |
| 301 | return ERR_PTR(-ENOMEM); |
| 302 | } |
| 303 | |
Thierry Reding | 10a2310 | 2014-06-27 17:19:24 +0200 | [diff] [blame] | 304 | drm_fb_helper_prepare(drm, &fbdev->base, &tegra_fb_helper_funcs); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 305 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 306 | return fbdev; |
| 307 | } |
| 308 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 309 | static void tegra_fbdev_free(struct tegra_fbdev *fbdev) |
| 310 | { |
| 311 | kfree(fbdev); |
| 312 | } |
| 313 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 314 | static int tegra_fbdev_init(struct tegra_fbdev *fbdev, |
| 315 | unsigned int preferred_bpp, |
| 316 | unsigned int num_crtc, |
| 317 | unsigned int max_connectors) |
| 318 | { |
| 319 | struct drm_device *drm = fbdev->base.dev; |
| 320 | int err; |
| 321 | |
Gabriel Krisman Bertazi | e4563f6 | 2017-02-02 14:26:40 -0200 | [diff] [blame] | 322 | err = drm_fb_helper_init(drm, &fbdev->base, max_connectors); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 323 | if (err < 0) { |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 324 | dev_err(drm->dev, "failed to initialize DRM FB helper: %d\n", |
| 325 | err); |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 326 | return err; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 327 | } |
| 328 | |
| 329 | err = drm_fb_helper_single_add_all_connectors(&fbdev->base); |
| 330 | if (err < 0) { |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 331 | dev_err(drm->dev, "failed to add connectors: %d\n", err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 332 | goto fini; |
| 333 | } |
| 334 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 335 | err = drm_fb_helper_initial_config(&fbdev->base, preferred_bpp); |
| 336 | if (err < 0) { |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 337 | dev_err(drm->dev, "failed to set initial configuration: %d\n", |
| 338 | err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 339 | goto fini; |
| 340 | } |
| 341 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 342 | return 0; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 343 | |
| 344 | fini: |
| 345 | drm_fb_helper_fini(&fbdev->base); |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 346 | return err; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 347 | } |
| 348 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 349 | static void tegra_fbdev_exit(struct tegra_fbdev *fbdev) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 350 | { |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 351 | drm_fb_helper_unregister_fbi(&fbdev->base); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 352 | |
Daniel Stone | c34a997 | 2018-03-30 15:11:28 +0100 | [diff] [blame] | 353 | if (fbdev->fb) { |
| 354 | struct tegra_bo *bo = tegra_fb_get_plane(fbdev->fb, 0); |
| 355 | |
| 356 | /* Undo the special mapping we made in fbdev probe. */ |
| 357 | if (bo && bo->pages) { |
| 358 | vunmap(bo->vaddr); |
Souptick Joarder | 53f1e06 | 2018-08-01 01:37:05 +0530 | [diff] [blame] | 359 | bo->vaddr = NULL; |
Daniel Stone | c34a997 | 2018-03-30 15:11:28 +0100 | [diff] [blame] | 360 | } |
| 361 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 362 | drm_framebuffer_remove(fbdev->fb); |
Daniel Stone | c34a997 | 2018-03-30 15:11:28 +0100 | [diff] [blame] | 363 | } |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 364 | |
| 365 | drm_fb_helper_fini(&fbdev->base); |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 366 | tegra_fbdev_free(fbdev); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 367 | } |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 368 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 369 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 370 | int tegra_drm_fb_prepare(struct drm_device *drm) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 371 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 372 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 373 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 374 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 375 | tegra->fbdev = tegra_fbdev_create(drm); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 376 | if (IS_ERR(tegra->fbdev)) |
| 377 | return PTR_ERR(tegra->fbdev); |
| 378 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 379 | |
| 380 | return 0; |
| 381 | } |
| 382 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 383 | void tegra_drm_fb_free(struct drm_device *drm) |
| 384 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 385 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 386 | struct tegra_drm *tegra = drm->dev_private; |
| 387 | |
| 388 | tegra_fbdev_free(tegra->fbdev); |
| 389 | #endif |
| 390 | } |
| 391 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 392 | int tegra_drm_fb_init(struct drm_device *drm) |
| 393 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 394 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 395 | struct tegra_drm *tegra = drm->dev_private; |
| 396 | int err; |
| 397 | |
| 398 | err = tegra_fbdev_init(tegra->fbdev, 32, drm->mode_config.num_crtc, |
| 399 | drm->mode_config.num_connector); |
| 400 | if (err < 0) |
| 401 | return err; |
| 402 | #endif |
| 403 | |
| 404 | return 0; |
| 405 | } |
| 406 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 407 | void tegra_drm_fb_exit(struct drm_device *drm) |
| 408 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 409 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 410 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 411 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 412 | tegra_fbdev_exit(tegra->fbdev); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 413 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 414 | } |