Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1 | /* |
| 2 | * edac_mc kernel module |
Doug Thompson | 49c0dab7 | 2006-07-10 04:45:19 -0700 | [diff] [blame] | 3 | * (C) 2005, 2006 Linux Networx (http://lnxi.com) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 4 | * This file may be distributed under the terms of the |
| 5 | * GNU General Public License. |
| 6 | * |
| 7 | * Written by Thayne Harbaugh |
| 8 | * Based on work by Dan Hollis <goemon at anime dot net> and others. |
| 9 | * http://www.anime.net/~goemon/linux-ecc/ |
| 10 | * |
| 11 | * Modified by Dave Peterson and Doug Thompson |
| 12 | * |
| 13 | */ |
| 14 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 15 | #include <linux/module.h> |
| 16 | #include <linux/proc_fs.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/smp.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/sysctl.h> |
| 22 | #include <linux/highmem.h> |
| 23 | #include <linux/timer.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/jiffies.h> |
| 26 | #include <linux/spinlock.h> |
| 27 | #include <linux/list.h> |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 28 | #include <linux/ctype.h> |
Dave Jiang | c0d1217 | 2007-07-19 01:49:46 -0700 | [diff] [blame] | 29 | #include <linux/edac.h> |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 30 | #include <linux/bitops.h> |
Linus Torvalds | 7c0f6ba | 2016-12-24 11:46:01 -0800 | [diff] [blame] | 31 | #include <linux/uaccess.h> |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 32 | #include <asm/page.h> |
Mauro Carvalho Chehab | 78d88e8 | 2016-10-29 15:16:34 -0200 | [diff] [blame] | 33 | #include "edac_mc.h" |
Douglas Thompson | 7c9281d | 2007-07-19 01:49:33 -0700 | [diff] [blame] | 34 | #include "edac_module.h" |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 35 | #include <ras/ras_event.h> |
| 36 | |
Borislav Petkov | b01aec9 | 2015-05-21 19:59:31 +0200 | [diff] [blame] | 37 | #ifdef CONFIG_EDAC_ATOMIC_SCRUB |
| 38 | #include <asm/edac.h> |
| 39 | #else |
| 40 | #define edac_atomic_scrub(va, size) do { } while (0) |
| 41 | #endif |
| 42 | |
Borislav Petkov | 8c22b4f | 2017-01-26 22:18:12 +0100 | [diff] [blame] | 43 | int edac_op_state = EDAC_OPSTATE_INVAL; |
| 44 | EXPORT_SYMBOL_GPL(edac_op_state); |
| 45 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 46 | /* lock to memory controller's control array */ |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 47 | static DEFINE_MUTEX(mem_ctls_mutex); |
Robert P. J. Day | ff6ac2a | 2008-04-29 01:03:17 -0700 | [diff] [blame] | 48 | static LIST_HEAD(mc_devices); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 49 | |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 50 | /* |
| 51 | * Used to lock EDAC MC to just one module, avoiding two drivers e. g. |
| 52 | * apei/ghes and i7core_edac to be used at the same time. |
| 53 | */ |
Toshi Kani | 3877c7d | 2017-08-23 16:54:46 -0600 | [diff] [blame] | 54 | static const char *edac_mc_owner; |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 55 | |
Robert Richter | 91b327f | 2020-01-23 09:02:56 +0000 | [diff] [blame] | 56 | static struct mem_ctl_info *error_desc_to_mci(struct edac_raw_error_desc *e) |
| 57 | { |
| 58 | return container_of(e, struct mem_ctl_info, error_desc); |
| 59 | } |
| 60 | |
Robert Richter | d55c79a | 2019-09-02 12:33:41 +0000 | [diff] [blame] | 61 | unsigned int edac_dimm_info_location(struct dimm_info *dimm, char *buf, |
| 62 | unsigned int len) |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 63 | { |
| 64 | struct mem_ctl_info *mci = dimm->mci; |
| 65 | int i, n, count = 0; |
| 66 | char *p = buf; |
| 67 | |
| 68 | for (i = 0; i < mci->n_layers; i++) { |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 69 | n = scnprintf(p, len, "%s %d ", |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 70 | edac_layer_name[mci->layers[i].type], |
| 71 | dimm->location[i]); |
| 72 | p += n; |
| 73 | len -= n; |
| 74 | count += n; |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | return count; |
| 78 | } |
| 79 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 80 | #ifdef CONFIG_EDAC_DEBUG |
| 81 | |
Mauro Carvalho Chehab | a4b4be3 | 2012-01-27 10:26:13 -0300 | [diff] [blame] | 82 | static void edac_mc_dump_channel(struct rank_info *chan) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 83 | { |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 84 | edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); |
| 85 | edac_dbg(4, " channel = %p\n", chan); |
| 86 | edac_dbg(4, " channel->csrow = %p\n", chan->csrow); |
| 87 | edac_dbg(4, " channel->dimm = %p\n", chan->dimm); |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 88 | } |
| 89 | |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 90 | static void edac_mc_dump_dimm(struct dimm_info *dimm) |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 91 | { |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 92 | char location[80]; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 93 | |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 94 | if (!dimm->nr_pages) |
| 95 | return; |
| 96 | |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 97 | edac_dimm_info_location(dimm, location, sizeof(location)); |
| 98 | |
| 99 | edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", |
Mauro Carvalho Chehab | 9713fae | 2013-03-11 09:28:48 -0300 | [diff] [blame] | 100 | dimm->mci->csbased ? "rank" : "dimm", |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 101 | dimm->idx, location, dimm->csrow, dimm->cschannel); |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 102 | edac_dbg(4, " dimm = %p\n", dimm); |
| 103 | edac_dbg(4, " dimm->label = '%s'\n", dimm->label); |
| 104 | edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); |
| 105 | edac_dbg(4, " dimm->grain = %d\n", dimm->grain); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 106 | } |
| 107 | |
Adrian Bunk | 2da1c11 | 2007-07-19 01:49:32 -0700 | [diff] [blame] | 108 | static void edac_mc_dump_csrow(struct csrow_info *csrow) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 109 | { |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 110 | edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx); |
| 111 | edac_dbg(4, " csrow = %p\n", csrow); |
| 112 | edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow->first_page); |
| 113 | edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow->last_page); |
| 114 | edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow->page_mask); |
| 115 | edac_dbg(4, " csrow->nr_channels = %d\n", csrow->nr_channels); |
| 116 | edac_dbg(4, " csrow->channels = %p\n", csrow->channels); |
| 117 | edac_dbg(4, " csrow->mci = %p\n", csrow->mci); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 118 | } |
| 119 | |
Adrian Bunk | 2da1c11 | 2007-07-19 01:49:32 -0700 | [diff] [blame] | 120 | static void edac_mc_dump_mci(struct mem_ctl_info *mci) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 121 | { |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 122 | edac_dbg(3, "\tmci = %p\n", mci); |
| 123 | edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap); |
| 124 | edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap); |
| 125 | edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap); |
| 126 | edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check); |
| 127 | edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n", |
| 128 | mci->nr_csrows, mci->csrows); |
| 129 | edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n", |
| 130 | mci->tot_dimms, mci->dimms); |
| 131 | edac_dbg(3, "\tdev = %p\n", mci->pdev); |
| 132 | edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n", |
| 133 | mci->mod_name, mci->ctl_name); |
| 134 | edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 135 | } |
| 136 | |
Borislav Petkov | 24f9a7f | 2010-10-07 18:29:15 +0200 | [diff] [blame] | 137 | #endif /* CONFIG_EDAC_DEBUG */ |
| 138 | |
Borislav Petkov | f4ce6ec | 2014-08-13 23:27:55 +0200 | [diff] [blame] | 139 | const char * const edac_mem_types[] = { |
Tony Luck | d6dd77e | 2018-03-12 11:24:26 -0700 | [diff] [blame] | 140 | [MEM_EMPTY] = "Empty", |
| 141 | [MEM_RESERVED] = "Reserved", |
| 142 | [MEM_UNKNOWN] = "Unknown", |
| 143 | [MEM_FPM] = "FPM", |
| 144 | [MEM_EDO] = "EDO", |
| 145 | [MEM_BEDO] = "BEDO", |
| 146 | [MEM_SDR] = "Unbuffered-SDR", |
| 147 | [MEM_RDR] = "Registered-SDR", |
| 148 | [MEM_DDR] = "Unbuffered-DDR", |
| 149 | [MEM_RDDR] = "Registered-DDR", |
| 150 | [MEM_RMBS] = "RMBS", |
| 151 | [MEM_DDR2] = "Unbuffered-DDR2", |
| 152 | [MEM_FB_DDR2] = "FullyBuffered-DDR2", |
| 153 | [MEM_RDDR2] = "Registered-DDR2", |
| 154 | [MEM_XDR] = "XDR", |
| 155 | [MEM_DDR3] = "Unbuffered-DDR3", |
| 156 | [MEM_RDDR3] = "Registered-DDR3", |
| 157 | [MEM_LRDDR3] = "Load-Reduced-DDR3-RAM", |
Qiuxu Zhuo | 3b20369 | 2020-11-05 15:48:51 +0800 | [diff] [blame] | 158 | [MEM_LPDDR3] = "Low-Power-DDR3-RAM", |
Tony Luck | d6dd77e | 2018-03-12 11:24:26 -0700 | [diff] [blame] | 159 | [MEM_DDR4] = "Unbuffered-DDR4", |
Tony Luck | 001f861 | 2018-03-12 11:24:27 -0700 | [diff] [blame] | 160 | [MEM_RDDR4] = "Registered-DDR4", |
Qiuxu Zhuo | 3b20369 | 2020-11-05 15:48:51 +0800 | [diff] [blame] | 161 | [MEM_LPDDR4] = "Low-Power-DDR4-RAM", |
Takashi Iwai | b748f2d | 2018-08-10 16:14:26 +0200 | [diff] [blame] | 162 | [MEM_LRDDR4] = "Load-Reduced-DDR4-RAM", |
Qiuxu Zhuo | bc1c99a | 2020-11-17 20:49:52 +0800 | [diff] [blame] | 163 | [MEM_DDR5] = "Unbuffered-DDR5", |
Yazen Ghannam | f957112 | 2021-12-08 17:43:53 +0000 | [diff] [blame] | 164 | [MEM_RDDR5] = "Registered-DDR5", |
| 165 | [MEM_LRDDR5] = "Load-Reduced-DDR5-RAM", |
Tony Luck | 001f861 | 2018-03-12 11:24:27 -0700 | [diff] [blame] | 166 | [MEM_NVDIMM] = "Non-volatile-RAM", |
Qiuxu Zhuo | 3b20369 | 2020-11-05 15:48:51 +0800 | [diff] [blame] | 167 | [MEM_WIO2] = "Wide-IO-2", |
Naveen Krishna Chatradhi | e1ca90b | 2021-06-30 20:58:24 +0530 | [diff] [blame] | 168 | [MEM_HBM2] = "High-bandwidth-memory-Gen2", |
Muralidhara M K | 9a5f580 | 2023-11-02 11:42:24 +0000 | [diff] [blame] | 169 | [MEM_HBM3] = "High-bandwidth-memory-Gen3", |
Borislav Petkov | 239642f | 2009-11-12 15:33:16 +0100 | [diff] [blame] | 170 | }; |
| 171 | EXPORT_SYMBOL_GPL(edac_mem_types); |
| 172 | |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 173 | static void _edac_mc_free(struct mem_ctl_info *mci) |
| 174 | { |
Robert Richter | bea1bfd | 2020-02-12 13:03:40 +0100 | [diff] [blame] | 175 | put_device(&mci->dev); |
| 176 | } |
| 177 | |
| 178 | static void mci_release(struct device *dev) |
| 179 | { |
| 180 | struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev); |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 181 | struct csrow_info *csr; |
Robert Richter | 718d585 | 2019-06-24 15:09:13 +0000 | [diff] [blame] | 182 | int i, chn, row; |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 183 | |
| 184 | if (mci->dimms) { |
Robert Richter | 718d585 | 2019-06-24 15:09:13 +0000 | [diff] [blame] | 185 | for (i = 0; i < mci->tot_dimms; i++) |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 186 | kfree(mci->dimms[i]); |
| 187 | kfree(mci->dimms); |
| 188 | } |
Robert Richter | 718d585 | 2019-06-24 15:09:13 +0000 | [diff] [blame] | 189 | |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 190 | if (mci->csrows) { |
Robert Richter | 718d585 | 2019-06-24 15:09:13 +0000 | [diff] [blame] | 191 | for (row = 0; row < mci->nr_csrows; row++) { |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 192 | csr = mci->csrows[row]; |
Robert Richter | 718d585 | 2019-06-24 15:09:13 +0000 | [diff] [blame] | 193 | if (!csr) |
| 194 | continue; |
| 195 | |
| 196 | if (csr->channels) { |
| 197 | for (chn = 0; chn < mci->num_cschannel; chn++) |
| 198 | kfree(csr->channels[chn]); |
| 199 | kfree(csr->channels); |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 200 | } |
Robert Richter | 718d585 | 2019-06-24 15:09:13 +0000 | [diff] [blame] | 201 | kfree(csr); |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 202 | } |
| 203 | kfree(mci->csrows); |
| 204 | } |
Borislav Petkov | 0bbb265 | 2022-02-20 22:34:54 +0100 | [diff] [blame] | 205 | kfree(mci->pvt_info); |
| 206 | kfree(mci->layers); |
Shaun Ruffell | faa2ad0 | 2012-09-22 20:26:38 -0500 | [diff] [blame] | 207 | kfree(mci); |
| 208 | } |
| 209 | |
Robert Richter | aad28c6 | 2020-01-23 09:02:49 +0000 | [diff] [blame] | 210 | static int edac_mc_alloc_csrows(struct mem_ctl_info *mci) |
| 211 | { |
| 212 | unsigned int tot_channels = mci->num_cschannel; |
| 213 | unsigned int tot_csrows = mci->nr_csrows; |
| 214 | unsigned int row, chn; |
| 215 | |
| 216 | /* |
| 217 | * Alocate and fill the csrow/channels structs |
| 218 | */ |
| 219 | mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL); |
| 220 | if (!mci->csrows) |
| 221 | return -ENOMEM; |
| 222 | |
| 223 | for (row = 0; row < tot_csrows; row++) { |
| 224 | struct csrow_info *csr; |
| 225 | |
| 226 | csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL); |
| 227 | if (!csr) |
| 228 | return -ENOMEM; |
| 229 | |
| 230 | mci->csrows[row] = csr; |
| 231 | csr->csrow_idx = row; |
| 232 | csr->mci = mci; |
| 233 | csr->nr_channels = tot_channels; |
| 234 | csr->channels = kcalloc(tot_channels, sizeof(*csr->channels), |
| 235 | GFP_KERNEL); |
| 236 | if (!csr->channels) |
| 237 | return -ENOMEM; |
| 238 | |
| 239 | for (chn = 0; chn < tot_channels; chn++) { |
| 240 | struct rank_info *chan; |
| 241 | |
| 242 | chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL); |
| 243 | if (!chan) |
| 244 | return -ENOMEM; |
| 245 | |
| 246 | csr->channels[chn] = chan; |
| 247 | chan->chan_idx = chn; |
| 248 | chan->csrow = csr; |
| 249 | } |
| 250 | } |
| 251 | |
| 252 | return 0; |
| 253 | } |
| 254 | |
| 255 | static int edac_mc_alloc_dimms(struct mem_ctl_info *mci) |
| 256 | { |
| 257 | unsigned int pos[EDAC_MAX_LAYERS]; |
| 258 | unsigned int row, chn, idx; |
| 259 | int layer; |
| 260 | void *p; |
| 261 | |
| 262 | /* |
| 263 | * Allocate and fill the dimm structs |
| 264 | */ |
| 265 | mci->dimms = kcalloc(mci->tot_dimms, sizeof(*mci->dimms), GFP_KERNEL); |
| 266 | if (!mci->dimms) |
| 267 | return -ENOMEM; |
| 268 | |
| 269 | memset(&pos, 0, sizeof(pos)); |
| 270 | row = 0; |
| 271 | chn = 0; |
| 272 | for (idx = 0; idx < mci->tot_dimms; idx++) { |
| 273 | struct dimm_info *dimm; |
| 274 | struct rank_info *chan; |
| 275 | int n, len; |
| 276 | |
| 277 | chan = mci->csrows[row]->channels[chn]; |
| 278 | |
| 279 | dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL); |
| 280 | if (!dimm) |
| 281 | return -ENOMEM; |
| 282 | mci->dimms[idx] = dimm; |
| 283 | dimm->mci = mci; |
| 284 | dimm->idx = idx; |
| 285 | |
| 286 | /* |
| 287 | * Copy DIMM location and initialize it. |
| 288 | */ |
| 289 | len = sizeof(dimm->label); |
| 290 | p = dimm->label; |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 291 | n = scnprintf(p, len, "mc#%u", mci->mc_idx); |
Robert Richter | aad28c6 | 2020-01-23 09:02:49 +0000 | [diff] [blame] | 292 | p += n; |
| 293 | len -= n; |
| 294 | for (layer = 0; layer < mci->n_layers; layer++) { |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 295 | n = scnprintf(p, len, "%s#%u", |
| 296 | edac_layer_name[mci->layers[layer].type], |
| 297 | pos[layer]); |
Robert Richter | aad28c6 | 2020-01-23 09:02:49 +0000 | [diff] [blame] | 298 | p += n; |
| 299 | len -= n; |
| 300 | dimm->location[layer] = pos[layer]; |
Robert Richter | aad28c6 | 2020-01-23 09:02:49 +0000 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | /* Link it to the csrows old API data */ |
| 304 | chan->dimm = dimm; |
| 305 | dimm->csrow = row; |
| 306 | dimm->cschannel = chn; |
| 307 | |
| 308 | /* Increment csrow location */ |
| 309 | if (mci->layers[0].is_virt_csrow) { |
| 310 | chn++; |
| 311 | if (chn == mci->num_cschannel) { |
| 312 | chn = 0; |
| 313 | row++; |
| 314 | } |
| 315 | } else { |
| 316 | row++; |
| 317 | if (row == mci->nr_csrows) { |
| 318 | row = 0; |
| 319 | chn++; |
| 320 | } |
| 321 | } |
| 322 | |
| 323 | /* Increment dimm location */ |
| 324 | for (layer = mci->n_layers - 1; layer >= 0; layer--) { |
| 325 | pos[layer]++; |
| 326 | if (pos[layer] < mci->layers[layer].size) |
| 327 | break; |
| 328 | pos[layer] = 0; |
| 329 | } |
| 330 | } |
| 331 | |
| 332 | return 0; |
| 333 | } |
| 334 | |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 335 | struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num, |
| 336 | unsigned int n_layers, |
| 337 | struct edac_mc_layer *layers, |
| 338 | unsigned int sz_pvt) |
| 339 | { |
| 340 | struct mem_ctl_info *mci; |
| 341 | struct edac_mc_layer *layer; |
Borislav Petkov | 0bbb265 | 2022-02-20 22:34:54 +0100 | [diff] [blame] | 342 | unsigned int idx, tot_dimms = 1; |
Robert Richter | 4aa92c8 | 2020-02-17 12:30:23 +0100 | [diff] [blame] | 343 | unsigned int tot_csrows = 1, tot_channels = 1; |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 344 | bool per_rank = false; |
| 345 | |
| 346 | if (WARN_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0)) |
| 347 | return NULL; |
| 348 | |
| 349 | /* |
| 350 | * Calculate the total amount of dimms and csrows/cschannels while |
| 351 | * in the old API emulation mode |
| 352 | */ |
| 353 | for (idx = 0; idx < n_layers; idx++) { |
| 354 | tot_dimms *= layers[idx].size; |
| 355 | |
| 356 | if (layers[idx].is_virt_csrow) |
| 357 | tot_csrows *= layers[idx].size; |
| 358 | else |
| 359 | tot_channels *= layers[idx].size; |
| 360 | |
| 361 | if (layers[idx].type == EDAC_MC_LAYER_CHIP_SELECT) |
| 362 | per_rank = true; |
| 363 | } |
| 364 | |
Borislav Petkov | 0bbb265 | 2022-02-20 22:34:54 +0100 | [diff] [blame] | 365 | mci = kzalloc(sizeof(struct mem_ctl_info), GFP_KERNEL); |
| 366 | if (!mci) |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 367 | return NULL; |
| 368 | |
Borislav Petkov | 13088b6 | 2022-04-12 23:10:29 +0200 | [diff] [blame] | 369 | mci->layers = kcalloc(n_layers, sizeof(struct edac_mc_layer), GFP_KERNEL); |
Borislav Petkov | 0bbb265 | 2022-02-20 22:34:54 +0100 | [diff] [blame] | 370 | if (!mci->layers) |
| 371 | goto error; |
| 372 | |
| 373 | mci->pvt_info = kzalloc(sz_pvt, GFP_KERNEL); |
| 374 | if (!mci->pvt_info) |
| 375 | goto error; |
| 376 | |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 377 | mci->dev.release = mci_release; |
| 378 | device_initialize(&mci->dev); |
| 379 | |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 380 | /* setup index and various internal pointers */ |
| 381 | mci->mc_idx = mc_num; |
| 382 | mci->tot_dimms = tot_dimms; |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 383 | mci->n_layers = n_layers; |
Robert Richter | 1f27c79 | 2020-01-23 09:02:52 +0000 | [diff] [blame] | 384 | memcpy(mci->layers, layers, sizeof(*layer) * n_layers); |
| 385 | mci->nr_csrows = tot_csrows; |
| 386 | mci->num_cschannel = tot_channels; |
| 387 | mci->csbased = per_rank; |
| 388 | |
| 389 | if (edac_mc_alloc_csrows(mci)) |
| 390 | goto error; |
| 391 | |
| 392 | if (edac_mc_alloc_dimms(mci)) |
| 393 | goto error; |
| 394 | |
| 395 | mci->op_state = OP_ALLOC; |
| 396 | |
| 397 | return mci; |
| 398 | |
| 399 | error: |
| 400 | _edac_mc_free(mci); |
| 401 | |
| 402 | return NULL; |
| 403 | } |
| 404 | EXPORT_SYMBOL_GPL(edac_mc_alloc); |
| 405 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 406 | void edac_mc_free(struct mem_ctl_info *mci) |
| 407 | { |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 408 | edac_dbg(1, "\n"); |
Mauro Carvalho Chehab | bbc560a | 2010-08-16 18:22:43 -0300 | [diff] [blame] | 409 | |
Robert Richter | 216aa14 | 2020-02-12 18:25:18 +0100 | [diff] [blame] | 410 | _edac_mc_free(mci); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 411 | } |
Dave Peterson | 9110540 | 2006-03-26 01:38:55 -0800 | [diff] [blame] | 412 | EXPORT_SYMBOL_GPL(edac_mc_free); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 413 | |
Yazen Ghannam | d7fc9d7 | 2017-01-27 11:24:21 -0600 | [diff] [blame] | 414 | bool edac_has_mcs(void) |
| 415 | { |
| 416 | bool ret; |
| 417 | |
| 418 | mutex_lock(&mem_ctls_mutex); |
| 419 | |
| 420 | ret = list_empty(&mc_devices); |
| 421 | |
| 422 | mutex_unlock(&mem_ctls_mutex); |
| 423 | |
| 424 | return !ret; |
| 425 | } |
| 426 | EXPORT_SYMBOL_GPL(edac_has_mcs); |
| 427 | |
Borislav Petkov | c73e883 | 2016-11-14 13:26:11 +0100 | [diff] [blame] | 428 | /* Caller must hold mem_ctls_mutex */ |
| 429 | static struct mem_ctl_info *__find_mci_by_dev(struct device *dev) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 430 | { |
| 431 | struct mem_ctl_info *mci; |
| 432 | struct list_head *item; |
| 433 | |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 434 | edac_dbg(3, "\n"); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 435 | |
| 436 | list_for_each(item, &mc_devices) { |
| 437 | mci = list_entry(item, struct mem_ctl_info, link); |
| 438 | |
Mauro Carvalho Chehab | fd68750 | 2012-03-16 07:44:18 -0300 | [diff] [blame] | 439 | if (mci->pdev == dev) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 440 | return mci; |
| 441 | } |
| 442 | |
| 443 | return NULL; |
| 444 | } |
Borislav Petkov | c73e883 | 2016-11-14 13:26:11 +0100 | [diff] [blame] | 445 | |
| 446 | /** |
| 447 | * find_mci_by_dev |
| 448 | * |
| 449 | * scan list of controllers looking for the one that manages |
| 450 | * the 'dev' device |
| 451 | * @dev: pointer to a struct device related with the MCI |
| 452 | */ |
| 453 | struct mem_ctl_info *find_mci_by_dev(struct device *dev) |
| 454 | { |
| 455 | struct mem_ctl_info *ret; |
| 456 | |
| 457 | mutex_lock(&mem_ctls_mutex); |
| 458 | ret = __find_mci_by_dev(dev); |
| 459 | mutex_unlock(&mem_ctls_mutex); |
| 460 | |
| 461 | return ret; |
| 462 | } |
Mauro Carvalho Chehab | 939747bd | 2010-08-10 11:22:01 -0300 | [diff] [blame] | 463 | EXPORT_SYMBOL_GPL(find_mci_by_dev); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 464 | |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 465 | /* |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 466 | * edac_mc_workq_function |
| 467 | * performs the operation scheduled by a workq request |
| 468 | */ |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 469 | static void edac_mc_workq_function(struct work_struct *work_req) |
| 470 | { |
Jean Delvare | fbeb438 | 2009-04-13 14:40:21 -0700 | [diff] [blame] | 471 | struct delayed_work *d_work = to_delayed_work(work_req); |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 472 | struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work); |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 473 | |
| 474 | mutex_lock(&mem_ctls_mutex); |
| 475 | |
Borislav Petkov | 06e912d | 2016-02-02 11:36:11 +0100 | [diff] [blame] | 476 | if (mci->op_state != OP_RUNNING_POLL) { |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 477 | mutex_unlock(&mem_ctls_mutex); |
| 478 | return; |
| 479 | } |
| 480 | |
Borislav Petkov | d3116a0 | 2017-01-26 18:25:11 +0100 | [diff] [blame] | 481 | if (edac_op_state == EDAC_OPSTATE_POLL) |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 482 | mci->edac_check(mci); |
| 483 | |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 484 | mutex_unlock(&mem_ctls_mutex); |
| 485 | |
Borislav Petkov | 06e912d | 2016-02-02 11:36:11 +0100 | [diff] [blame] | 486 | /* Queue ourselves again. */ |
Borislav Petkov | c4cf3b4 | 2015-11-30 19:02:01 +0100 | [diff] [blame] | 487 | edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec())); |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 488 | } |
| 489 | |
| 490 | /* |
Doug Thompson | bce1968 | 2007-07-26 10:41:14 -0700 | [diff] [blame] | 491 | * edac_mc_reset_delay_period(unsigned long value) |
| 492 | * |
| 493 | * user space has updated our poll period value, need to |
| 494 | * reset our workq delays |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 495 | */ |
Borislav Petkov | 9da21b1 | 2014-02-03 15:05:13 -0500 | [diff] [blame] | 496 | void edac_mc_reset_delay_period(unsigned long value) |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 497 | { |
Doug Thompson | bce1968 | 2007-07-26 10:41:14 -0700 | [diff] [blame] | 498 | struct mem_ctl_info *mci; |
| 499 | struct list_head *item; |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 500 | |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 501 | mutex_lock(&mem_ctls_mutex); |
| 502 | |
Doug Thompson | bce1968 | 2007-07-26 10:41:14 -0700 | [diff] [blame] | 503 | list_for_each(item, &mc_devices) { |
| 504 | mci = list_entry(item, struct mem_ctl_info, link); |
| 505 | |
Nicholas Krause | fbedcaf | 2016-05-19 18:45:58 -0400 | [diff] [blame] | 506 | if (mci->op_state == OP_RUNNING_POLL) |
| 507 | edac_mod_work(&mci->work, value); |
Doug Thompson | bce1968 | 2007-07-26 10:41:14 -0700 | [diff] [blame] | 508 | } |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 509 | mutex_unlock(&mem_ctls_mutex); |
| 510 | } |
| 511 | |
Doug Thompson | bce1968 | 2007-07-26 10:41:14 -0700 | [diff] [blame] | 512 | |
| 513 | |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 514 | /* Return 0 on success, 1 on failure. |
| 515 | * Before calling this function, caller must |
| 516 | * assign a unique value to mci->mc_idx. |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 517 | * |
| 518 | * locking model: |
| 519 | * |
| 520 | * called with the mem_ctls_mutex lock held |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 521 | */ |
Douglas Thompson | 079708b | 2007-07-19 01:49:58 -0700 | [diff] [blame] | 522 | static int add_mc_to_global_list(struct mem_ctl_info *mci) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 523 | { |
| 524 | struct list_head *item, *insert_before; |
| 525 | struct mem_ctl_info *p; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 526 | |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 527 | insert_before = &mc_devices; |
| 528 | |
Borislav Petkov | c73e883 | 2016-11-14 13:26:11 +0100 | [diff] [blame] | 529 | p = __find_mci_by_dev(mci->pdev); |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 530 | if (unlikely(p != NULL)) |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 531 | goto fail0; |
| 532 | |
| 533 | list_for_each(item, &mc_devices) { |
| 534 | p = list_entry(item, struct mem_ctl_info, link); |
| 535 | |
| 536 | if (p->mc_idx >= mci->mc_idx) { |
| 537 | if (unlikely(p->mc_idx == mci->mc_idx)) |
| 538 | goto fail1; |
| 539 | |
| 540 | insert_before = item; |
| 541 | break; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 542 | } |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 543 | } |
| 544 | |
| 545 | list_add_tail_rcu(&mci->link, insert_before); |
| 546 | return 0; |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 547 | |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 548 | fail0: |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 549 | edac_printk(KERN_WARNING, EDAC_MC, |
Mauro Carvalho Chehab | fd68750 | 2012-03-16 07:44:18 -0300 | [diff] [blame] | 550 | "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev), |
Stephen Rothwell | 17aa7e0 | 2008-05-05 13:54:19 +1000 | [diff] [blame] | 551 | edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx); |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 552 | return 1; |
| 553 | |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 554 | fail1: |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 555 | edac_printk(KERN_WARNING, EDAC_MC, |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 556 | "bug in low-level driver: attempt to assign\n" |
| 557 | " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__); |
Doug Thompson | 2d7bbb9 | 2006-06-30 01:56:08 -0700 | [diff] [blame] | 558 | return 1; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 559 | } |
| 560 | |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 561 | static int del_mc_from_global_list(struct mem_ctl_info *mci) |
Dave Peterson | a1d03fc | 2006-03-26 01:38:46 -0800 | [diff] [blame] | 562 | { |
| 563 | list_del_rcu(&mci->link); |
Lai Jiangshan | e2e7709 | 2011-05-26 16:25:58 -0700 | [diff] [blame] | 564 | |
| 565 | /* these are for safe removal of devices from global list while |
| 566 | * NMI handlers may be traversing list |
| 567 | */ |
| 568 | synchronize_rcu(); |
| 569 | INIT_LIST_HEAD(&mci->link); |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 570 | |
Borislav Petkov | 97bb6c1 | 2017-01-26 16:49:59 +0100 | [diff] [blame] | 571 | return list_empty(&mc_devices); |
Dave Peterson | a1d03fc | 2006-03-26 01:38:46 -0800 | [diff] [blame] | 572 | } |
| 573 | |
Douglas Thompson | 079708b | 2007-07-19 01:49:58 -0700 | [diff] [blame] | 574 | struct mem_ctl_info *edac_mc_find(int idx) |
Douglas Thompson | 5da0831 | 2007-07-19 01:49:31 -0700 | [diff] [blame] | 575 | { |
Robert Richter | 29a0c84 | 2019-05-14 10:49:09 +0000 | [diff] [blame] | 576 | struct mem_ctl_info *mci; |
Douglas Thompson | 5da0831 | 2007-07-19 01:49:31 -0700 | [diff] [blame] | 577 | struct list_head *item; |
Borislav Petkov | c73e883 | 2016-11-14 13:26:11 +0100 | [diff] [blame] | 578 | |
| 579 | mutex_lock(&mem_ctls_mutex); |
Douglas Thompson | 5da0831 | 2007-07-19 01:49:31 -0700 | [diff] [blame] | 580 | |
| 581 | list_for_each(item, &mc_devices) { |
| 582 | mci = list_entry(item, struct mem_ctl_info, link); |
Robert Richter | 29a0c84 | 2019-05-14 10:49:09 +0000 | [diff] [blame] | 583 | if (mci->mc_idx == idx) |
| 584 | goto unlock; |
Douglas Thompson | 5da0831 | 2007-07-19 01:49:31 -0700 | [diff] [blame] | 585 | } |
| 586 | |
Robert Richter | 29a0c84 | 2019-05-14 10:49:09 +0000 | [diff] [blame] | 587 | mci = NULL; |
Borislav Petkov | c73e883 | 2016-11-14 13:26:11 +0100 | [diff] [blame] | 588 | unlock: |
| 589 | mutex_unlock(&mem_ctls_mutex); |
| 590 | return mci; |
Douglas Thompson | 5da0831 | 2007-07-19 01:49:31 -0700 | [diff] [blame] | 591 | } |
| 592 | EXPORT_SYMBOL(edac_mc_find); |
| 593 | |
Toshi Kani | 3877c7d | 2017-08-23 16:54:46 -0600 | [diff] [blame] | 594 | const char *edac_get_owner(void) |
| 595 | { |
| 596 | return edac_mc_owner; |
| 597 | } |
| 598 | EXPORT_SYMBOL_GPL(edac_get_owner); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 599 | |
| 600 | /* FIXME - should a warning be printed if no error detection? correction? */ |
Takashi Iwai | 4e8d230 | 2015-02-04 11:48:52 +0100 | [diff] [blame] | 601 | int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci, |
| 602 | const struct attribute_group **groups) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 603 | { |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 604 | int ret = -EINVAL; |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 605 | edac_dbg(0, "\n"); |
Doug Thompson | b8f6f97 | 2007-07-19 01:50:26 -0700 | [diff] [blame] | 606 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 607 | #ifdef CONFIG_EDAC_DEBUG |
| 608 | if (edac_debug_level >= 3) |
| 609 | edac_mc_dump_mci(mci); |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 610 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 611 | if (edac_debug_level >= 4) { |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 612 | struct dimm_info *dimm; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 613 | int i; |
| 614 | |
| 615 | for (i = 0; i < mci->nr_csrows; i++) { |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 616 | struct csrow_info *csrow = mci->csrows[i]; |
| 617 | u32 nr_pages = 0; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 618 | int j; |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 619 | |
Mauro Carvalho Chehab | 6e84d35 | 2012-04-30 10:24:43 -0300 | [diff] [blame] | 620 | for (j = 0; j < csrow->nr_channels; j++) |
| 621 | nr_pages += csrow->channels[j]->dimm->nr_pages; |
| 622 | if (!nr_pages) |
| 623 | continue; |
| 624 | edac_mc_dump_csrow(csrow); |
| 625 | for (j = 0; j < csrow->nr_channels; j++) |
| 626 | if (csrow->channels[j]->dimm->nr_pages) |
| 627 | edac_mc_dump_channel(csrow->channels[j]); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 628 | } |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 629 | |
| 630 | mci_for_each_dimm(mci, dimm) |
| 631 | edac_mc_dump_dimm(dimm); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 632 | } |
| 633 | #endif |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 634 | mutex_lock(&mem_ctls_mutex); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 635 | |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 636 | if (edac_mc_owner && edac_mc_owner != mci->mod_name) { |
| 637 | ret = -EPERM; |
| 638 | goto fail0; |
| 639 | } |
| 640 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 641 | if (add_mc_to_global_list(mci)) |
Dave Peterson | 028a7b6d | 2006-03-26 01:38:47 -0800 | [diff] [blame] | 642 | goto fail0; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 643 | |
| 644 | /* set load time so that error rate can be tracked */ |
| 645 | mci->start_time = jiffies; |
| 646 | |
Borislav Petkov | 861e6ed | 2018-11-06 12:35:21 +0100 | [diff] [blame] | 647 | mci->bus = edac_get_sysfs_subsys(); |
Borislav Petkov | 88d84ac | 2013-07-19 12:28:25 +0200 | [diff] [blame] | 648 | |
Takashi Iwai | 4e8d230 | 2015-02-04 11:48:52 +0100 | [diff] [blame] | 649 | if (edac_create_sysfs_mci_device(mci, groups)) { |
eric wollesen | 9794f33 | 2007-02-12 00:53:08 -0800 | [diff] [blame] | 650 | edac_mc_printk(mci, KERN_WARNING, |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 651 | "failed to create sysfs device\n"); |
eric wollesen | 9794f33 | 2007-02-12 00:53:08 -0800 | [diff] [blame] | 652 | goto fail1; |
| 653 | } |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 654 | |
Borislav Petkov | 0966760 | 2016-02-02 10:59:53 +0100 | [diff] [blame] | 655 | if (mci->edac_check) { |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 656 | mci->op_state = OP_RUNNING_POLL; |
| 657 | |
Borislav Petkov | 626a7a4 | 2016-02-02 11:06:41 +0100 | [diff] [blame] | 658 | INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function); |
| 659 | edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec())); |
| 660 | |
Dave Jiang | 81d87cb | 2007-07-19 01:49:52 -0700 | [diff] [blame] | 661 | } else { |
| 662 | mci->op_state = OP_RUNNING_INTERRUPT; |
| 663 | } |
| 664 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 665 | /* Report action taken */ |
Robert Richter | 7270a60 | 2013-10-10 18:22:36 +0200 | [diff] [blame] | 666 | edac_mc_printk(mci, KERN_INFO, |
| 667 | "Giving out device to module %s controller %s: DEV %s (%s)\n", |
| 668 | mci->mod_name, mci->ctl_name, mci->dev_name, |
| 669 | edac_op_state_to_string(mci->op_state)); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 670 | |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 671 | edac_mc_owner = mci->mod_name; |
| 672 | |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 673 | mutex_unlock(&mem_ctls_mutex); |
Dave Peterson | 028a7b6d | 2006-03-26 01:38:47 -0800 | [diff] [blame] | 674 | return 0; |
| 675 | |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 676 | fail1: |
Dave Peterson | 028a7b6d | 2006-03-26 01:38:47 -0800 | [diff] [blame] | 677 | del_mc_from_global_list(mci); |
| 678 | |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 679 | fail0: |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 680 | mutex_unlock(&mem_ctls_mutex); |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 681 | return ret; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 682 | } |
Takashi Iwai | 4e8d230 | 2015-02-04 11:48:52 +0100 | [diff] [blame] | 683 | EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 684 | |
Douglas Thompson | 079708b | 2007-07-19 01:49:58 -0700 | [diff] [blame] | 685 | struct mem_ctl_info *edac_mc_del_mc(struct device *dev) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 686 | { |
Dave Peterson | 18dbc33 | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 687 | struct mem_ctl_info *mci; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 688 | |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 689 | edac_dbg(0, "\n"); |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 690 | |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 691 | mutex_lock(&mem_ctls_mutex); |
Dave Peterson | 18dbc33 | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 692 | |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 693 | /* find the requested mci struct in the global list */ |
Borislav Petkov | c73e883 | 2016-11-14 13:26:11 +0100 | [diff] [blame] | 694 | mci = __find_mci_by_dev(dev); |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 695 | if (mci == NULL) { |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 696 | mutex_unlock(&mem_ctls_mutex); |
Dave Peterson | 18dbc33 | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 697 | return NULL; |
| 698 | } |
| 699 | |
Borislav Petkov | 0966760 | 2016-02-02 10:59:53 +0100 | [diff] [blame] | 700 | /* mark MCI offline: */ |
| 701 | mci->op_state = OP_OFFLINE; |
| 702 | |
Borislav Petkov | 97bb6c1 | 2017-01-26 16:49:59 +0100 | [diff] [blame] | 703 | if (del_mc_from_global_list(mci)) |
Mauro Carvalho Chehab | 80cc7d8 | 2012-10-31 10:42:29 -0300 | [diff] [blame] | 704 | edac_mc_owner = NULL; |
Borislav Petkov | 0966760 | 2016-02-02 10:59:53 +0100 | [diff] [blame] | 705 | |
Matthias Kaehlcke | 63b7df9 | 2007-07-19 01:49:38 -0700 | [diff] [blame] | 706 | mutex_unlock(&mem_ctls_mutex); |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 707 | |
Borislav Petkov | 0966760 | 2016-02-02 10:59:53 +0100 | [diff] [blame] | 708 | if (mci->edac_check) |
Borislav Petkov | 626a7a4 | 2016-02-02 11:06:41 +0100 | [diff] [blame] | 709 | edac_stop_work(&mci->work); |
Borislav Petkov | bb31b312 | 2010-12-02 17:48:35 +0100 | [diff] [blame] | 710 | |
| 711 | /* remove from sysfs */ |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 712 | edac_remove_sysfs_mci_device(mci); |
| 713 | |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 714 | edac_printk(KERN_INFO, EDAC_MC, |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 715 | "Removed device %d for %s %s: DEV %s\n", mci->mc_idx, |
Stephen Rothwell | 17aa7e0 | 2008-05-05 13:54:19 +1000 | [diff] [blame] | 716 | mci->mod_name, mci->ctl_name, edac_dev_name(mci)); |
Doug Thompson | bf52fa4 | 2007-07-19 01:50:30 -0700 | [diff] [blame] | 717 | |
Dave Peterson | 18dbc33 | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 718 | return mci; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 719 | } |
Dave Peterson | 9110540 | 2006-03-26 01:38:55 -0800 | [diff] [blame] | 720 | EXPORT_SYMBOL_GPL(edac_mc_del_mc); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 721 | |
Adrian Bunk | 2da1c11 | 2007-07-19 01:49:32 -0700 | [diff] [blame] | 722 | static void edac_mc_scrub_block(unsigned long page, unsigned long offset, |
| 723 | u32 size) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 724 | { |
| 725 | struct page *pg; |
| 726 | void *virt_addr; |
| 727 | unsigned long flags = 0; |
| 728 | |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 729 | edac_dbg(3, "\n"); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 730 | |
| 731 | /* ECC error page was not in our memory. Ignore it. */ |
Douglas Thompson | 079708b | 2007-07-19 01:49:58 -0700 | [diff] [blame] | 732 | if (!pfn_valid(page)) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 733 | return; |
| 734 | |
| 735 | /* Find the actual page structure then map it and fix */ |
| 736 | pg = pfn_to_page(page); |
| 737 | |
| 738 | if (PageHighMem(pg)) |
| 739 | local_irq_save(flags); |
| 740 | |
Cong Wang | 4e5df7c | 2011-11-25 23:14:19 +0800 | [diff] [blame] | 741 | virt_addr = kmap_atomic(pg); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 742 | |
| 743 | /* Perform architecture specific atomic scrub operation */ |
Borislav Petkov | b01aec9 | 2015-05-21 19:59:31 +0200 | [diff] [blame] | 744 | edac_atomic_scrub(virt_addr + offset, size); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 745 | |
| 746 | /* Unmap and complete */ |
Cong Wang | 4e5df7c | 2011-11-25 23:14:19 +0800 | [diff] [blame] | 747 | kunmap_atomic(virt_addr); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 748 | |
| 749 | if (PageHighMem(pg)) |
| 750 | local_irq_restore(flags); |
| 751 | } |
| 752 | |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 753 | /* FIXME - should return -1 */ |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 754 | int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 755 | { |
Mauro Carvalho Chehab | de3910eb | 2012-04-24 15:05:43 -0300 | [diff] [blame] | 756 | struct csrow_info **csrows = mci->csrows; |
Mauro Carvalho Chehab | a895bf8 | 2012-01-28 09:09:38 -0300 | [diff] [blame] | 757 | int row, i, j, n; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 758 | |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 759 | edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 760 | row = -1; |
| 761 | |
| 762 | for (i = 0; i < mci->nr_csrows; i++) { |
Mauro Carvalho Chehab | de3910eb | 2012-04-24 15:05:43 -0300 | [diff] [blame] | 763 | struct csrow_info *csrow = csrows[i]; |
Mauro Carvalho Chehab | a895bf8 | 2012-01-28 09:09:38 -0300 | [diff] [blame] | 764 | n = 0; |
| 765 | for (j = 0; j < csrow->nr_channels; j++) { |
Mauro Carvalho Chehab | de3910eb | 2012-04-24 15:05:43 -0300 | [diff] [blame] | 766 | struct dimm_info *dimm = csrow->channels[j]->dimm; |
Mauro Carvalho Chehab | a895bf8 | 2012-01-28 09:09:38 -0300 | [diff] [blame] | 767 | n += dimm->nr_pages; |
| 768 | } |
| 769 | if (n == 0) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 770 | continue; |
| 771 | |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 772 | edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n", |
| 773 | mci->mc_idx, |
| 774 | csrow->first_page, page, csrow->last_page, |
| 775 | csrow->page_mask); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 776 | |
| 777 | if ((page >= csrow->first_page) && |
| 778 | (page <= csrow->last_page) && |
| 779 | ((page & csrow->page_mask) == |
| 780 | (csrow->first_page & csrow->page_mask))) { |
| 781 | row = i; |
| 782 | break; |
| 783 | } |
| 784 | } |
| 785 | |
| 786 | if (row == -1) |
Dave Peterson | 537fba2 | 2006-03-26 01:38:40 -0800 | [diff] [blame] | 787 | edac_mc_printk(mci, KERN_ERR, |
Douglas Thompson | 052dfb4 | 2007-07-19 01:50:13 -0700 | [diff] [blame] | 788 | "could not look up page error address %lx\n", |
| 789 | (unsigned long)page); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 790 | |
| 791 | return row; |
| 792 | } |
Dave Peterson | 9110540 | 2006-03-26 01:38:55 -0800 | [diff] [blame] | 793 | EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 794 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 795 | const char *edac_layer_name[] = { |
| 796 | [EDAC_MC_LAYER_BRANCH] = "branch", |
| 797 | [EDAC_MC_LAYER_CHANNEL] = "channel", |
| 798 | [EDAC_MC_LAYER_SLOT] = "slot", |
| 799 | [EDAC_MC_LAYER_CHIP_SELECT] = "csrow", |
Mauro Carvalho Chehab | c66b5a7 | 2013-02-15 07:21:08 -0300 | [diff] [blame] | 800 | [EDAC_MC_LAYER_ALL_MEM] = "memory", |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 801 | }; |
| 802 | EXPORT_SYMBOL_GPL(edac_layer_name); |
| 803 | |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 804 | static void edac_inc_ce_error(struct edac_raw_error_desc *e) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 805 | { |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 806 | int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer }; |
| 807 | struct mem_ctl_info *mci = error_desc_to_mci(e); |
Robert Richter | 4aa92c8 | 2020-02-17 12:30:23 +0100 | [diff] [blame] | 808 | struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 809 | |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 810 | mci->ce_mc += e->error_count; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 811 | |
Robert Richter | 4aa92c8 | 2020-02-17 12:30:23 +0100 | [diff] [blame] | 812 | if (dimm) |
| 813 | dimm->ce_count += e->error_count; |
| 814 | else |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 815 | mci->ce_noinfo_count += e->error_count; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 816 | } |
| 817 | |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 818 | static void edac_inc_ue_error(struct edac_raw_error_desc *e) |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 819 | { |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 820 | int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer }; |
| 821 | struct mem_ctl_info *mci = error_desc_to_mci(e); |
Robert Richter | 4aa92c8 | 2020-02-17 12:30:23 +0100 | [diff] [blame] | 822 | struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]); |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 823 | |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 824 | mci->ue_mc += e->error_count; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 825 | |
Robert Richter | 4aa92c8 | 2020-02-17 12:30:23 +0100 | [diff] [blame] | 826 | if (dimm) |
| 827 | dimm->ue_count += e->error_count; |
| 828 | else |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 829 | mci->ue_noinfo_count += e->error_count; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 830 | } |
| 831 | |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 832 | static void edac_ce_error(struct edac_raw_error_desc *e) |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 833 | { |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 834 | struct mem_ctl_info *mci = error_desc_to_mci(e); |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 835 | unsigned long remapped_page; |
| 836 | |
| 837 | if (edac_mc_get_log_ce()) { |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 838 | edac_mc_printk(mci, KERN_WARNING, |
| 839 | "%d CE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx%s%s)\n", |
| 840 | e->error_count, e->msg, |
| 841 | *e->msg ? " " : "", |
| 842 | e->label, e->location, e->page_frame_number, e->offset_in_page, |
| 843 | e->grain, e->syndrome, |
| 844 | *e->other_detail ? " - " : "", |
| 845 | e->other_detail); |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 846 | } |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 847 | |
| 848 | edac_inc_ce_error(e); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 849 | |
Loc Ho | aa2064d | 2014-05-08 17:03:16 -0600 | [diff] [blame] | 850 | if (mci->scrub_mode == SCRUB_SW_SRC) { |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 851 | /* |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 852 | * Some memory controllers (called MCs below) can remap |
| 853 | * memory so that it is still available at a different |
| 854 | * address when PCI devices map into memory. |
| 855 | * MC's that can't do this, lose the memory where PCI |
| 856 | * devices are mapped. This mapping is MC-dependent |
| 857 | * and so we call back into the MC driver for it to |
| 858 | * map the MC page to a physical (CPU) page which can |
| 859 | * then be mapped to a virtual page - which can then |
| 860 | * be scrubbed. |
| 861 | */ |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 862 | remapped_page = mci->ctl_page_to_phys ? |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 863 | mci->ctl_page_to_phys(mci, e->page_frame_number) : |
| 864 | e->page_frame_number; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 865 | |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 866 | edac_mc_scrub_block(remapped_page, e->offset_in_page, e->grain); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 867 | } |
| 868 | } |
| 869 | |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 870 | static void edac_ue_error(struct edac_raw_error_desc *e) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 871 | { |
Robert Richter | 6ab7617 | 2020-01-23 09:03:04 +0000 | [diff] [blame] | 872 | struct mem_ctl_info *mci = error_desc_to_mci(e); |
Borislav Petkov | f430d570 | 2012-09-10 18:36:09 +0200 | [diff] [blame] | 873 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 874 | if (edac_mc_get_log_ue()) { |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 875 | edac_mc_printk(mci, KERN_WARNING, |
| 876 | "%d UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n", |
| 877 | e->error_count, e->msg, |
| 878 | *e->msg ? " " : "", |
| 879 | e->label, e->location, e->page_frame_number, e->offset_in_page, |
| 880 | e->grain, |
| 881 | *e->other_detail ? " - " : "", |
| 882 | e->other_detail); |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 883 | } |
Dave Peterson | e7ecd89 | 2006-03-26 01:38:52 -0800 | [diff] [blame] | 884 | |
Zhenzhong Duan | e9ff663 | 2020-06-10 14:58:46 +0800 | [diff] [blame] | 885 | edac_inc_ue_error(e); |
| 886 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 887 | if (edac_mc_get_panic_on_ue()) { |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 888 | panic("UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n", |
| 889 | e->msg, |
| 890 | *e->msg ? " " : "", |
| 891 | e->label, e->location, e->page_frame_number, e->offset_in_page, |
| 892 | e->grain, |
| 893 | *e->other_detail ? " - " : "", |
| 894 | e->other_detail); |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 895 | } |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 896 | } |
| 897 | |
Robert Richter | 6334dc4 | 2020-02-14 15:17:56 +0100 | [diff] [blame] | 898 | static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan) |
| 899 | { |
| 900 | struct mem_ctl_info *mci = error_desc_to_mci(e); |
| 901 | enum hw_event_mc_err_type type = e->type; |
| 902 | u16 count = e->error_count; |
| 903 | |
| 904 | if (row < 0) |
| 905 | return; |
| 906 | |
| 907 | edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan); |
| 908 | |
| 909 | if (type == HW_EVENT_ERR_CORRECTED) { |
| 910 | mci->csrows[row]->ce_count += count; |
| 911 | if (chan >= 0) |
| 912 | mci->csrows[row]->channels[chan]->ce_count += count; |
| 913 | } else { |
| 914 | mci->csrows[row]->ue_count += count; |
| 915 | } |
| 916 | } |
| 917 | |
Robert Richter | 91b327f | 2020-01-23 09:02:56 +0000 | [diff] [blame] | 918 | void edac_raw_mc_handle_error(struct edac_raw_error_desc *e) |
Mauro Carvalho Chehab | e7e2483 | 2012-10-31 13:46:11 -0300 | [diff] [blame] | 919 | { |
Robert Richter | 91b327f | 2020-01-23 09:02:56 +0000 | [diff] [blame] | 920 | struct mem_ctl_info *mci = error_desc_to_mci(e); |
Robert Richter | 787d899 | 2019-11-06 09:33:27 +0000 | [diff] [blame] | 921 | u8 grain_bits; |
| 922 | |
| 923 | /* Sanity-check driver-supplied grain value. */ |
| 924 | if (WARN_ON_ONCE(!e->grain)) |
| 925 | e->grain = 1; |
| 926 | |
| 927 | grain_bits = fls_long(e->grain - 1); |
| 928 | |
| 929 | /* Report the error via the trace interface */ |
| 930 | if (IS_ENABLED(CONFIG_RAS)) |
Robert Richter | 672ef0e | 2020-01-23 09:02:54 +0000 | [diff] [blame] | 931 | trace_mc_event(e->type, e->msg, e->label, e->error_count, |
Robert Richter | 787d899 | 2019-11-06 09:33:27 +0000 | [diff] [blame] | 932 | mci->mc_idx, e->top_layer, e->mid_layer, |
| 933 | e->low_layer, |
| 934 | (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page, |
| 935 | grain_bits, e->syndrome, e->other_detail); |
Mauro Carvalho Chehab | e7e2483 | 2012-10-31 13:46:11 -0300 | [diff] [blame] | 936 | |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 937 | if (e->type == HW_EVENT_ERR_CORRECTED) |
| 938 | edac_ce_error(e); |
| 939 | else |
| 940 | edac_ue_error(e); |
Mauro Carvalho Chehab | e7e2483 | 2012-10-31 13:46:11 -0300 | [diff] [blame] | 941 | } |
| 942 | EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error); |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 943 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 944 | void edac_mc_handle_error(const enum hw_event_mc_err_type type, |
| 945 | struct mem_ctl_info *mci, |
Mauro Carvalho Chehab | 9eb07a7 | 2012-06-04 13:27:43 -0300 | [diff] [blame] | 946 | const u16 error_count, |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 947 | const unsigned long page_frame_number, |
| 948 | const unsigned long offset_in_page, |
| 949 | const unsigned long syndrome, |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 950 | const int top_layer, |
| 951 | const int mid_layer, |
| 952 | const int low_layer, |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 953 | const char *msg, |
Mauro Carvalho Chehab | 03f7eae | 2012-06-04 11:29:25 -0300 | [diff] [blame] | 954 | const char *other_detail) |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 955 | { |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 956 | struct dimm_info *dimm; |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 957 | char *p, *end; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 958 | int row = -1, chan = -1; |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 959 | int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer }; |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 960 | int i, n_labels = 0; |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 961 | struct edac_raw_error_desc *e = &mci->error_desc; |
Robert Richter | 67792cf | 2020-01-23 09:03:02 +0000 | [diff] [blame] | 962 | bool any_memory = true; |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 963 | const char *prefix; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 964 | |
Joe Perches | 956b9ba1 | 2012-04-29 17:08:39 -0300 | [diff] [blame] | 965 | edac_dbg(3, "MC%d\n", mci->mc_idx); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 966 | |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 967 | /* Fills the error report buffer */ |
| 968 | memset(e, 0, sizeof (*e)); |
| 969 | e->error_count = error_count; |
Robert Richter | 672ef0e | 2020-01-23 09:02:54 +0000 | [diff] [blame] | 970 | e->type = type; |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 971 | e->top_layer = top_layer; |
| 972 | e->mid_layer = mid_layer; |
| 973 | e->low_layer = low_layer; |
| 974 | e->page_frame_number = page_frame_number; |
| 975 | e->offset_in_page = offset_in_page; |
| 976 | e->syndrome = syndrome; |
Robert Richter | 1853ee7 | 2020-01-23 09:03:06 +0000 | [diff] [blame] | 977 | /* need valid strings here for both: */ |
| 978 | e->msg = msg ?: ""; |
| 979 | e->other_detail = other_detail ?: ""; |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 980 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 981 | /* |
Robert Richter | 67792cf | 2020-01-23 09:03:02 +0000 | [diff] [blame] | 982 | * Check if the event report is consistent and if the memory location is |
Robert Richter | 4aa92c8 | 2020-02-17 12:30:23 +0100 | [diff] [blame] | 983 | * known. If it is, the DIMM(s) label info will be filled and the DIMM's |
| 984 | * error counters will be incremented. |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 985 | */ |
| 986 | for (i = 0; i < mci->n_layers; i++) { |
| 987 | if (pos[i] >= (int)mci->layers[i].size) { |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 988 | |
| 989 | edac_mc_printk(mci, KERN_ERR, |
| 990 | "INTERNAL ERROR: %s value is out of range (%d >= %d)\n", |
| 991 | edac_layer_name[mci->layers[i].type], |
| 992 | pos[i], mci->layers[i].size); |
| 993 | /* |
| 994 | * Instead of just returning it, let's use what's |
| 995 | * known about the error. The increment routines and |
| 996 | * the DIMM filter logic will do the right thing by |
| 997 | * pointing the likely damaged DIMMs. |
| 998 | */ |
| 999 | pos[i] = -1; |
| 1000 | } |
| 1001 | if (pos[i] >= 0) |
Robert Richter | 67792cf | 2020-01-23 09:03:02 +0000 | [diff] [blame] | 1002 | any_memory = false; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1003 | } |
| 1004 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1005 | /* |
| 1006 | * Get the dimm label/grain that applies to the match criteria. |
| 1007 | * As the error algorithm may not be able to point to just one memory |
| 1008 | * stick, the logic here will get all possible labels that could |
| 1009 | * pottentially be affected by the error. |
| 1010 | * On FB-DIMM memory controllers, for uncorrected errors, it is common |
| 1011 | * to have only the MC channel and the MC dimm (also called "branch") |
| 1012 | * but the channel is not known, as the memory is arranged in pairs, |
| 1013 | * where each memory belongs to a separate channel within the same |
| 1014 | * branch. |
| 1015 | */ |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 1016 | p = e->label; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1017 | *p = '\0'; |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 1018 | end = p + sizeof(e->label); |
| 1019 | prefix = ""; |
Borislav Petkov | 4da1b7b | 2012-09-10 17:57:44 +0200 | [diff] [blame] | 1020 | |
Robert Richter | c498afa | 2019-11-06 09:33:07 +0000 | [diff] [blame] | 1021 | mci_for_each_dimm(mci, dimm) { |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 1022 | if (top_layer >= 0 && top_layer != dimm->location[0]) |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1023 | continue; |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 1024 | if (mid_layer >= 0 && mid_layer != dimm->location[1]) |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1025 | continue; |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 1026 | if (low_layer >= 0 && low_layer != dimm->location[2]) |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1027 | continue; |
| 1028 | |
| 1029 | /* get the max grain, over the error match range */ |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 1030 | if (dimm->grain > e->grain) |
| 1031 | e->grain = dimm->grain; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1032 | |
| 1033 | /* |
| 1034 | * If the error is memory-controller wide, there's no need to |
Robert Richter | 67792cf | 2020-01-23 09:03:02 +0000 | [diff] [blame] | 1035 | * seek for the affected DIMMs because the whole channel/memory |
| 1036 | * controller/... may be affected. Also, don't show errors for |
| 1037 | * empty DIMM slots. |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1038 | */ |
Robert Richter | 65bb4d1 | 2020-01-23 09:03:00 +0000 | [diff] [blame] | 1039 | if (!dimm->nr_pages) |
Robert Richter | 0d8292e | 2019-11-06 09:33:14 +0000 | [diff] [blame] | 1040 | continue; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1041 | |
Robert Richter | 0d8292e | 2019-11-06 09:33:14 +0000 | [diff] [blame] | 1042 | n_labels++; |
Robert Richter | 65bb4d1 | 2020-01-23 09:03:00 +0000 | [diff] [blame] | 1043 | if (n_labels > EDAC_MAX_LABELS) { |
| 1044 | p = e->label; |
| 1045 | *p = '\0'; |
| 1046 | } else { |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 1047 | p += scnprintf(p, end - p, "%s%s", prefix, dimm->label); |
| 1048 | prefix = OTHER_LABEL; |
Robert Richter | 0d8292e | 2019-11-06 09:33:14 +0000 | [diff] [blame] | 1049 | } |
Robert Richter | 0d8292e | 2019-11-06 09:33:14 +0000 | [diff] [blame] | 1050 | |
| 1051 | /* |
| 1052 | * get csrow/channel of the DIMM, in order to allow |
| 1053 | * incrementing the compat API counters |
| 1054 | */ |
| 1055 | edac_dbg(4, "%s csrows map: (%d,%d)\n", |
| 1056 | mci->csbased ? "rank" : "dimm", |
| 1057 | dimm->csrow, dimm->cschannel); |
| 1058 | if (row == -1) |
| 1059 | row = dimm->csrow; |
| 1060 | else if (row >= 0 && row != dimm->csrow) |
| 1061 | row = -2; |
| 1062 | |
| 1063 | if (chan == -1) |
| 1064 | chan = dimm->cschannel; |
| 1065 | else if (chan >= 0 && chan != dimm->cschannel) |
| 1066 | chan = -2; |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1067 | } |
| 1068 | |
Robert Richter | 67792cf | 2020-01-23 09:03:02 +0000 | [diff] [blame] | 1069 | if (any_memory) |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 1070 | strscpy(e->label, "any memory", sizeof(e->label)); |
Robert Richter | 6334dc4 | 2020-02-14 15:17:56 +0100 | [diff] [blame] | 1071 | else if (!*e->label) |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 1072 | strscpy(e->label, "unknown memory", sizeof(e->label)); |
Robert Richter | 6334dc4 | 2020-02-14 15:17:56 +0100 | [diff] [blame] | 1073 | |
| 1074 | edac_inc_csrow(e, row, chan); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1075 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1076 | /* Fill the RAM location data */ |
Mauro Carvalho Chehab | c7ef764 | 2013-02-21 13:36:45 -0300 | [diff] [blame] | 1077 | p = e->location; |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 1078 | end = p + sizeof(e->location); |
| 1079 | prefix = ""; |
Borislav Petkov | 4da1b7b | 2012-09-10 17:57:44 +0200 | [diff] [blame] | 1080 | |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1081 | for (i = 0; i < mci->n_layers; i++) { |
| 1082 | if (pos[i] < 0) |
| 1083 | continue; |
| 1084 | |
Len Baker | fca6116 | 2021-09-03 17:05:39 +0200 | [diff] [blame] | 1085 | p += scnprintf(p, end - p, "%s%s:%d", prefix, |
| 1086 | edac_layer_name[mci->layers[i].type], pos[i]); |
| 1087 | prefix = " "; |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1088 | } |
Mauro Carvalho Chehab | 53f2d02 | 2012-02-23 08:10:34 -0300 | [diff] [blame] | 1089 | |
Robert Richter | 91b327f | 2020-01-23 09:02:56 +0000 | [diff] [blame] | 1090 | edac_raw_mc_handle_error(e); |
Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1091 | } |
Mauro Carvalho Chehab | 4275be6 | 2012-04-18 15:20:50 -0300 | [diff] [blame] | 1092 | EXPORT_SYMBOL_GPL(edac_mc_handle_error); |