blob: d6eed727b0cd2ef8d4836647c7f1c56d2ce071a5 [file] [log] [blame]
Alan Coxda9bb1d2006-01-18 17:44:13 -08001/*
2 * edac_mc kernel module
Doug Thompson49c0dab72006-07-10 04:45:19 -07003 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
Alan Coxda9bb1d2006-01-18 17:44:13 -08004 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
10 *
11 * Modified by Dave Peterson and Doug Thompson
12 *
13 */
14
Alan Coxda9bb1d2006-01-18 17:44:13 -080015#include <linux/module.h>
16#include <linux/proc_fs.h>
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/smp.h>
20#include <linux/init.h>
21#include <linux/sysctl.h>
22#include <linux/highmem.h>
23#include <linux/timer.h>
24#include <linux/slab.h>
25#include <linux/jiffies.h>
26#include <linux/spinlock.h>
27#include <linux/list.h>
Alan Coxda9bb1d2006-01-18 17:44:13 -080028#include <linux/ctype.h>
Dave Jiangc0d12172007-07-19 01:49:46 -070029#include <linux/edac.h>
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -030030#include <linux/bitops.h>
Linus Torvalds7c0f6ba2016-12-24 11:46:01 -080031#include <linux/uaccess.h>
Alan Coxda9bb1d2006-01-18 17:44:13 -080032#include <asm/page.h>
Mauro Carvalho Chehab78d88e82016-10-29 15:16:34 -020033#include "edac_mc.h"
Douglas Thompson7c9281d2007-07-19 01:49:33 -070034#include "edac_module.h"
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -030035#include <ras/ras_event.h>
36
Borislav Petkovb01aec92015-05-21 19:59:31 +020037#ifdef CONFIG_EDAC_ATOMIC_SCRUB
38#include <asm/edac.h>
39#else
40#define edac_atomic_scrub(va, size) do { } while (0)
41#endif
42
Borislav Petkov8c22b4f2017-01-26 22:18:12 +010043int edac_op_state = EDAC_OPSTATE_INVAL;
44EXPORT_SYMBOL_GPL(edac_op_state);
45
Alan Coxda9bb1d2006-01-18 17:44:13 -080046/* lock to memory controller's control array */
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -070047static DEFINE_MUTEX(mem_ctls_mutex);
Robert P. J. Dayff6ac2a2008-04-29 01:03:17 -070048static LIST_HEAD(mc_devices);
Alan Coxda9bb1d2006-01-18 17:44:13 -080049
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -030050/*
51 * Used to lock EDAC MC to just one module, avoiding two drivers e. g.
52 * apei/ghes and i7core_edac to be used at the same time.
53 */
Toshi Kani3877c7d2017-08-23 16:54:46 -060054static const char *edac_mc_owner;
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -030055
Robert Richter91b327f2020-01-23 09:02:56 +000056static struct mem_ctl_info *error_desc_to_mci(struct edac_raw_error_desc *e)
57{
58 return container_of(e, struct mem_ctl_info, error_desc);
59}
60
Robert Richterd55c79a2019-09-02 12:33:41 +000061unsigned int edac_dimm_info_location(struct dimm_info *dimm, char *buf,
62 unsigned int len)
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -030063{
64 struct mem_ctl_info *mci = dimm->mci;
65 int i, n, count = 0;
66 char *p = buf;
67
68 for (i = 0; i < mci->n_layers; i++) {
Len Bakerfca61162021-09-03 17:05:39 +020069 n = scnprintf(p, len, "%s %d ",
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -030070 edac_layer_name[mci->layers[i].type],
71 dimm->location[i]);
72 p += n;
73 len -= n;
74 count += n;
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -030075 }
76
77 return count;
78}
79
Alan Coxda9bb1d2006-01-18 17:44:13 -080080#ifdef CONFIG_EDAC_DEBUG
81
Mauro Carvalho Chehaba4b4be32012-01-27 10:26:13 -030082static void edac_mc_dump_channel(struct rank_info *chan)
Alan Coxda9bb1d2006-01-18 17:44:13 -080083{
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -030084 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx);
85 edac_dbg(4, " channel = %p\n", chan);
86 edac_dbg(4, " channel->csrow = %p\n", chan->csrow);
87 edac_dbg(4, " channel->dimm = %p\n", chan->dimm);
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -030088}
89
Robert Richterc498afa2019-11-06 09:33:07 +000090static void edac_mc_dump_dimm(struct dimm_info *dimm)
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -030091{
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -030092 char location[80];
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -030093
Robert Richterc498afa2019-11-06 09:33:07 +000094 if (!dimm->nr_pages)
95 return;
96
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -030097 edac_dimm_info_location(dimm, location, sizeof(location));
98
99 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
Mauro Carvalho Chehab9713fae2013-03-11 09:28:48 -0300100 dimm->mci->csbased ? "rank" : "dimm",
Robert Richterc498afa2019-11-06 09:33:07 +0000101 dimm->idx, location, dimm->csrow, dimm->cschannel);
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -0300102 edac_dbg(4, " dimm = %p\n", dimm);
103 edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
104 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
105 edac_dbg(4, " dimm->grain = %d\n", dimm->grain);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800106}
107
Adrian Bunk2da1c112007-07-19 01:49:32 -0700108static void edac_mc_dump_csrow(struct csrow_info *csrow)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800109{
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -0300110 edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
111 edac_dbg(4, " csrow = %p\n", csrow);
112 edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow->first_page);
113 edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow->last_page);
114 edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow->page_mask);
115 edac_dbg(4, " csrow->nr_channels = %d\n", csrow->nr_channels);
116 edac_dbg(4, " csrow->channels = %p\n", csrow->channels);
117 edac_dbg(4, " csrow->mci = %p\n", csrow->mci);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800118}
119
Adrian Bunk2da1c112007-07-19 01:49:32 -0700120static void edac_mc_dump_mci(struct mem_ctl_info *mci)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800121{
Joe Perches956b9ba12012-04-29 17:08:39 -0300122 edac_dbg(3, "\tmci = %p\n", mci);
123 edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
124 edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
125 edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
126 edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
127 edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
128 mci->nr_csrows, mci->csrows);
129 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
130 mci->tot_dimms, mci->dimms);
131 edac_dbg(3, "\tdev = %p\n", mci->pdev);
132 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
133 mci->mod_name, mci->ctl_name);
134 edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800135}
136
Borislav Petkov24f9a7f2010-10-07 18:29:15 +0200137#endif /* CONFIG_EDAC_DEBUG */
138
Borislav Petkovf4ce6ec2014-08-13 23:27:55 +0200139const char * const edac_mem_types[] = {
Tony Luckd6dd77e2018-03-12 11:24:26 -0700140 [MEM_EMPTY] = "Empty",
141 [MEM_RESERVED] = "Reserved",
142 [MEM_UNKNOWN] = "Unknown",
143 [MEM_FPM] = "FPM",
144 [MEM_EDO] = "EDO",
145 [MEM_BEDO] = "BEDO",
146 [MEM_SDR] = "Unbuffered-SDR",
147 [MEM_RDR] = "Registered-SDR",
148 [MEM_DDR] = "Unbuffered-DDR",
149 [MEM_RDDR] = "Registered-DDR",
150 [MEM_RMBS] = "RMBS",
151 [MEM_DDR2] = "Unbuffered-DDR2",
152 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
153 [MEM_RDDR2] = "Registered-DDR2",
154 [MEM_XDR] = "XDR",
155 [MEM_DDR3] = "Unbuffered-DDR3",
156 [MEM_RDDR3] = "Registered-DDR3",
157 [MEM_LRDDR3] = "Load-Reduced-DDR3-RAM",
Qiuxu Zhuo3b203692020-11-05 15:48:51 +0800158 [MEM_LPDDR3] = "Low-Power-DDR3-RAM",
Tony Luckd6dd77e2018-03-12 11:24:26 -0700159 [MEM_DDR4] = "Unbuffered-DDR4",
Tony Luck001f8612018-03-12 11:24:27 -0700160 [MEM_RDDR4] = "Registered-DDR4",
Qiuxu Zhuo3b203692020-11-05 15:48:51 +0800161 [MEM_LPDDR4] = "Low-Power-DDR4-RAM",
Takashi Iwaib748f2d2018-08-10 16:14:26 +0200162 [MEM_LRDDR4] = "Load-Reduced-DDR4-RAM",
Qiuxu Zhuobc1c99a2020-11-17 20:49:52 +0800163 [MEM_DDR5] = "Unbuffered-DDR5",
Yazen Ghannamf9571122021-12-08 17:43:53 +0000164 [MEM_RDDR5] = "Registered-DDR5",
165 [MEM_LRDDR5] = "Load-Reduced-DDR5-RAM",
Tony Luck001f8612018-03-12 11:24:27 -0700166 [MEM_NVDIMM] = "Non-volatile-RAM",
Qiuxu Zhuo3b203692020-11-05 15:48:51 +0800167 [MEM_WIO2] = "Wide-IO-2",
Naveen Krishna Chatradhie1ca90b2021-06-30 20:58:24 +0530168 [MEM_HBM2] = "High-bandwidth-memory-Gen2",
Muralidhara M K9a5f5802023-11-02 11:42:24 +0000169 [MEM_HBM3] = "High-bandwidth-memory-Gen3",
Borislav Petkov239642f2009-11-12 15:33:16 +0100170};
171EXPORT_SYMBOL_GPL(edac_mem_types);
172
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500173static void _edac_mc_free(struct mem_ctl_info *mci)
174{
Robert Richterbea1bfd2020-02-12 13:03:40 +0100175 put_device(&mci->dev);
176}
177
178static void mci_release(struct device *dev)
179{
180 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500181 struct csrow_info *csr;
Robert Richter718d5852019-06-24 15:09:13 +0000182 int i, chn, row;
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500183
184 if (mci->dimms) {
Robert Richter718d5852019-06-24 15:09:13 +0000185 for (i = 0; i < mci->tot_dimms; i++)
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500186 kfree(mci->dimms[i]);
187 kfree(mci->dimms);
188 }
Robert Richter718d5852019-06-24 15:09:13 +0000189
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500190 if (mci->csrows) {
Robert Richter718d5852019-06-24 15:09:13 +0000191 for (row = 0; row < mci->nr_csrows; row++) {
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500192 csr = mci->csrows[row];
Robert Richter718d5852019-06-24 15:09:13 +0000193 if (!csr)
194 continue;
195
196 if (csr->channels) {
197 for (chn = 0; chn < mci->num_cschannel; chn++)
198 kfree(csr->channels[chn]);
199 kfree(csr->channels);
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500200 }
Robert Richter718d5852019-06-24 15:09:13 +0000201 kfree(csr);
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500202 }
203 kfree(mci->csrows);
204 }
Borislav Petkov0bbb2652022-02-20 22:34:54 +0100205 kfree(mci->pvt_info);
206 kfree(mci->layers);
Shaun Ruffellfaa2ad02012-09-22 20:26:38 -0500207 kfree(mci);
208}
209
Robert Richteraad28c62020-01-23 09:02:49 +0000210static int edac_mc_alloc_csrows(struct mem_ctl_info *mci)
211{
212 unsigned int tot_channels = mci->num_cschannel;
213 unsigned int tot_csrows = mci->nr_csrows;
214 unsigned int row, chn;
215
216 /*
217 * Alocate and fill the csrow/channels structs
218 */
219 mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
220 if (!mci->csrows)
221 return -ENOMEM;
222
223 for (row = 0; row < tot_csrows; row++) {
224 struct csrow_info *csr;
225
226 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
227 if (!csr)
228 return -ENOMEM;
229
230 mci->csrows[row] = csr;
231 csr->csrow_idx = row;
232 csr->mci = mci;
233 csr->nr_channels = tot_channels;
234 csr->channels = kcalloc(tot_channels, sizeof(*csr->channels),
235 GFP_KERNEL);
236 if (!csr->channels)
237 return -ENOMEM;
238
239 for (chn = 0; chn < tot_channels; chn++) {
240 struct rank_info *chan;
241
242 chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
243 if (!chan)
244 return -ENOMEM;
245
246 csr->channels[chn] = chan;
247 chan->chan_idx = chn;
248 chan->csrow = csr;
249 }
250 }
251
252 return 0;
253}
254
255static int edac_mc_alloc_dimms(struct mem_ctl_info *mci)
256{
257 unsigned int pos[EDAC_MAX_LAYERS];
258 unsigned int row, chn, idx;
259 int layer;
260 void *p;
261
262 /*
263 * Allocate and fill the dimm structs
264 */
265 mci->dimms = kcalloc(mci->tot_dimms, sizeof(*mci->dimms), GFP_KERNEL);
266 if (!mci->dimms)
267 return -ENOMEM;
268
269 memset(&pos, 0, sizeof(pos));
270 row = 0;
271 chn = 0;
272 for (idx = 0; idx < mci->tot_dimms; idx++) {
273 struct dimm_info *dimm;
274 struct rank_info *chan;
275 int n, len;
276
277 chan = mci->csrows[row]->channels[chn];
278
279 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
280 if (!dimm)
281 return -ENOMEM;
282 mci->dimms[idx] = dimm;
283 dimm->mci = mci;
284 dimm->idx = idx;
285
286 /*
287 * Copy DIMM location and initialize it.
288 */
289 len = sizeof(dimm->label);
290 p = dimm->label;
Len Bakerfca61162021-09-03 17:05:39 +0200291 n = scnprintf(p, len, "mc#%u", mci->mc_idx);
Robert Richteraad28c62020-01-23 09:02:49 +0000292 p += n;
293 len -= n;
294 for (layer = 0; layer < mci->n_layers; layer++) {
Len Bakerfca61162021-09-03 17:05:39 +0200295 n = scnprintf(p, len, "%s#%u",
296 edac_layer_name[mci->layers[layer].type],
297 pos[layer]);
Robert Richteraad28c62020-01-23 09:02:49 +0000298 p += n;
299 len -= n;
300 dimm->location[layer] = pos[layer];
Robert Richteraad28c62020-01-23 09:02:49 +0000301 }
302
303 /* Link it to the csrows old API data */
304 chan->dimm = dimm;
305 dimm->csrow = row;
306 dimm->cschannel = chn;
307
308 /* Increment csrow location */
309 if (mci->layers[0].is_virt_csrow) {
310 chn++;
311 if (chn == mci->num_cschannel) {
312 chn = 0;
313 row++;
314 }
315 } else {
316 row++;
317 if (row == mci->nr_csrows) {
318 row = 0;
319 chn++;
320 }
321 }
322
323 /* Increment dimm location */
324 for (layer = mci->n_layers - 1; layer >= 0; layer--) {
325 pos[layer]++;
326 if (pos[layer] < mci->layers[layer].size)
327 break;
328 pos[layer] = 0;
329 }
330 }
331
332 return 0;
333}
334
Robert Richter1f27c792020-01-23 09:02:52 +0000335struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num,
336 unsigned int n_layers,
337 struct edac_mc_layer *layers,
338 unsigned int sz_pvt)
339{
340 struct mem_ctl_info *mci;
341 struct edac_mc_layer *layer;
Borislav Petkov0bbb2652022-02-20 22:34:54 +0100342 unsigned int idx, tot_dimms = 1;
Robert Richter4aa92c82020-02-17 12:30:23 +0100343 unsigned int tot_csrows = 1, tot_channels = 1;
Robert Richter1f27c792020-01-23 09:02:52 +0000344 bool per_rank = false;
345
346 if (WARN_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0))
347 return NULL;
348
349 /*
350 * Calculate the total amount of dimms and csrows/cschannels while
351 * in the old API emulation mode
352 */
353 for (idx = 0; idx < n_layers; idx++) {
354 tot_dimms *= layers[idx].size;
355
356 if (layers[idx].is_virt_csrow)
357 tot_csrows *= layers[idx].size;
358 else
359 tot_channels *= layers[idx].size;
360
361 if (layers[idx].type == EDAC_MC_LAYER_CHIP_SELECT)
362 per_rank = true;
363 }
364
Borislav Petkov0bbb2652022-02-20 22:34:54 +0100365 mci = kzalloc(sizeof(struct mem_ctl_info), GFP_KERNEL);
366 if (!mci)
Robert Richter1f27c792020-01-23 09:02:52 +0000367 return NULL;
368
Borislav Petkov13088b62022-04-12 23:10:29 +0200369 mci->layers = kcalloc(n_layers, sizeof(struct edac_mc_layer), GFP_KERNEL);
Borislav Petkov0bbb2652022-02-20 22:34:54 +0100370 if (!mci->layers)
371 goto error;
372
373 mci->pvt_info = kzalloc(sz_pvt, GFP_KERNEL);
374 if (!mci->pvt_info)
375 goto error;
376
Robert Richter1f27c792020-01-23 09:02:52 +0000377 mci->dev.release = mci_release;
378 device_initialize(&mci->dev);
379
Robert Richter1f27c792020-01-23 09:02:52 +0000380 /* setup index and various internal pointers */
381 mci->mc_idx = mc_num;
382 mci->tot_dimms = tot_dimms;
Robert Richter1f27c792020-01-23 09:02:52 +0000383 mci->n_layers = n_layers;
Robert Richter1f27c792020-01-23 09:02:52 +0000384 memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
385 mci->nr_csrows = tot_csrows;
386 mci->num_cschannel = tot_channels;
387 mci->csbased = per_rank;
388
389 if (edac_mc_alloc_csrows(mci))
390 goto error;
391
392 if (edac_mc_alloc_dimms(mci))
393 goto error;
394
395 mci->op_state = OP_ALLOC;
396
397 return mci;
398
399error:
400 _edac_mc_free(mci);
401
402 return NULL;
403}
404EXPORT_SYMBOL_GPL(edac_mc_alloc);
405
Alan Coxda9bb1d2006-01-18 17:44:13 -0800406void edac_mc_free(struct mem_ctl_info *mci)
407{
Joe Perches956b9ba12012-04-29 17:08:39 -0300408 edac_dbg(1, "\n");
Mauro Carvalho Chehabbbc560a2010-08-16 18:22:43 -0300409
Robert Richter216aa142020-02-12 18:25:18 +0100410 _edac_mc_free(mci);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800411}
Dave Peterson91105402006-03-26 01:38:55 -0800412EXPORT_SYMBOL_GPL(edac_mc_free);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800413
Yazen Ghannamd7fc9d72017-01-27 11:24:21 -0600414bool edac_has_mcs(void)
415{
416 bool ret;
417
418 mutex_lock(&mem_ctls_mutex);
419
420 ret = list_empty(&mc_devices);
421
422 mutex_unlock(&mem_ctls_mutex);
423
424 return !ret;
425}
426EXPORT_SYMBOL_GPL(edac_has_mcs);
427
Borislav Petkovc73e8832016-11-14 13:26:11 +0100428/* Caller must hold mem_ctls_mutex */
429static struct mem_ctl_info *__find_mci_by_dev(struct device *dev)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800430{
431 struct mem_ctl_info *mci;
432 struct list_head *item;
433
Joe Perches956b9ba12012-04-29 17:08:39 -0300434 edac_dbg(3, "\n");
Alan Coxda9bb1d2006-01-18 17:44:13 -0800435
436 list_for_each(item, &mc_devices) {
437 mci = list_entry(item, struct mem_ctl_info, link);
438
Mauro Carvalho Chehabfd687502012-03-16 07:44:18 -0300439 if (mci->pdev == dev)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800440 return mci;
441 }
442
443 return NULL;
444}
Borislav Petkovc73e8832016-11-14 13:26:11 +0100445
446/**
447 * find_mci_by_dev
448 *
449 * scan list of controllers looking for the one that manages
450 * the 'dev' device
451 * @dev: pointer to a struct device related with the MCI
452 */
453struct mem_ctl_info *find_mci_by_dev(struct device *dev)
454{
455 struct mem_ctl_info *ret;
456
457 mutex_lock(&mem_ctls_mutex);
458 ret = __find_mci_by_dev(dev);
459 mutex_unlock(&mem_ctls_mutex);
460
461 return ret;
462}
Mauro Carvalho Chehab939747bd2010-08-10 11:22:01 -0300463EXPORT_SYMBOL_GPL(find_mci_by_dev);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800464
Dave Jiang81d87cb2007-07-19 01:49:52 -0700465/*
Dave Jiang81d87cb2007-07-19 01:49:52 -0700466 * edac_mc_workq_function
467 * performs the operation scheduled by a workq request
468 */
Dave Jiang81d87cb2007-07-19 01:49:52 -0700469static void edac_mc_workq_function(struct work_struct *work_req)
470{
Jean Delvarefbeb4382009-04-13 14:40:21 -0700471 struct delayed_work *d_work = to_delayed_work(work_req);
Dave Jiang81d87cb2007-07-19 01:49:52 -0700472 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
Dave Jiang81d87cb2007-07-19 01:49:52 -0700473
474 mutex_lock(&mem_ctls_mutex);
475
Borislav Petkov06e912d2016-02-02 11:36:11 +0100476 if (mci->op_state != OP_RUNNING_POLL) {
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700477 mutex_unlock(&mem_ctls_mutex);
478 return;
479 }
480
Borislav Petkovd3116a02017-01-26 18:25:11 +0100481 if (edac_op_state == EDAC_OPSTATE_POLL)
Dave Jiang81d87cb2007-07-19 01:49:52 -0700482 mci->edac_check(mci);
483
Dave Jiang81d87cb2007-07-19 01:49:52 -0700484 mutex_unlock(&mem_ctls_mutex);
485
Borislav Petkov06e912d2016-02-02 11:36:11 +0100486 /* Queue ourselves again. */
Borislav Petkovc4cf3b42015-11-30 19:02:01 +0100487 edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
Dave Jiang81d87cb2007-07-19 01:49:52 -0700488}
489
490/*
Doug Thompsonbce19682007-07-26 10:41:14 -0700491 * edac_mc_reset_delay_period(unsigned long value)
492 *
493 * user space has updated our poll period value, need to
494 * reset our workq delays
Dave Jiang81d87cb2007-07-19 01:49:52 -0700495 */
Borislav Petkov9da21b12014-02-03 15:05:13 -0500496void edac_mc_reset_delay_period(unsigned long value)
Dave Jiang81d87cb2007-07-19 01:49:52 -0700497{
Doug Thompsonbce19682007-07-26 10:41:14 -0700498 struct mem_ctl_info *mci;
499 struct list_head *item;
Dave Jiang81d87cb2007-07-19 01:49:52 -0700500
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700501 mutex_lock(&mem_ctls_mutex);
502
Doug Thompsonbce19682007-07-26 10:41:14 -0700503 list_for_each(item, &mc_devices) {
504 mci = list_entry(item, struct mem_ctl_info, link);
505
Nicholas Krausefbedcaf2016-05-19 18:45:58 -0400506 if (mci->op_state == OP_RUNNING_POLL)
507 edac_mod_work(&mci->work, value);
Doug Thompsonbce19682007-07-26 10:41:14 -0700508 }
Dave Jiang81d87cb2007-07-19 01:49:52 -0700509 mutex_unlock(&mem_ctls_mutex);
510}
511
Doug Thompsonbce19682007-07-26 10:41:14 -0700512
513
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700514/* Return 0 on success, 1 on failure.
515 * Before calling this function, caller must
516 * assign a unique value to mci->mc_idx.
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700517 *
518 * locking model:
519 *
520 * called with the mem_ctls_mutex lock held
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700521 */
Douglas Thompson079708b2007-07-19 01:49:58 -0700522static int add_mc_to_global_list(struct mem_ctl_info *mci)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800523{
524 struct list_head *item, *insert_before;
525 struct mem_ctl_info *p;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800526
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700527 insert_before = &mc_devices;
528
Borislav Petkovc73e8832016-11-14 13:26:11 +0100529 p = __find_mci_by_dev(mci->pdev);
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700530 if (unlikely(p != NULL))
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700531 goto fail0;
532
533 list_for_each(item, &mc_devices) {
534 p = list_entry(item, struct mem_ctl_info, link);
535
536 if (p->mc_idx >= mci->mc_idx) {
537 if (unlikely(p->mc_idx == mci->mc_idx))
538 goto fail1;
539
540 insert_before = item;
541 break;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800542 }
Alan Coxda9bb1d2006-01-18 17:44:13 -0800543 }
544
545 list_add_tail_rcu(&mci->link, insert_before);
546 return 0;
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700547
Douglas Thompson052dfb42007-07-19 01:50:13 -0700548fail0:
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700549 edac_printk(KERN_WARNING, EDAC_MC,
Mauro Carvalho Chehabfd687502012-03-16 07:44:18 -0300550 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
Stephen Rothwell17aa7e02008-05-05 13:54:19 +1000551 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700552 return 1;
553
Douglas Thompson052dfb42007-07-19 01:50:13 -0700554fail1:
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700555 edac_printk(KERN_WARNING, EDAC_MC,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700556 "bug in low-level driver: attempt to assign\n"
557 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700558 return 1;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800559}
560
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300561static int del_mc_from_global_list(struct mem_ctl_info *mci)
Dave Petersona1d03fc2006-03-26 01:38:46 -0800562{
563 list_del_rcu(&mci->link);
Lai Jiangshane2e77092011-05-26 16:25:58 -0700564
565 /* these are for safe removal of devices from global list while
566 * NMI handlers may be traversing list
567 */
568 synchronize_rcu();
569 INIT_LIST_HEAD(&mci->link);
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300570
Borislav Petkov97bb6c12017-01-26 16:49:59 +0100571 return list_empty(&mc_devices);
Dave Petersona1d03fc2006-03-26 01:38:46 -0800572}
573
Douglas Thompson079708b2007-07-19 01:49:58 -0700574struct mem_ctl_info *edac_mc_find(int idx)
Douglas Thompson5da08312007-07-19 01:49:31 -0700575{
Robert Richter29a0c842019-05-14 10:49:09 +0000576 struct mem_ctl_info *mci;
Douglas Thompson5da08312007-07-19 01:49:31 -0700577 struct list_head *item;
Borislav Petkovc73e8832016-11-14 13:26:11 +0100578
579 mutex_lock(&mem_ctls_mutex);
Douglas Thompson5da08312007-07-19 01:49:31 -0700580
581 list_for_each(item, &mc_devices) {
582 mci = list_entry(item, struct mem_ctl_info, link);
Robert Richter29a0c842019-05-14 10:49:09 +0000583 if (mci->mc_idx == idx)
584 goto unlock;
Douglas Thompson5da08312007-07-19 01:49:31 -0700585 }
586
Robert Richter29a0c842019-05-14 10:49:09 +0000587 mci = NULL;
Borislav Petkovc73e8832016-11-14 13:26:11 +0100588unlock:
589 mutex_unlock(&mem_ctls_mutex);
590 return mci;
Douglas Thompson5da08312007-07-19 01:49:31 -0700591}
592EXPORT_SYMBOL(edac_mc_find);
593
Toshi Kani3877c7d2017-08-23 16:54:46 -0600594const char *edac_get_owner(void)
595{
596 return edac_mc_owner;
597}
598EXPORT_SYMBOL_GPL(edac_get_owner);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800599
600/* FIXME - should a warning be printed if no error detection? correction? */
Takashi Iwai4e8d2302015-02-04 11:48:52 +0100601int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
602 const struct attribute_group **groups)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800603{
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300604 int ret = -EINVAL;
Joe Perches956b9ba12012-04-29 17:08:39 -0300605 edac_dbg(0, "\n");
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700606
Alan Coxda9bb1d2006-01-18 17:44:13 -0800607#ifdef CONFIG_EDAC_DEBUG
608 if (edac_debug_level >= 3)
609 edac_mc_dump_mci(mci);
Dave Petersone7ecd892006-03-26 01:38:52 -0800610
Alan Coxda9bb1d2006-01-18 17:44:13 -0800611 if (edac_debug_level >= 4) {
Robert Richterc498afa2019-11-06 09:33:07 +0000612 struct dimm_info *dimm;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800613 int i;
614
615 for (i = 0; i < mci->nr_csrows; i++) {
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -0300616 struct csrow_info *csrow = mci->csrows[i];
617 u32 nr_pages = 0;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800618 int j;
Dave Petersone7ecd892006-03-26 01:38:52 -0800619
Mauro Carvalho Chehab6e84d352012-04-30 10:24:43 -0300620 for (j = 0; j < csrow->nr_channels; j++)
621 nr_pages += csrow->channels[j]->dimm->nr_pages;
622 if (!nr_pages)
623 continue;
624 edac_mc_dump_csrow(csrow);
625 for (j = 0; j < csrow->nr_channels; j++)
626 if (csrow->channels[j]->dimm->nr_pages)
627 edac_mc_dump_channel(csrow->channels[j]);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800628 }
Robert Richterc498afa2019-11-06 09:33:07 +0000629
630 mci_for_each_dimm(mci, dimm)
631 edac_mc_dump_dimm(dimm);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800632 }
633#endif
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -0700634 mutex_lock(&mem_ctls_mutex);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800635
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300636 if (edac_mc_owner && edac_mc_owner != mci->mod_name) {
637 ret = -EPERM;
638 goto fail0;
639 }
640
Alan Coxda9bb1d2006-01-18 17:44:13 -0800641 if (add_mc_to_global_list(mci))
Dave Peterson028a7b6d2006-03-26 01:38:47 -0800642 goto fail0;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800643
644 /* set load time so that error rate can be tracked */
645 mci->start_time = jiffies;
646
Borislav Petkov861e6ed2018-11-06 12:35:21 +0100647 mci->bus = edac_get_sysfs_subsys();
Borislav Petkov88d84ac2013-07-19 12:28:25 +0200648
Takashi Iwai4e8d2302015-02-04 11:48:52 +0100649 if (edac_create_sysfs_mci_device(mci, groups)) {
eric wollesen9794f332007-02-12 00:53:08 -0800650 edac_mc_printk(mci, KERN_WARNING,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700651 "failed to create sysfs device\n");
eric wollesen9794f332007-02-12 00:53:08 -0800652 goto fail1;
653 }
Alan Coxda9bb1d2006-01-18 17:44:13 -0800654
Borislav Petkov09667602016-02-02 10:59:53 +0100655 if (mci->edac_check) {
Dave Jiang81d87cb2007-07-19 01:49:52 -0700656 mci->op_state = OP_RUNNING_POLL;
657
Borislav Petkov626a7a42016-02-02 11:06:41 +0100658 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
659 edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
660
Dave Jiang81d87cb2007-07-19 01:49:52 -0700661 } else {
662 mci->op_state = OP_RUNNING_INTERRUPT;
663 }
664
Alan Coxda9bb1d2006-01-18 17:44:13 -0800665 /* Report action taken */
Robert Richter7270a602013-10-10 18:22:36 +0200666 edac_mc_printk(mci, KERN_INFO,
667 "Giving out device to module %s controller %s: DEV %s (%s)\n",
668 mci->mod_name, mci->ctl_name, mci->dev_name,
669 edac_op_state_to_string(mci->op_state));
Alan Coxda9bb1d2006-01-18 17:44:13 -0800670
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300671 edac_mc_owner = mci->mod_name;
672
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -0700673 mutex_unlock(&mem_ctls_mutex);
Dave Peterson028a7b6d2006-03-26 01:38:47 -0800674 return 0;
675
Douglas Thompson052dfb42007-07-19 01:50:13 -0700676fail1:
Dave Peterson028a7b6d2006-03-26 01:38:47 -0800677 del_mc_from_global_list(mci);
678
Douglas Thompson052dfb42007-07-19 01:50:13 -0700679fail0:
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -0700680 mutex_unlock(&mem_ctls_mutex);
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300681 return ret;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800682}
Takashi Iwai4e8d2302015-02-04 11:48:52 +0100683EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800684
Douglas Thompson079708b2007-07-19 01:49:58 -0700685struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800686{
Dave Peterson18dbc332006-03-26 01:38:50 -0800687 struct mem_ctl_info *mci;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800688
Joe Perches956b9ba12012-04-29 17:08:39 -0300689 edac_dbg(0, "\n");
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700690
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -0700691 mutex_lock(&mem_ctls_mutex);
Dave Peterson18dbc332006-03-26 01:38:50 -0800692
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700693 /* find the requested mci struct in the global list */
Borislav Petkovc73e8832016-11-14 13:26:11 +0100694 mci = __find_mci_by_dev(dev);
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700695 if (mci == NULL) {
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -0700696 mutex_unlock(&mem_ctls_mutex);
Dave Peterson18dbc332006-03-26 01:38:50 -0800697 return NULL;
698 }
699
Borislav Petkov09667602016-02-02 10:59:53 +0100700 /* mark MCI offline: */
701 mci->op_state = OP_OFFLINE;
702
Borislav Petkov97bb6c12017-01-26 16:49:59 +0100703 if (del_mc_from_global_list(mci))
Mauro Carvalho Chehab80cc7d82012-10-31 10:42:29 -0300704 edac_mc_owner = NULL;
Borislav Petkov09667602016-02-02 10:59:53 +0100705
Matthias Kaehlcke63b7df92007-07-19 01:49:38 -0700706 mutex_unlock(&mem_ctls_mutex);
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700707
Borislav Petkov09667602016-02-02 10:59:53 +0100708 if (mci->edac_check)
Borislav Petkov626a7a42016-02-02 11:06:41 +0100709 edac_stop_work(&mci->work);
Borislav Petkovbb31b3122010-12-02 17:48:35 +0100710
711 /* remove from sysfs */
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700712 edac_remove_sysfs_mci_device(mci);
713
Dave Peterson537fba22006-03-26 01:38:40 -0800714 edac_printk(KERN_INFO, EDAC_MC,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700715 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
Stephen Rothwell17aa7e02008-05-05 13:54:19 +1000716 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
Doug Thompsonbf52fa42007-07-19 01:50:30 -0700717
Dave Peterson18dbc332006-03-26 01:38:50 -0800718 return mci;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800719}
Dave Peterson91105402006-03-26 01:38:55 -0800720EXPORT_SYMBOL_GPL(edac_mc_del_mc);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800721
Adrian Bunk2da1c112007-07-19 01:49:32 -0700722static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
723 u32 size)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800724{
725 struct page *pg;
726 void *virt_addr;
727 unsigned long flags = 0;
728
Joe Perches956b9ba12012-04-29 17:08:39 -0300729 edac_dbg(3, "\n");
Alan Coxda9bb1d2006-01-18 17:44:13 -0800730
731 /* ECC error page was not in our memory. Ignore it. */
Douglas Thompson079708b2007-07-19 01:49:58 -0700732 if (!pfn_valid(page))
Alan Coxda9bb1d2006-01-18 17:44:13 -0800733 return;
734
735 /* Find the actual page structure then map it and fix */
736 pg = pfn_to_page(page);
737
738 if (PageHighMem(pg))
739 local_irq_save(flags);
740
Cong Wang4e5df7c2011-11-25 23:14:19 +0800741 virt_addr = kmap_atomic(pg);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800742
743 /* Perform architecture specific atomic scrub operation */
Borislav Petkovb01aec92015-05-21 19:59:31 +0200744 edac_atomic_scrub(virt_addr + offset, size);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800745
746 /* Unmap and complete */
Cong Wang4e5df7c2011-11-25 23:14:19 +0800747 kunmap_atomic(virt_addr);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800748
749 if (PageHighMem(pg))
750 local_irq_restore(flags);
751}
752
Alan Coxda9bb1d2006-01-18 17:44:13 -0800753/* FIXME - should return -1 */
Dave Petersone7ecd892006-03-26 01:38:52 -0800754int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800755{
Mauro Carvalho Chehabde3910eb2012-04-24 15:05:43 -0300756 struct csrow_info **csrows = mci->csrows;
Mauro Carvalho Chehaba895bf82012-01-28 09:09:38 -0300757 int row, i, j, n;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800758
Joe Perches956b9ba12012-04-29 17:08:39 -0300759 edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800760 row = -1;
761
762 for (i = 0; i < mci->nr_csrows; i++) {
Mauro Carvalho Chehabde3910eb2012-04-24 15:05:43 -0300763 struct csrow_info *csrow = csrows[i];
Mauro Carvalho Chehaba895bf82012-01-28 09:09:38 -0300764 n = 0;
765 for (j = 0; j < csrow->nr_channels; j++) {
Mauro Carvalho Chehabde3910eb2012-04-24 15:05:43 -0300766 struct dimm_info *dimm = csrow->channels[j]->dimm;
Mauro Carvalho Chehaba895bf82012-01-28 09:09:38 -0300767 n += dimm->nr_pages;
768 }
769 if (n == 0)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800770 continue;
771
Joe Perches956b9ba12012-04-29 17:08:39 -0300772 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
773 mci->mc_idx,
774 csrow->first_page, page, csrow->last_page,
775 csrow->page_mask);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800776
777 if ((page >= csrow->first_page) &&
778 (page <= csrow->last_page) &&
779 ((page & csrow->page_mask) ==
780 (csrow->first_page & csrow->page_mask))) {
781 row = i;
782 break;
783 }
784 }
785
786 if (row == -1)
Dave Peterson537fba22006-03-26 01:38:40 -0800787 edac_mc_printk(mci, KERN_ERR,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700788 "could not look up page error address %lx\n",
789 (unsigned long)page);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800790
791 return row;
792}
Dave Peterson91105402006-03-26 01:38:55 -0800793EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800794
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300795const char *edac_layer_name[] = {
796 [EDAC_MC_LAYER_BRANCH] = "branch",
797 [EDAC_MC_LAYER_CHANNEL] = "channel",
798 [EDAC_MC_LAYER_SLOT] = "slot",
799 [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
Mauro Carvalho Chehabc66b5a72013-02-15 07:21:08 -0300800 [EDAC_MC_LAYER_ALL_MEM] = "memory",
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300801};
802EXPORT_SYMBOL_GPL(edac_layer_name);
803
Robert Richter6ab76172020-01-23 09:03:04 +0000804static void edac_inc_ce_error(struct edac_raw_error_desc *e)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800805{
Robert Richter6ab76172020-01-23 09:03:04 +0000806 int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
807 struct mem_ctl_info *mci = error_desc_to_mci(e);
Robert Richter4aa92c82020-02-17 12:30:23 +0100808 struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800809
Robert Richter6ab76172020-01-23 09:03:04 +0000810 mci->ce_mc += e->error_count;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300811
Robert Richter4aa92c82020-02-17 12:30:23 +0100812 if (dimm)
813 dimm->ce_count += e->error_count;
814 else
Robert Richter6ab76172020-01-23 09:03:04 +0000815 mci->ce_noinfo_count += e->error_count;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300816}
817
Robert Richter6ab76172020-01-23 09:03:04 +0000818static void edac_inc_ue_error(struct edac_raw_error_desc *e)
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300819{
Robert Richter6ab76172020-01-23 09:03:04 +0000820 int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
821 struct mem_ctl_info *mci = error_desc_to_mci(e);
Robert Richter4aa92c82020-02-17 12:30:23 +0100822 struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]);
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300823
Robert Richter6ab76172020-01-23 09:03:04 +0000824 mci->ue_mc += e->error_count;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300825
Robert Richter4aa92c82020-02-17 12:30:23 +0100826 if (dimm)
827 dimm->ue_count += e->error_count;
828 else
Robert Richter6ab76172020-01-23 09:03:04 +0000829 mci->ue_noinfo_count += e->error_count;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300830}
831
Robert Richter1853ee72020-01-23 09:03:06 +0000832static void edac_ce_error(struct edac_raw_error_desc *e)
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300833{
Robert Richter6ab76172020-01-23 09:03:04 +0000834 struct mem_ctl_info *mci = error_desc_to_mci(e);
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300835 unsigned long remapped_page;
836
837 if (edac_mc_get_log_ce()) {
Robert Richter1853ee72020-01-23 09:03:06 +0000838 edac_mc_printk(mci, KERN_WARNING,
839 "%d CE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx%s%s)\n",
840 e->error_count, e->msg,
841 *e->msg ? " " : "",
842 e->label, e->location, e->page_frame_number, e->offset_in_page,
843 e->grain, e->syndrome,
844 *e->other_detail ? " - " : "",
845 e->other_detail);
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300846 }
Robert Richter6ab76172020-01-23 09:03:04 +0000847
848 edac_inc_ce_error(e);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800849
Loc Hoaa2064d2014-05-08 17:03:16 -0600850 if (mci->scrub_mode == SCRUB_SW_SRC) {
Alan Coxda9bb1d2006-01-18 17:44:13 -0800851 /*
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300852 * Some memory controllers (called MCs below) can remap
853 * memory so that it is still available at a different
854 * address when PCI devices map into memory.
855 * MC's that can't do this, lose the memory where PCI
856 * devices are mapped. This mapping is MC-dependent
857 * and so we call back into the MC driver for it to
858 * map the MC page to a physical (CPU) page which can
859 * then be mapped to a virtual page - which can then
860 * be scrubbed.
861 */
Alan Coxda9bb1d2006-01-18 17:44:13 -0800862 remapped_page = mci->ctl_page_to_phys ?
Robert Richter6ab76172020-01-23 09:03:04 +0000863 mci->ctl_page_to_phys(mci, e->page_frame_number) :
864 e->page_frame_number;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800865
Robert Richter6ab76172020-01-23 09:03:04 +0000866 edac_mc_scrub_block(remapped_page, e->offset_in_page, e->grain);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800867 }
868}
869
Robert Richter1853ee72020-01-23 09:03:06 +0000870static void edac_ue_error(struct edac_raw_error_desc *e)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800871{
Robert Richter6ab76172020-01-23 09:03:04 +0000872 struct mem_ctl_info *mci = error_desc_to_mci(e);
Borislav Petkovf430d5702012-09-10 18:36:09 +0200873
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300874 if (edac_mc_get_log_ue()) {
Robert Richter1853ee72020-01-23 09:03:06 +0000875 edac_mc_printk(mci, KERN_WARNING,
876 "%d UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n",
877 e->error_count, e->msg,
878 *e->msg ? " " : "",
879 e->label, e->location, e->page_frame_number, e->offset_in_page,
880 e->grain,
881 *e->other_detail ? " - " : "",
882 e->other_detail);
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300883 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800884
Zhenzhong Duane9ff6632020-06-10 14:58:46 +0800885 edac_inc_ue_error(e);
886
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300887 if (edac_mc_get_panic_on_ue()) {
Robert Richter1853ee72020-01-23 09:03:06 +0000888 panic("UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n",
889 e->msg,
890 *e->msg ? " " : "",
891 e->label, e->location, e->page_frame_number, e->offset_in_page,
892 e->grain,
893 *e->other_detail ? " - " : "",
894 e->other_detail);
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300895 }
Alan Coxda9bb1d2006-01-18 17:44:13 -0800896}
897
Robert Richter6334dc42020-02-14 15:17:56 +0100898static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan)
899{
900 struct mem_ctl_info *mci = error_desc_to_mci(e);
901 enum hw_event_mc_err_type type = e->type;
902 u16 count = e->error_count;
903
904 if (row < 0)
905 return;
906
907 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
908
909 if (type == HW_EVENT_ERR_CORRECTED) {
910 mci->csrows[row]->ce_count += count;
911 if (chan >= 0)
912 mci->csrows[row]->channels[chan]->ce_count += count;
913 } else {
914 mci->csrows[row]->ue_count += count;
915 }
916}
917
Robert Richter91b327f2020-01-23 09:02:56 +0000918void edac_raw_mc_handle_error(struct edac_raw_error_desc *e)
Mauro Carvalho Chehabe7e24832012-10-31 13:46:11 -0300919{
Robert Richter91b327f2020-01-23 09:02:56 +0000920 struct mem_ctl_info *mci = error_desc_to_mci(e);
Robert Richter787d8992019-11-06 09:33:27 +0000921 u8 grain_bits;
922
923 /* Sanity-check driver-supplied grain value. */
924 if (WARN_ON_ONCE(!e->grain))
925 e->grain = 1;
926
927 grain_bits = fls_long(e->grain - 1);
928
929 /* Report the error via the trace interface */
930 if (IS_ENABLED(CONFIG_RAS))
Robert Richter672ef0e2020-01-23 09:02:54 +0000931 trace_mc_event(e->type, e->msg, e->label, e->error_count,
Robert Richter787d8992019-11-06 09:33:27 +0000932 mci->mc_idx, e->top_layer, e->mid_layer,
933 e->low_layer,
934 (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
935 grain_bits, e->syndrome, e->other_detail);
Mauro Carvalho Chehabe7e24832012-10-31 13:46:11 -0300936
Robert Richter1853ee72020-01-23 09:03:06 +0000937 if (e->type == HW_EVENT_ERR_CORRECTED)
938 edac_ce_error(e);
939 else
940 edac_ue_error(e);
Mauro Carvalho Chehabe7e24832012-10-31 13:46:11 -0300941}
942EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error);
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -0300943
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300944void edac_mc_handle_error(const enum hw_event_mc_err_type type,
945 struct mem_ctl_info *mci,
Mauro Carvalho Chehab9eb07a72012-06-04 13:27:43 -0300946 const u16 error_count,
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300947 const unsigned long page_frame_number,
948 const unsigned long offset_in_page,
949 const unsigned long syndrome,
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -0300950 const int top_layer,
951 const int mid_layer,
952 const int low_layer,
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300953 const char *msg,
Mauro Carvalho Chehab03f7eae2012-06-04 11:29:25 -0300954 const char *other_detail)
Alan Coxda9bb1d2006-01-18 17:44:13 -0800955{
Robert Richterc498afa2019-11-06 09:33:07 +0000956 struct dimm_info *dimm;
Len Bakerfca61162021-09-03 17:05:39 +0200957 char *p, *end;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300958 int row = -1, chan = -1;
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -0300959 int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -0300960 int i, n_labels = 0;
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -0300961 struct edac_raw_error_desc *e = &mci->error_desc;
Robert Richter67792cf2020-01-23 09:03:02 +0000962 bool any_memory = true;
Len Bakerfca61162021-09-03 17:05:39 +0200963 const char *prefix;
Alan Coxda9bb1d2006-01-18 17:44:13 -0800964
Joe Perches956b9ba12012-04-29 17:08:39 -0300965 edac_dbg(3, "MC%d\n", mci->mc_idx);
Alan Coxda9bb1d2006-01-18 17:44:13 -0800966
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -0300967 /* Fills the error report buffer */
968 memset(e, 0, sizeof (*e));
969 e->error_count = error_count;
Robert Richter672ef0e2020-01-23 09:02:54 +0000970 e->type = type;
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -0300971 e->top_layer = top_layer;
972 e->mid_layer = mid_layer;
973 e->low_layer = low_layer;
974 e->page_frame_number = page_frame_number;
975 e->offset_in_page = offset_in_page;
976 e->syndrome = syndrome;
Robert Richter1853ee72020-01-23 09:03:06 +0000977 /* need valid strings here for both: */
978 e->msg = msg ?: "";
979 e->other_detail = other_detail ?: "";
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -0300980
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300981 /*
Robert Richter67792cf2020-01-23 09:03:02 +0000982 * Check if the event report is consistent and if the memory location is
Robert Richter4aa92c82020-02-17 12:30:23 +0100983 * known. If it is, the DIMM(s) label info will be filled and the DIMM's
984 * error counters will be incremented.
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300985 */
986 for (i = 0; i < mci->n_layers; i++) {
987 if (pos[i] >= (int)mci->layers[i].size) {
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -0300988
989 edac_mc_printk(mci, KERN_ERR,
990 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
991 edac_layer_name[mci->layers[i].type],
992 pos[i], mci->layers[i].size);
993 /*
994 * Instead of just returning it, let's use what's
995 * known about the error. The increment routines and
996 * the DIMM filter logic will do the right thing by
997 * pointing the likely damaged DIMMs.
998 */
999 pos[i] = -1;
1000 }
1001 if (pos[i] >= 0)
Robert Richter67792cf2020-01-23 09:03:02 +00001002 any_memory = false;
Alan Coxda9bb1d2006-01-18 17:44:13 -08001003 }
1004
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001005 /*
1006 * Get the dimm label/grain that applies to the match criteria.
1007 * As the error algorithm may not be able to point to just one memory
1008 * stick, the logic here will get all possible labels that could
1009 * pottentially be affected by the error.
1010 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1011 * to have only the MC channel and the MC dimm (also called "branch")
1012 * but the channel is not known, as the memory is arranged in pairs,
1013 * where each memory belongs to a separate channel within the same
1014 * branch.
1015 */
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -03001016 p = e->label;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001017 *p = '\0';
Len Bakerfca61162021-09-03 17:05:39 +02001018 end = p + sizeof(e->label);
1019 prefix = "";
Borislav Petkov4da1b7b2012-09-10 17:57:44 +02001020
Robert Richterc498afa2019-11-06 09:33:07 +00001021 mci_for_each_dimm(mci, dimm) {
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -03001022 if (top_layer >= 0 && top_layer != dimm->location[0])
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001023 continue;
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -03001024 if (mid_layer >= 0 && mid_layer != dimm->location[1])
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001025 continue;
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -03001026 if (low_layer >= 0 && low_layer != dimm->location[2])
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001027 continue;
1028
1029 /* get the max grain, over the error match range */
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -03001030 if (dimm->grain > e->grain)
1031 e->grain = dimm->grain;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001032
1033 /*
1034 * If the error is memory-controller wide, there's no need to
Robert Richter67792cf2020-01-23 09:03:02 +00001035 * seek for the affected DIMMs because the whole channel/memory
1036 * controller/... may be affected. Also, don't show errors for
1037 * empty DIMM slots.
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001038 */
Robert Richter65bb4d12020-01-23 09:03:00 +00001039 if (!dimm->nr_pages)
Robert Richter0d8292e2019-11-06 09:33:14 +00001040 continue;
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001041
Robert Richter0d8292e2019-11-06 09:33:14 +00001042 n_labels++;
Robert Richter65bb4d12020-01-23 09:03:00 +00001043 if (n_labels > EDAC_MAX_LABELS) {
1044 p = e->label;
1045 *p = '\0';
1046 } else {
Len Bakerfca61162021-09-03 17:05:39 +02001047 p += scnprintf(p, end - p, "%s%s", prefix, dimm->label);
1048 prefix = OTHER_LABEL;
Robert Richter0d8292e2019-11-06 09:33:14 +00001049 }
Robert Richter0d8292e2019-11-06 09:33:14 +00001050
1051 /*
1052 * get csrow/channel of the DIMM, in order to allow
1053 * incrementing the compat API counters
1054 */
1055 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1056 mci->csbased ? "rank" : "dimm",
1057 dimm->csrow, dimm->cschannel);
1058 if (row == -1)
1059 row = dimm->csrow;
1060 else if (row >= 0 && row != dimm->csrow)
1061 row = -2;
1062
1063 if (chan == -1)
1064 chan = dimm->cschannel;
1065 else if (chan >= 0 && chan != dimm->cschannel)
1066 chan = -2;
Alan Coxda9bb1d2006-01-18 17:44:13 -08001067 }
1068
Robert Richter67792cf2020-01-23 09:03:02 +00001069 if (any_memory)
Len Bakerfca61162021-09-03 17:05:39 +02001070 strscpy(e->label, "any memory", sizeof(e->label));
Robert Richter6334dc42020-02-14 15:17:56 +01001071 else if (!*e->label)
Len Bakerfca61162021-09-03 17:05:39 +02001072 strscpy(e->label, "unknown memory", sizeof(e->label));
Robert Richter6334dc42020-02-14 15:17:56 +01001073
1074 edac_inc_csrow(e, row, chan);
Alan Coxda9bb1d2006-01-18 17:44:13 -08001075
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001076 /* Fill the RAM location data */
Mauro Carvalho Chehabc7ef7642013-02-21 13:36:45 -03001077 p = e->location;
Len Bakerfca61162021-09-03 17:05:39 +02001078 end = p + sizeof(e->location);
1079 prefix = "";
Borislav Petkov4da1b7b2012-09-10 17:57:44 +02001080
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001081 for (i = 0; i < mci->n_layers; i++) {
1082 if (pos[i] < 0)
1083 continue;
1084
Len Bakerfca61162021-09-03 17:05:39 +02001085 p += scnprintf(p, end - p, "%s%s:%d", prefix,
1086 edac_layer_name[mci->layers[i].type], pos[i]);
1087 prefix = " ";
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001088 }
Mauro Carvalho Chehab53f2d022012-02-23 08:10:34 -03001089
Robert Richter91b327f2020-01-23 09:02:56 +00001090 edac_raw_mc_handle_error(e);
Alan Coxda9bb1d2006-01-18 17:44:13 -08001091}
Mauro Carvalho Chehab4275be62012-04-18 15:20:50 -03001092EXPORT_SYMBOL_GPL(edac_mc_handle_error);