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Thomas Gleixner82c29812019-05-28 09:57:05 -07001// SPDX-License-Identifier: GPL-2.0-only
Richard Röjfors35570ac2009-12-15 16:46:18 -08002/*
Grant Likelyc103de22011-06-04 18:38:28 -06003 * Timberdale FPGA GPIO driver
Paul Gortmaker52ad9052016-05-09 19:59:57 -04004 * Author: Mocean Laboratories
Richard Röjfors35570ac2009-12-15 16:46:18 -08005 * Copyright (c) 2009 Intel Corporation
Richard Röjfors35570ac2009-12-15 16:46:18 -08006 */
7
8/* Supports:
9 * Timberdale FPGA GPIO
10 */
11
Paul Gortmaker52ad9052016-05-09 19:59:57 -040012#include <linux/init.h>
Linus Walleij50fe83a2018-08-06 17:42:46 +020013#include <linux/gpio/driver.h>
Richard Röjfors35570ac2009-12-15 16:46:18 -080014#include <linux/platform_device.h>
David Millere3cb91c2010-03-05 13:41:36 -080015#include <linux/irq.h>
Richard Röjfors35570ac2009-12-15 16:46:18 -080016#include <linux/io.h>
17#include <linux/timb_gpio.h>
18#include <linux/interrupt.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Richard Röjfors35570ac2009-12-15 16:46:18 -080020
21#define DRIVER_NAME "timb-gpio"
22
23#define TGPIOVAL 0x00
24#define TGPIODIR 0x04
25#define TGPIO_IER 0x08
26#define TGPIO_ISR 0x0c
27#define TGPIO_IPR 0x10
28#define TGPIO_ICR 0x14
29#define TGPIO_FLR 0x18
30#define TGPIO_LVR 0x1c
Richard Röjfors8c35c892010-03-05 13:44:35 -080031#define TGPIO_VER 0x20
32#define TGPIO_BFLR 0x24
Richard Röjfors35570ac2009-12-15 16:46:18 -080033
34struct timbgpio {
35 void __iomem *membase;
36 spinlock_t lock; /* mutual exclusion */
37 struct gpio_chip gpio;
38 int irq_base;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -070039 unsigned long last_ier;
Richard Röjfors35570ac2009-12-15 16:46:18 -080040};
41
42static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index,
43 unsigned offset, bool enabled)
44{
Linus Walleij92a41e22015-12-07 14:43:28 +010045 struct timbgpio *tgpio = gpiochip_get_data(gpio);
Chengfeng Ye9e8bc2d2023-09-26 10:29:14 +000046 unsigned long flags;
Richard Röjfors35570ac2009-12-15 16:46:18 -080047 u32 reg;
48
Chengfeng Ye9e8bc2d2023-09-26 10:29:14 +000049 spin_lock_irqsave(&tgpio->lock, flags);
Richard Röjfors35570ac2009-12-15 16:46:18 -080050 reg = ioread32(tgpio->membase + offset);
51
52 if (enabled)
53 reg |= (1 << index);
54 else
55 reg &= ~(1 << index);
56
57 iowrite32(reg, tgpio->membase + offset);
Chengfeng Ye9e8bc2d2023-09-26 10:29:14 +000058 spin_unlock_irqrestore(&tgpio->lock, flags);
Richard Röjfors35570ac2009-12-15 16:46:18 -080059
60 return 0;
61}
62
63static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
64{
65 return timbgpio_update_bit(gpio, nr, TGPIODIR, true);
66}
67
68static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr)
69{
Linus Walleij92a41e22015-12-07 14:43:28 +010070 struct timbgpio *tgpio = gpiochip_get_data(gpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -080071 u32 value;
72
73 value = ioread32(tgpio->membase + TGPIOVAL);
74 return (value & (1 << nr)) ? 1 : 0;
75}
76
77static int timbgpio_gpio_direction_output(struct gpio_chip *gpio,
78 unsigned nr, int val)
79{
80 return timbgpio_update_bit(gpio, nr, TGPIODIR, false);
81}
82
83static void timbgpio_gpio_set(struct gpio_chip *gpio,
84 unsigned nr, int val)
85{
86 timbgpio_update_bit(gpio, nr, TGPIOVAL, val != 0);
87}
88
89static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset)
90{
Linus Walleij92a41e22015-12-07 14:43:28 +010091 struct timbgpio *tgpio = gpiochip_get_data(gpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -080092
93 if (tgpio->irq_base <= 0)
94 return -EINVAL;
95
96 return tgpio->irq_base + offset;
97}
98
99/*
100 * GPIO IRQ
101 */
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800102static void timbgpio_irq_disable(struct irq_data *d)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800103{
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800104 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
105 int offset = d->irq - tgpio->irq_base;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700106 unsigned long flags;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800107
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700108 spin_lock_irqsave(&tgpio->lock, flags);
Dan Carpenterd79550a2012-10-11 09:56:35 +0300109 tgpio->last_ier &= ~(1UL << offset);
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700110 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
111 spin_unlock_irqrestore(&tgpio->lock, flags);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800112}
113
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800114static void timbgpio_irq_enable(struct irq_data *d)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800115{
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800116 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
117 int offset = d->irq - tgpio->irq_base;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700118 unsigned long flags;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800119
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700120 spin_lock_irqsave(&tgpio->lock, flags);
Dan Carpenterd79550a2012-10-11 09:56:35 +0300121 tgpio->last_ier |= 1UL << offset;
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700122 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
123 spin_unlock_irqrestore(&tgpio->lock, flags);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800124}
125
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800126static int timbgpio_irq_type(struct irq_data *d, unsigned trigger)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800127{
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800128 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
129 int offset = d->irq - tgpio->irq_base;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800130 unsigned long flags;
Richard Röjfors8c35c892010-03-05 13:44:35 -0800131 u32 lvr, flr, bflr = 0;
132 u32 ver;
Julia Lawall2a481802010-04-06 14:34:48 -0700133 int ret = 0;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800134
135 if (offset < 0 || offset > tgpio->gpio.ngpio)
136 return -EINVAL;
137
Richard Röjfors8c35c892010-03-05 13:44:35 -0800138 ver = ioread32(tgpio->membase + TGPIO_VER);
139
Richard Röjfors35570ac2009-12-15 16:46:18 -0800140 spin_lock_irqsave(&tgpio->lock, flags);
141
142 lvr = ioread32(tgpio->membase + TGPIO_LVR);
143 flr = ioread32(tgpio->membase + TGPIO_FLR);
Richard Röjfors8c35c892010-03-05 13:44:35 -0800144 if (ver > 2)
145 bflr = ioread32(tgpio->membase + TGPIO_BFLR);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800146
147 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
Richard Röjfors8c35c892010-03-05 13:44:35 -0800148 bflr &= ~(1 << offset);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800149 flr &= ~(1 << offset);
150 if (trigger & IRQ_TYPE_LEVEL_HIGH)
151 lvr |= 1 << offset;
152 else
153 lvr &= ~(1 << offset);
154 }
155
Richard Röjfors8c35c892010-03-05 13:44:35 -0800156 if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
Julia Lawall2a481802010-04-06 14:34:48 -0700157 if (ver < 3) {
158 ret = -EINVAL;
159 goto out;
Laurent Navet8a29a402013-03-20 13:16:03 +0100160 } else {
Richard Röjfors8c35c892010-03-05 13:44:35 -0800161 flr |= 1 << offset;
162 bflr |= 1 << offset;
163 }
164 } else {
165 bflr &= ~(1 << offset);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800166 flr |= 1 << offset;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800167 if (trigger & IRQ_TYPE_EDGE_FALLING)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800168 lvr &= ~(1 << offset);
Richard Röjfors8c35c892010-03-05 13:44:35 -0800169 else
170 lvr |= 1 << offset;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800171 }
172
173 iowrite32(lvr, tgpio->membase + TGPIO_LVR);
174 iowrite32(flr, tgpio->membase + TGPIO_FLR);
Richard Röjfors8c35c892010-03-05 13:44:35 -0800175 if (ver > 2)
176 iowrite32(bflr, tgpio->membase + TGPIO_BFLR);
177
Richard Röjfors35570ac2009-12-15 16:46:18 -0800178 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800179
Julia Lawall2a481802010-04-06 14:34:48 -0700180out:
181 spin_unlock_irqrestore(&tgpio->lock, flags);
182 return ret;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800183}
184
Thomas Gleixnerbd0b9ac2015-09-14 10:42:37 +0200185static void timbgpio_irq(struct irq_desc *desc)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800186{
Jiang Liu476f8b42015-06-04 12:13:15 +0800187 struct timbgpio *tgpio = irq_desc_get_handler_data(desc);
188 struct irq_data *data = irq_desc_get_irq_data(desc);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800189 unsigned long ipr;
190 int offset;
191
Jiang Liu476f8b42015-06-04 12:13:15 +0800192 data->chip->irq_ack(data);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800193 ipr = ioread32(tgpio->membase + TGPIO_IPR);
194 iowrite32(ipr, tgpio->membase + TGPIO_ICR);
195
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700196 /*
197 * Some versions of the hardware trash the IER register if more than
198 * one interrupt is received simultaneously.
199 */
200 iowrite32(0, tgpio->membase + TGPIO_IER);
201
Akinobu Mita984b3f52010-03-05 13:41:37 -0800202 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800203 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
Tomas Hallenberg76d800a2010-10-27 15:33:17 -0700204
205 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800206}
207
208static struct irq_chip timbgpio_irqchip = {
209 .name = "GPIO",
Lennert Buytenheka1f5f222011-01-12 17:00:19 -0800210 .irq_enable = timbgpio_irq_enable,
211 .irq_disable = timbgpio_irq_disable,
212 .irq_set_type = timbgpio_irq_type,
Richard Röjfors35570ac2009-12-15 16:46:18 -0800213};
214
Bill Pemberton38363092012-11-19 13:22:34 -0500215static int timbgpio_probe(struct platform_device *pdev)
Richard Röjfors35570ac2009-12-15 16:46:18 -0800216{
217 int err, i;
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200218 struct device *dev = &pdev->dev;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800219 struct gpio_chip *gc;
220 struct timbgpio *tgpio;
Jingoo Hane56aee12013-07-30 17:08:05 +0900221 struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800222 int irq = platform_get_irq(pdev, 0);
223
224 if (!pdata || pdata->nr_pins > 32) {
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200225 dev_err(dev, "Invalid platform data\n");
226 return -EINVAL;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800227 }
228
Markus Elfring2c3087e2018-02-10 21:13:28 +0100229 tgpio = devm_kzalloc(dev, sizeof(*tgpio), GFP_KERNEL);
Markus Elfring587ca5e2018-02-10 21:09:08 +0100230 if (!tgpio)
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200231 return -EINVAL;
Markus Elfring587ca5e2018-02-10 21:09:08 +0100232
Richard Röjfors35570ac2009-12-15 16:46:18 -0800233 tgpio->irq_base = pdata->irq_base;
234
235 spin_lock_init(&tgpio->lock);
236
Enrico Weigelt, metux IT consultaa6c9b92019-03-11 19:55:13 +0100237 tgpio->membase = devm_platform_ioremap_resource(pdev, 0);
Amitoj Kaur Chawlafa283db2016-02-28 18:00:56 +0530238 if (IS_ERR(tgpio->membase))
239 return PTR_ERR(tgpio->membase);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800240
241 gc = &tgpio->gpio;
242
243 gc->label = dev_name(&pdev->dev);
244 gc->owner = THIS_MODULE;
Linus Walleij58383c782015-11-04 09:56:26 +0100245 gc->parent = &pdev->dev;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800246 gc->direction_input = timbgpio_gpio_direction_input;
247 gc->get = timbgpio_gpio_get;
248 gc->direction_output = timbgpio_gpio_direction_output;
249 gc->set = timbgpio_gpio_set;
250 gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL;
251 gc->dbg_show = NULL;
252 gc->base = pdata->gpio_base;
253 gc->ngpio = pdata->nr_pins;
Linus Walleij9fb1f392013-12-04 14:42:46 +0100254 gc->can_sleep = false;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800255
Laxman Dewangan43fad832016-02-22 17:43:28 +0530256 err = devm_gpiochip_add_data(&pdev->dev, gc, tgpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800257 if (err)
abdoulaye berthe0ed33982014-05-13 03:21:42 +0200258 return err;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800259
Richard Röjfors35570ac2009-12-15 16:46:18 -0800260 /* make sure to disable interrupts */
261 iowrite32(0x0, tgpio->membase + TGPIO_IER);
262
263 if (irq < 0 || tgpio->irq_base <= 0)
264 return 0;
265
266 for (i = 0; i < pdata->nr_pins; i++) {
Linus Walleije5428a62013-11-26 14:28:32 +0100267 irq_set_chip_and_handler(tgpio->irq_base + i,
268 &timbgpio_irqchip, handle_simple_irq);
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000269 irq_set_chip_data(tgpio->irq_base + i, tgpio);
Rob Herring23393d42015-07-27 15:55:16 -0500270 irq_clear_status_flags(tgpio->irq_base + i, IRQ_NOREQUEST | IRQ_NOPROBE);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800271 }
272
Thomas Gleixner8a522112015-06-21 21:10:47 +0200273 irq_set_chained_handler_and_data(irq, timbgpio_irq, tgpio);
Richard Röjfors35570ac2009-12-15 16:46:18 -0800274
275 return 0;
Richard Röjfors35570ac2009-12-15 16:46:18 -0800276}
277
Richard Röjfors35570ac2009-12-15 16:46:18 -0800278static struct platform_driver timbgpio_platform_driver = {
279 .driver = {
Paul Gortmaker52ad9052016-05-09 19:59:57 -0400280 .name = DRIVER_NAME,
281 .suppress_bind_attrs = true,
Richard Röjfors35570ac2009-12-15 16:46:18 -0800282 },
283 .probe = timbgpio_probe,
Richard Röjfors35570ac2009-12-15 16:46:18 -0800284};
285
286/*--------------------------------------------------------------------------*/
287
Paul Gortmaker52ad9052016-05-09 19:59:57 -0400288builtin_platform_driver(timbgpio_platform_driver);