Dmitry Kravkov | 9f6c925 | 2010-07-27 12:34:34 +0000 | [diff] [blame] | 1 | /* bnx2x_cmn.h: Broadcom Everest network driver. |
| 2 | * |
| 3 | * Copyright (c) 2007-2010 Broadcom Corporation |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * Maintained by: Eilon Greenstein <eilong@broadcom.com> |
| 10 | * Written by: Eliezer Tamir |
| 11 | * Based on code from Michael Chan's bnx2 driver |
| 12 | * UDP CSUM errata workaround by Arik Gendelman |
| 13 | * Slowpath and fastpath rework by Vladislav Zolotarov |
| 14 | * Statistics and Link management by Yitchak Gertner |
| 15 | * |
| 16 | */ |
| 17 | #ifndef BNX2X_CMN_H |
| 18 | #define BNX2X_CMN_H |
| 19 | |
| 20 | #include <linux/types.h> |
| 21 | #include <linux/netdevice.h> |
| 22 | |
| 23 | |
| 24 | #include "bnx2x.h" |
| 25 | |
| 26 | |
| 27 | /*********************** Interfaces **************************** |
| 28 | * Functions that need to be implemented by each driver version |
| 29 | */ |
| 30 | |
| 31 | /** |
| 32 | * Initialize link parameters structure variables. |
| 33 | * |
| 34 | * @param bp |
| 35 | * @param load_mode |
| 36 | * |
| 37 | * @return u8 |
| 38 | */ |
| 39 | u8 bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); |
| 40 | |
| 41 | /** |
| 42 | * Configure hw according to link parameters structure. |
| 43 | * |
| 44 | * @param bp |
| 45 | */ |
| 46 | void bnx2x_link_set(struct bnx2x *bp); |
| 47 | |
| 48 | /** |
| 49 | * Query link status |
| 50 | * |
| 51 | * @param bp |
| 52 | * |
| 53 | * @return 0 - link is UP |
| 54 | */ |
| 55 | u8 bnx2x_link_test(struct bnx2x *bp); |
| 56 | |
| 57 | /** |
| 58 | * Handles link status change |
| 59 | * |
| 60 | * @param bp |
| 61 | */ |
| 62 | void bnx2x__link_status_update(struct bnx2x *bp); |
| 63 | |
| 64 | /** |
| 65 | * MSI-X slowpath interrupt handler |
| 66 | * |
| 67 | * @param irq |
| 68 | * @param dev_instance |
| 69 | * |
| 70 | * @return irqreturn_t |
| 71 | */ |
| 72 | irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); |
| 73 | |
| 74 | /** |
| 75 | * non MSI-X interrupt handler |
| 76 | * |
| 77 | * @param irq |
| 78 | * @param dev_instance |
| 79 | * |
| 80 | * @return irqreturn_t |
| 81 | */ |
| 82 | irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); |
| 83 | #ifdef BCM_CNIC |
| 84 | |
| 85 | /** |
| 86 | * Send command to cnic driver |
| 87 | * |
| 88 | * @param bp |
| 89 | * @param cmd |
| 90 | */ |
| 91 | int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); |
| 92 | |
| 93 | /** |
| 94 | * Provides cnic information for proper interrupt handling |
| 95 | * |
| 96 | * @param bp |
| 97 | */ |
| 98 | void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); |
| 99 | #endif |
| 100 | |
| 101 | /** |
| 102 | * Enable HW interrupts. |
| 103 | * |
| 104 | * @param bp |
| 105 | */ |
| 106 | void bnx2x_int_enable(struct bnx2x *bp); |
| 107 | |
| 108 | /** |
| 109 | * Disable interrupts. This function ensures that there are no |
| 110 | * ISRs or SP DPCs (sp_task) are running after it returns. |
| 111 | * |
| 112 | * @param bp |
| 113 | * @param disable_hw if true, disable HW interrupts. |
| 114 | */ |
| 115 | void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); |
| 116 | |
| 117 | /** |
| 118 | * Init HW blocks according to current initialization stage: |
| 119 | * COMMON, PORT or FUNCTION. |
| 120 | * |
| 121 | * @param bp |
| 122 | * @param load_code: COMMON, PORT or FUNCTION |
| 123 | * |
| 124 | * @return int |
| 125 | */ |
| 126 | int bnx2x_init_hw(struct bnx2x *bp, u32 load_code); |
| 127 | |
| 128 | /** |
| 129 | * Init driver internals: |
| 130 | * - rings |
| 131 | * - status blocks |
| 132 | * - etc. |
| 133 | * |
| 134 | * @param bp |
| 135 | * @param load_code COMMON, PORT or FUNCTION |
| 136 | */ |
| 137 | void bnx2x_nic_init(struct bnx2x *bp, u32 load_code); |
| 138 | |
| 139 | /** |
| 140 | * Allocate driver's memory. |
| 141 | * |
| 142 | * @param bp |
| 143 | * |
| 144 | * @return int |
| 145 | */ |
| 146 | int bnx2x_alloc_mem(struct bnx2x *bp); |
| 147 | |
| 148 | /** |
| 149 | * Release driver's memory. |
| 150 | * |
| 151 | * @param bp |
| 152 | */ |
| 153 | void bnx2x_free_mem(struct bnx2x *bp); |
| 154 | |
| 155 | /** |
| 156 | * Bring up a leading (the first) eth Client. |
| 157 | * |
| 158 | * @param bp |
| 159 | * |
| 160 | * @return int |
| 161 | */ |
| 162 | int bnx2x_setup_leading(struct bnx2x *bp); |
| 163 | |
| 164 | /** |
| 165 | * Setup non-leading eth Client. |
| 166 | * |
| 167 | * @param bp |
| 168 | * @param fp |
| 169 | * |
| 170 | * @return int |
| 171 | */ |
| 172 | int bnx2x_setup_multi(struct bnx2x *bp, int index); |
| 173 | |
| 174 | /** |
| 175 | * Set number of quueus according to mode and number of available |
| 176 | * msi-x vectors |
| 177 | * |
| 178 | * @param bp |
| 179 | * |
| 180 | */ |
| 181 | void bnx2x_set_num_queues_msix(struct bnx2x *bp); |
| 182 | |
| 183 | /** |
| 184 | * Cleanup chip internals: |
| 185 | * - Cleanup MAC configuration. |
| 186 | * - Close clients. |
| 187 | * - etc. |
| 188 | * |
| 189 | * @param bp |
| 190 | * @param unload_mode |
| 191 | */ |
| 192 | void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode); |
| 193 | |
| 194 | /** |
| 195 | * Acquire HW lock. |
| 196 | * |
| 197 | * @param bp |
| 198 | * @param resource Resource bit which was locked |
| 199 | * |
| 200 | * @return int |
| 201 | */ |
| 202 | int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); |
| 203 | |
| 204 | /** |
| 205 | * Release HW lock. |
| 206 | * |
| 207 | * @param bp driver handle |
| 208 | * @param resource Resource bit which was locked |
| 209 | * |
| 210 | * @return int |
| 211 | */ |
| 212 | int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); |
| 213 | |
| 214 | /** |
| 215 | * Configure eth MAC address in the HW according to the value in |
| 216 | * netdev->dev_addr for 57711 |
| 217 | * |
| 218 | * @param bp driver handle |
| 219 | * @param set |
| 220 | */ |
| 221 | void bnx2x_set_eth_mac_addr_e1h(struct bnx2x *bp, int set); |
| 222 | |
| 223 | /** |
| 224 | * Configure eth MAC address in the HW according to the value in |
| 225 | * netdev->dev_addr for 57710 |
| 226 | * |
| 227 | * @param bp driver handle |
| 228 | * @param set |
| 229 | */ |
| 230 | void bnx2x_set_eth_mac_addr_e1(struct bnx2x *bp, int set); |
| 231 | |
| 232 | #ifdef BCM_CNIC |
| 233 | /** |
| 234 | * Set iSCSI MAC(s) at the next enties in the CAM after the ETH |
| 235 | * MAC(s). The function will wait until the ramrod completion |
| 236 | * returns. |
| 237 | * |
| 238 | * @param bp driver handle |
| 239 | * @param set set or clear the CAM entry |
| 240 | * |
| 241 | * @return 0 if cussess, -ENODEV if ramrod doesn't return. |
| 242 | */ |
| 243 | int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set); |
| 244 | #endif |
| 245 | |
| 246 | /** |
| 247 | * Initialize status block in FW and HW |
| 248 | * |
| 249 | * @param bp driver handle |
| 250 | * @param sb host_status_block |
| 251 | * @param dma_addr_t mapping |
| 252 | * @param int sb_id |
| 253 | */ |
| 254 | void bnx2x_init_sb(struct bnx2x *bp, struct host_status_block *sb, |
| 255 | dma_addr_t mapping, int sb_id); |
| 256 | |
| 257 | /** |
| 258 | * Reconfigure FW/HW according to dev->flags rx mode |
| 259 | * |
| 260 | * @param dev net_device |
| 261 | * |
| 262 | */ |
| 263 | void bnx2x_set_rx_mode(struct net_device *dev); |
| 264 | |
| 265 | /** |
| 266 | * Configure MAC filtering rules in a FW. |
| 267 | * |
| 268 | * @param bp driver handle |
| 269 | */ |
| 270 | void bnx2x_set_storm_rx_mode(struct bnx2x *bp); |
| 271 | |
| 272 | /* Parity errors related */ |
| 273 | void bnx2x_inc_load_cnt(struct bnx2x *bp); |
| 274 | u32 bnx2x_dec_load_cnt(struct bnx2x *bp); |
| 275 | bool bnx2x_chk_parity_attn(struct bnx2x *bp); |
| 276 | bool bnx2x_reset_is_done(struct bnx2x *bp); |
| 277 | void bnx2x_disable_close_the_gate(struct bnx2x *bp); |
| 278 | |
| 279 | /** |
| 280 | * Perform statistics handling according to event |
| 281 | * |
| 282 | * @param bp driver handle |
| 283 | * @param even tbnx2x_stats_event |
| 284 | */ |
| 285 | void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event); |
| 286 | |
| 287 | /** |
| 288 | * Configures FW with client paramteres (like HW VLAN removal) |
| 289 | * for each active client. |
| 290 | * |
| 291 | * @param bp |
| 292 | */ |
| 293 | void bnx2x_set_client_config(struct bnx2x *bp); |
| 294 | |
| 295 | /** |
| 296 | * Handle sp events |
| 297 | * |
| 298 | * @param fp fastpath handle for the event |
| 299 | * @param rr_cqe eth_rx_cqe |
| 300 | */ |
| 301 | void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); |
| 302 | |
| 303 | |
| 304 | static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) |
| 305 | { |
| 306 | struct host_status_block *fpsb = fp->status_blk; |
| 307 | |
| 308 | barrier(); /* status block is written to by the chip */ |
| 309 | fp->fp_c_idx = fpsb->c_status_block.status_block_index; |
| 310 | fp->fp_u_idx = fpsb->u_status_block.status_block_index; |
| 311 | } |
| 312 | |
| 313 | static inline void bnx2x_update_rx_prod(struct bnx2x *bp, |
| 314 | struct bnx2x_fastpath *fp, |
| 315 | u16 bd_prod, u16 rx_comp_prod, |
| 316 | u16 rx_sge_prod) |
| 317 | { |
| 318 | struct ustorm_eth_rx_producers rx_prods = {0}; |
| 319 | int i; |
| 320 | |
| 321 | /* Update producers */ |
| 322 | rx_prods.bd_prod = bd_prod; |
| 323 | rx_prods.cqe_prod = rx_comp_prod; |
| 324 | rx_prods.sge_prod = rx_sge_prod; |
| 325 | |
| 326 | /* |
| 327 | * Make sure that the BD and SGE data is updated before updating the |
| 328 | * producers since FW might read the BD/SGE right after the producer |
| 329 | * is updated. |
| 330 | * This is only applicable for weak-ordered memory model archs such |
| 331 | * as IA-64. The following barrier is also mandatory since FW will |
| 332 | * assumes BDs must have buffers. |
| 333 | */ |
| 334 | wmb(); |
| 335 | |
| 336 | for (i = 0; i < sizeof(struct ustorm_eth_rx_producers)/4; i++) |
| 337 | REG_WR(bp, BAR_USTRORM_INTMEM + |
| 338 | USTORM_RX_PRODS_OFFSET(BP_PORT(bp), fp->cl_id) + i*4, |
| 339 | ((u32 *)&rx_prods)[i]); |
| 340 | |
| 341 | mmiowb(); /* keep prod updates ordered */ |
| 342 | |
| 343 | DP(NETIF_MSG_RX_STATUS, |
| 344 | "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", |
| 345 | fp->index, bd_prod, rx_comp_prod, rx_sge_prod); |
| 346 | } |
| 347 | |
| 348 | |
| 349 | |
| 350 | static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 sb_id, |
| 351 | u8 storm, u16 index, u8 op, u8 update) |
| 352 | { |
| 353 | u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + |
| 354 | COMMAND_REG_INT_ACK); |
| 355 | struct igu_ack_register igu_ack; |
| 356 | |
| 357 | igu_ack.status_block_index = index; |
| 358 | igu_ack.sb_id_and_flags = |
| 359 | ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | |
| 360 | (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | |
| 361 | (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | |
| 362 | (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); |
| 363 | |
| 364 | DP(BNX2X_MSG_OFF, "write 0x%08x to HC addr 0x%x\n", |
| 365 | (*(u32 *)&igu_ack), hc_addr); |
| 366 | REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); |
| 367 | |
| 368 | /* Make sure that ACK is written */ |
| 369 | mmiowb(); |
| 370 | barrier(); |
| 371 | } |
| 372 | static inline u16 bnx2x_ack_int(struct bnx2x *bp) |
| 373 | { |
| 374 | u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + |
| 375 | COMMAND_REG_SIMD_MASK); |
| 376 | u32 result = REG_RD(bp, hc_addr); |
| 377 | |
| 378 | DP(BNX2X_MSG_OFF, "read 0x%08x from HC addr 0x%x\n", |
| 379 | result, hc_addr); |
| 380 | |
| 381 | return result; |
| 382 | } |
| 383 | |
| 384 | /* |
| 385 | * fast path service functions |
| 386 | */ |
| 387 | |
| 388 | static inline int bnx2x_has_tx_work_unload(struct bnx2x_fastpath *fp) |
| 389 | { |
| 390 | /* Tell compiler that consumer and producer can change */ |
| 391 | barrier(); |
| 392 | return (fp->tx_pkt_prod != fp->tx_pkt_cons); |
| 393 | } |
| 394 | |
| 395 | static inline u16 bnx2x_tx_avail(struct bnx2x_fastpath *fp) |
| 396 | { |
| 397 | s16 used; |
| 398 | u16 prod; |
| 399 | u16 cons; |
| 400 | |
| 401 | prod = fp->tx_bd_prod; |
| 402 | cons = fp->tx_bd_cons; |
| 403 | |
| 404 | /* NUM_TX_RINGS = number of "next-page" entries |
| 405 | It will be used as a threshold */ |
| 406 | used = SUB_S16(prod, cons) + (s16)NUM_TX_RINGS; |
| 407 | |
| 408 | #ifdef BNX2X_STOP_ON_ERROR |
| 409 | WARN_ON(used < 0); |
| 410 | WARN_ON(used > fp->bp->tx_ring_size); |
| 411 | WARN_ON((fp->bp->tx_ring_size - used) > MAX_TX_AVAIL); |
| 412 | #endif |
| 413 | |
| 414 | return (s16)(fp->bp->tx_ring_size) - used; |
| 415 | } |
| 416 | |
| 417 | static inline int bnx2x_has_tx_work(struct bnx2x_fastpath *fp) |
| 418 | { |
| 419 | u16 hw_cons; |
| 420 | |
| 421 | /* Tell compiler that status block fields can change */ |
| 422 | barrier(); |
| 423 | hw_cons = le16_to_cpu(*fp->tx_cons_sb); |
| 424 | return hw_cons != fp->tx_pkt_cons; |
| 425 | } |
| 426 | |
| 427 | static inline void bnx2x_free_rx_sge(struct bnx2x *bp, |
| 428 | struct bnx2x_fastpath *fp, u16 index) |
| 429 | { |
| 430 | struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; |
| 431 | struct page *page = sw_buf->page; |
| 432 | struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; |
| 433 | |
| 434 | /* Skip "next page" elements */ |
| 435 | if (!page) |
| 436 | return; |
| 437 | |
| 438 | dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), |
| 439 | SGE_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE); |
| 440 | __free_pages(page, PAGES_PER_SGE_SHIFT); |
| 441 | |
| 442 | sw_buf->page = NULL; |
| 443 | sge->addr_hi = 0; |
| 444 | sge->addr_lo = 0; |
| 445 | } |
| 446 | |
| 447 | static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, |
| 448 | struct bnx2x_fastpath *fp, int last) |
| 449 | { |
| 450 | int i; |
| 451 | |
| 452 | for (i = 0; i < last; i++) |
| 453 | bnx2x_free_rx_sge(bp, fp, i); |
| 454 | } |
| 455 | |
| 456 | static inline int bnx2x_alloc_rx_sge(struct bnx2x *bp, |
| 457 | struct bnx2x_fastpath *fp, u16 index) |
| 458 | { |
| 459 | struct page *page = alloc_pages(GFP_ATOMIC, PAGES_PER_SGE_SHIFT); |
| 460 | struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; |
| 461 | struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; |
| 462 | dma_addr_t mapping; |
| 463 | |
| 464 | if (unlikely(page == NULL)) |
| 465 | return -ENOMEM; |
| 466 | |
| 467 | mapping = dma_map_page(&bp->pdev->dev, page, 0, |
| 468 | SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE); |
| 469 | if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { |
| 470 | __free_pages(page, PAGES_PER_SGE_SHIFT); |
| 471 | return -ENOMEM; |
| 472 | } |
| 473 | |
| 474 | sw_buf->page = page; |
| 475 | dma_unmap_addr_set(sw_buf, mapping, mapping); |
| 476 | |
| 477 | sge->addr_hi = cpu_to_le32(U64_HI(mapping)); |
| 478 | sge->addr_lo = cpu_to_le32(U64_LO(mapping)); |
| 479 | |
| 480 | return 0; |
| 481 | } |
| 482 | static inline int bnx2x_alloc_rx_skb(struct bnx2x *bp, |
| 483 | struct bnx2x_fastpath *fp, u16 index) |
| 484 | { |
| 485 | struct sk_buff *skb; |
| 486 | struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[index]; |
| 487 | struct eth_rx_bd *rx_bd = &fp->rx_desc_ring[index]; |
| 488 | dma_addr_t mapping; |
| 489 | |
| 490 | skb = netdev_alloc_skb(bp->dev, bp->rx_buf_size); |
| 491 | if (unlikely(skb == NULL)) |
| 492 | return -ENOMEM; |
| 493 | |
| 494 | mapping = dma_map_single(&bp->pdev->dev, skb->data, bp->rx_buf_size, |
| 495 | DMA_FROM_DEVICE); |
| 496 | if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { |
| 497 | dev_kfree_skb(skb); |
| 498 | return -ENOMEM; |
| 499 | } |
| 500 | |
| 501 | rx_buf->skb = skb; |
| 502 | dma_unmap_addr_set(rx_buf, mapping, mapping); |
| 503 | |
| 504 | rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); |
| 505 | rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); |
| 506 | |
| 507 | return 0; |
| 508 | } |
| 509 | |
| 510 | /* note that we are not allocating a new skb, |
| 511 | * we are just moving one from cons to prod |
| 512 | * we are not creating a new mapping, |
| 513 | * so there is no need to check for dma_mapping_error(). |
| 514 | */ |
| 515 | static inline void bnx2x_reuse_rx_skb(struct bnx2x_fastpath *fp, |
| 516 | struct sk_buff *skb, u16 cons, u16 prod) |
| 517 | { |
| 518 | struct bnx2x *bp = fp->bp; |
| 519 | struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; |
| 520 | struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; |
| 521 | struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; |
| 522 | struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; |
| 523 | |
| 524 | dma_sync_single_for_device(&bp->pdev->dev, |
| 525 | dma_unmap_addr(cons_rx_buf, mapping), |
| 526 | RX_COPY_THRESH, DMA_FROM_DEVICE); |
| 527 | |
| 528 | prod_rx_buf->skb = cons_rx_buf->skb; |
| 529 | dma_unmap_addr_set(prod_rx_buf, mapping, |
| 530 | dma_unmap_addr(cons_rx_buf, mapping)); |
| 531 | *prod_bd = *cons_bd; |
| 532 | } |
| 533 | |
| 534 | static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) |
| 535 | { |
| 536 | int i, j; |
| 537 | |
| 538 | for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { |
| 539 | int idx = RX_SGE_CNT * i - 1; |
| 540 | |
| 541 | for (j = 0; j < 2; j++) { |
| 542 | SGE_MASK_CLEAR_BIT(fp, idx); |
| 543 | idx--; |
| 544 | } |
| 545 | } |
| 546 | } |
| 547 | |
| 548 | static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) |
| 549 | { |
| 550 | /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ |
| 551 | memset(fp->sge_mask, 0xff, |
| 552 | (NUM_RX_SGE >> RX_SGE_MASK_ELEM_SHIFT)*sizeof(u64)); |
| 553 | |
| 554 | /* Clear the two last indices in the page to 1: |
| 555 | these are the indices that correspond to the "next" element, |
| 556 | hence will never be indicated and should be removed from |
| 557 | the calculations. */ |
| 558 | bnx2x_clear_sge_mask_next_elems(fp); |
| 559 | } |
| 560 | static inline void bnx2x_free_tpa_pool(struct bnx2x *bp, |
| 561 | struct bnx2x_fastpath *fp, int last) |
| 562 | { |
| 563 | int i; |
| 564 | |
| 565 | for (i = 0; i < last; i++) { |
| 566 | struct sw_rx_bd *rx_buf = &(fp->tpa_pool[i]); |
| 567 | struct sk_buff *skb = rx_buf->skb; |
| 568 | |
| 569 | if (skb == NULL) { |
| 570 | DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i); |
| 571 | continue; |
| 572 | } |
| 573 | |
| 574 | if (fp->tpa_state[i] == BNX2X_TPA_START) |
| 575 | dma_unmap_single(&bp->pdev->dev, |
| 576 | dma_unmap_addr(rx_buf, mapping), |
| 577 | bp->rx_buf_size, DMA_FROM_DEVICE); |
| 578 | |
| 579 | dev_kfree_skb(skb); |
| 580 | rx_buf->skb = NULL; |
| 581 | } |
| 582 | } |
| 583 | |
| 584 | |
| 585 | static inline void bnx2x_init_tx_ring(struct bnx2x *bp) |
| 586 | { |
| 587 | int i, j; |
| 588 | |
| 589 | for_each_queue(bp, j) { |
| 590 | struct bnx2x_fastpath *fp = &bp->fp[j]; |
| 591 | |
| 592 | for (i = 1; i <= NUM_TX_RINGS; i++) { |
| 593 | struct eth_tx_next_bd *tx_next_bd = |
| 594 | &fp->tx_desc_ring[TX_DESC_CNT * i - 1].next_bd; |
| 595 | |
| 596 | tx_next_bd->addr_hi = |
| 597 | cpu_to_le32(U64_HI(fp->tx_desc_mapping + |
| 598 | BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); |
| 599 | tx_next_bd->addr_lo = |
| 600 | cpu_to_le32(U64_LO(fp->tx_desc_mapping + |
| 601 | BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); |
| 602 | } |
| 603 | |
| 604 | fp->tx_db.data.header.header = DOORBELL_HDR_DB_TYPE; |
| 605 | fp->tx_db.data.zero_fill1 = 0; |
| 606 | fp->tx_db.data.prod = 0; |
| 607 | |
| 608 | fp->tx_pkt_prod = 0; |
| 609 | fp->tx_pkt_cons = 0; |
| 610 | fp->tx_bd_prod = 0; |
| 611 | fp->tx_bd_cons = 0; |
| 612 | fp->tx_cons_sb = BNX2X_TX_SB_INDEX; |
| 613 | fp->tx_pkt = 0; |
| 614 | } |
| 615 | } |
| 616 | static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) |
| 617 | { |
| 618 | u16 rx_cons_sb; |
| 619 | |
| 620 | /* Tell compiler that status block fields can change */ |
| 621 | barrier(); |
| 622 | rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb); |
| 623 | if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) |
| 624 | rx_cons_sb++; |
| 625 | return (fp->rx_comp_cons != rx_cons_sb); |
| 626 | } |
| 627 | |
| 628 | /* HW Lock for shared dual port PHYs */ |
| 629 | void bnx2x_acquire_phy_lock(struct bnx2x *bp); |
| 630 | void bnx2x_release_phy_lock(struct bnx2x *bp); |
| 631 | |
| 632 | void bnx2x_link_report(struct bnx2x *bp); |
| 633 | int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget); |
| 634 | int bnx2x_tx_int(struct bnx2x_fastpath *fp); |
| 635 | void bnx2x_init_rx_rings(struct bnx2x *bp); |
| 636 | netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); |
| 637 | |
| 638 | int bnx2x_change_mac_addr(struct net_device *dev, void *p); |
| 639 | void bnx2x_tx_timeout(struct net_device *dev); |
| 640 | void bnx2x_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp); |
| 641 | void bnx2x_netif_start(struct bnx2x *bp); |
| 642 | void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); |
| 643 | void bnx2x_free_irq(struct bnx2x *bp, bool disable_only); |
| 644 | int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state); |
| 645 | int bnx2x_resume(struct pci_dev *pdev); |
| 646 | void bnx2x_free_skbs(struct bnx2x *bp); |
| 647 | int bnx2x_change_mtu(struct net_device *dev, int new_mtu); |
| 648 | int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode); |
| 649 | int bnx2x_nic_load(struct bnx2x *bp, int load_mode); |
| 650 | int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); |
| 651 | |
| 652 | #endif /* BNX2X_CMN_H */ |