Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Coherency fabric: low level functions |
| 3 | * |
| 4 | * Copyright (C) 2012 Marvell |
| 5 | * |
| 6 | * Gregory CLEMENT <gregory.clement@free-electrons.com> |
| 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public |
| 9 | * License version 2. This program is licensed "as is" without any |
| 10 | * warranty of any kind, whether express or implied. |
| 11 | * |
| 12 | * This file implements the assembly function to add a CPU to the |
| 13 | * coherency fabric. This function is called by each of the secondary |
| 14 | * CPUs during their early boot in an SMP kernel, this why this |
| 15 | * function have to callable from assembly. It can also be called by a |
| 16 | * primary CPU from C code during its boot. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/linkage.h> |
| 20 | #define ARMADA_XP_CFB_CTL_REG_OFFSET 0x0 |
| 21 | #define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4 |
| 22 | |
Ben Dooks | bca028e | 2013-02-01 10:36:22 +0000 | [diff] [blame] | 23 | #include <asm/assembler.h> |
Gregory CLEMENT | ccd6a13 | 2014-04-14 17:10:05 +0200 | [diff] [blame] | 24 | #include <asm/cp15.h> |
Ben Dooks | bca028e | 2013-02-01 10:36:22 +0000 | [diff] [blame] | 25 | |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 26 | .text |
Thomas Petazzoni | 30cdef9 | 2014-11-13 10:38:56 +0100 | [diff] [blame] | 27 | /* |
| 28 | * Returns the coherency base address in r1 (r0 is untouched), or 0 if |
| 29 | * the coherency fabric is not enabled. |
| 30 | */ |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 31 | ENTRY(ll_get_coherency_base) |
Gregory CLEMENT | ccd6a13 | 2014-04-14 17:10:05 +0200 | [diff] [blame] | 32 | mrc p15, 0, r1, c1, c0, 0 |
| 33 | tst r1, #CR_M @ Check MMU bit enabled |
| 34 | bne 1f |
| 35 | |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 36 | /* |
| 37 | * MMU is disabled, use the physical address of the coherency |
Thomas Petazzoni | 30cdef9 | 2014-11-13 10:38:56 +0100 | [diff] [blame] | 38 | * base address. However, if the coherency fabric isn't mapped |
| 39 | * (i.e its virtual address is zero), it means coherency is |
| 40 | * not enabled, so we return 0. |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 41 | */ |
Thomas Petazzoni | 30cdef9 | 2014-11-13 10:38:56 +0100 | [diff] [blame] | 42 | ldr r1, =coherency_base |
| 43 | cmp r1, #0 |
| 44 | beq 2f |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 45 | adr r1, 3f |
| 46 | ldr r3, [r1] |
| 47 | ldr r1, [r1, r3] |
Gregory CLEMENT | ccd6a13 | 2014-04-14 17:10:05 +0200 | [diff] [blame] | 48 | b 2f |
| 49 | 1: |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 50 | /* |
| 51 | * MMU is enabled, use the virtual address of the coherency |
| 52 | * base address. |
| 53 | */ |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 54 | ldr r1, =coherency_base |
| 55 | ldr r1, [r1] |
Gregory CLEMENT | ccd6a13 | 2014-04-14 17:10:05 +0200 | [diff] [blame] | 56 | 2: |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 57 | ret lr |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 58 | ENDPROC(ll_get_coherency_base) |
| 59 | |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 60 | /* |
| 61 | * Returns the coherency CPU mask in r3 (r0 is untouched). This |
| 62 | * coherency CPU mask can be used with the coherency fabric |
| 63 | * configuration and control registers. Note that the mask is already |
| 64 | * endian-swapped as appropriate so that the calling functions do not |
| 65 | * have to care about endianness issues while accessing the coherency |
| 66 | * fabric registers |
| 67 | */ |
| 68 | ENTRY(ll_get_coherency_cpumask) |
Stefan Agner | 969ad77 | 2019-04-11 09:54:03 +0200 | [diff] [blame] | 69 | mrc p15, 0, r3, cr0, cr0, 5 |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 70 | and r3, r3, #15 |
Gregory CLEMENT | b41375f | 2014-04-14 17:10:06 +0200 | [diff] [blame] | 71 | mov r2, #(1 << 24) |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 72 | lsl r3, r2, r3 |
Thomas Petazzoni | 4fbe639 | 2014-05-22 14:47:59 +0200 | [diff] [blame] | 73 | ARM_BE8(rev r3, r3) |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 74 | ret lr |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 75 | ENDPROC(ll_get_coherency_cpumask) |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 76 | |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 77 | /* |
| 78 | * ll_add_cpu_to_smp_group(), ll_enable_coherency() and |
| 79 | * ll_disable_coherency() use the strex/ldrex instructions while the |
| 80 | * MMU can be disabled. The Armada XP SoC has an exclusive monitor |
| 81 | * that tracks transactions to Device and/or SO memory and thanks to |
| 82 | * that, exclusive transactions are functional even when the MMU is |
| 83 | * disabled. |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 84 | */ |
| 85 | |
| 86 | ENTRY(ll_add_cpu_to_smp_group) |
| 87 | /* |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 88 | * As r0 is not modified by ll_get_coherency_base() and |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 89 | * ll_get_coherency_cpumask(), we use it to temporarly save lr |
| 90 | * and avoid it being modified by the branch and link |
| 91 | * calls. This function is used very early in the secondary |
| 92 | * CPU boot, and no stack is available at this point. |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 93 | */ |
Thomas Petazzoni | 90ba76f | 2014-05-22 14:48:00 +0200 | [diff] [blame] | 94 | mov r0, lr |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 95 | bl ll_get_coherency_base |
Thomas Petazzoni | 30cdef9 | 2014-11-13 10:38:56 +0100 | [diff] [blame] | 96 | /* Bail out if the coherency is not enabled */ |
| 97 | cmp r1, #0 |
| 98 | reteq r0 |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 99 | bl ll_get_coherency_cpumask |
Thomas Petazzoni | 90ba76f | 2014-05-22 14:48:00 +0200 | [diff] [blame] | 100 | mov lr, r0 |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 101 | add r0, r1, #ARMADA_XP_CFB_CFG_REG_OFFSET |
Nadav Haklai | b60b61d | 2013-05-23 10:54:02 +0200 | [diff] [blame] | 102 | 1: |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 103 | ldrex r2, [r0] |
| 104 | orr r2, r2, r3 |
| 105 | strex r1, r2, [r0] |
| 106 | cmp r1, #0 |
| 107 | bne 1b |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 108 | ret lr |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 109 | ENDPROC(ll_add_cpu_to_smp_group) |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 110 | |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 111 | ENTRY(ll_enable_coherency) |
| 112 | /* |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 113 | * As r0 is not modified by ll_get_coherency_base() and |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 114 | * ll_get_coherency_cpumask(), we use it to temporarly save lr |
| 115 | * and avoid it being modified by the branch and link |
| 116 | * calls. This function is used very early in the secondary |
| 117 | * CPU boot, and no stack is available at this point. |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 118 | */ |
| 119 | mov r0, lr |
| 120 | bl ll_get_coherency_base |
Thomas Petazzoni | 30cdef9 | 2014-11-13 10:38:56 +0100 | [diff] [blame] | 121 | /* Bail out if the coherency is not enabled */ |
| 122 | cmp r1, #0 |
| 123 | reteq r0 |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 124 | bl ll_get_coherency_cpumask |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 125 | mov lr, r0 |
| 126 | add r0, r1, #ARMADA_XP_CFB_CTL_REG_OFFSET |
Nadav Haklai | b60b61d | 2013-05-23 10:54:02 +0200 | [diff] [blame] | 127 | 1: |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 128 | ldrex r2, [r0] |
| 129 | orr r2, r2, r3 |
| 130 | strex r1, r2, [r0] |
| 131 | cmp r1, #0 |
| 132 | bne 1b |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 133 | dsb |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 134 | mov r0, #0 |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 135 | ret lr |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 136 | ENDPROC(ll_enable_coherency) |
| 137 | |
Gregory CLEMENT | 1a6bfbc | 2014-04-14 17:10:09 +0200 | [diff] [blame] | 138 | ENTRY(ll_disable_coherency) |
| 139 | /* |
Thomas Petazzoni | 4dd1b7f | 2014-05-22 14:48:01 +0200 | [diff] [blame] | 140 | * As r0 is not modified by ll_get_coherency_base() and |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 141 | * ll_get_coherency_cpumask(), we use it to temporarly save lr |
| 142 | * and avoid it being modified by the branch and link |
| 143 | * calls. This function is used very early in the secondary |
| 144 | * CPU boot, and no stack is available at this point. |
Gregory CLEMENT | 1a6bfbc | 2014-04-14 17:10:09 +0200 | [diff] [blame] | 145 | */ |
Thomas Petazzoni | 90ba76f | 2014-05-22 14:48:00 +0200 | [diff] [blame] | 146 | mov r0, lr |
Gregory CLEMENT | 1a6bfbc | 2014-04-14 17:10:09 +0200 | [diff] [blame] | 147 | bl ll_get_coherency_base |
Thomas Petazzoni | 30cdef9 | 2014-11-13 10:38:56 +0100 | [diff] [blame] | 148 | /* Bail out if the coherency is not enabled */ |
| 149 | cmp r1, #0 |
| 150 | reteq r0 |
Thomas Petazzoni | 07ae144 | 2014-05-22 14:48:02 +0200 | [diff] [blame] | 151 | bl ll_get_coherency_cpumask |
Thomas Petazzoni | 90ba76f | 2014-05-22 14:48:00 +0200 | [diff] [blame] | 152 | mov lr, r0 |
Gregory CLEMENT | 1a6bfbc | 2014-04-14 17:10:09 +0200 | [diff] [blame] | 153 | add r0, r1, #ARMADA_XP_CFB_CTL_REG_OFFSET |
| 154 | 1: |
| 155 | ldrex r2, [r0] |
| 156 | bic r2, r2, r3 |
| 157 | strex r1, r2, [r0] |
| 158 | cmp r1, #0 |
| 159 | bne 1b |
| 160 | dsb |
Russell King | 6ebbf2c | 2014-06-30 16:29:12 +0100 | [diff] [blame] | 161 | ret lr |
Gregory CLEMENT | 1a6bfbc | 2014-04-14 17:10:09 +0200 | [diff] [blame] | 162 | ENDPROC(ll_disable_coherency) |
Gregory CLEMENT | ccd6a13 | 2014-04-14 17:10:05 +0200 | [diff] [blame] | 163 | |
| 164 | .align 2 |
| 165 | 3: |
| 166 | .long coherency_phys_base - . |