blob: 97f09acae302e3baec76b166d9be95feb7618cbe [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Takashi Iwaie3d280f2015-02-17 21:46:37 +01002/*
3 * HD-audio core stuff
4 */
5
6#ifndef __SOUND_HDAUDIO_H
7#define __SOUND_HDAUDIO_H
8
9#include <linux/device.h>
Takashi Iwai14752412015-04-14 12:15:47 +020010#include <linux/interrupt.h>
Takashi Iwai4d024fe2020-01-20 11:41:27 +010011#include <linux/io.h>
Cezary Rojewskic19bd022022-03-11 16:35:28 +010012#include <linux/io-64-nonatomic-lo-hi.h>
Amadeusz Sławiński3cab69d2022-08-18 16:15:14 +020013#include <linux/iopoll.h>
Takashi Iwaifeb20fae2018-06-27 09:03:51 +020014#include <linux/pm_runtime.h>
Takashi Iwai14752412015-04-14 12:15:47 +020015#include <linux/timecounter.h>
16#include <sound/core.h>
Takashi Iwaia6ea5fe2018-07-25 23:19:36 +020017#include <sound/pcm.h>
Takashi Iwai14752412015-04-14 12:15:47 +020018#include <sound/memalloc.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010019#include <sound/hda_verbs.h>
Mengdong Lin98d8fc62015-05-19 22:29:30 +080020#include <drm/i915_component.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010021
Takashi Iwai7639a062015-03-03 10:07:24 +010022/* codec node id */
23typedef u16 hda_nid_t;
24
Takashi Iwaid068ebc2015-03-02 23:22:59 +010025struct hdac_bus;
Takashi Iwai14752412015-04-14 12:15:47 +020026struct hdac_stream;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010027struct hdac_device;
28struct hdac_driver;
Takashi Iwai3256be62015-02-24 14:59:42 +010029struct hdac_widget_tree;
Subhransu S. Prustyda23ac12015-09-29 13:56:10 +053030struct hda_device_id;
Takashi Iwaie3d280f2015-02-17 21:46:37 +010031
32/*
33 * exported bus type
34 */
35extern struct bus_type snd_hda_bus_type;
36
37/*
Takashi Iwai71fc4c72015-03-03 17:33:10 +010038 * generic arrays
39 */
40struct snd_array {
41 unsigned int used;
42 unsigned int alloced;
43 unsigned int elem_size;
44 unsigned int alloc_align;
45 void *list;
46};
47
48/*
Takashi Iwaie3d280f2015-02-17 21:46:37 +010049 * HD-audio codec base device
50 */
51struct hdac_device {
52 struct device dev;
53 int type;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010054 struct hdac_bus *bus;
55 unsigned int addr; /* codec address */
56 struct list_head list; /* list point for bus codec_list */
Takashi Iwai7639a062015-03-03 10:07:24 +010057
58 hda_nid_t afg; /* AFG node id */
59 hda_nid_t mfg; /* MFG node id */
60
61 /* ids */
62 unsigned int vendor_id;
63 unsigned int subsystem_id;
64 unsigned int revision_id;
65 unsigned int afg_function_id;
66 unsigned int mfg_function_id;
67 unsigned int afg_unsol:1;
68 unsigned int mfg_unsol:1;
69
70 unsigned int power_caps; /* FG power caps */
71
72 const char *vendor_name; /* codec vendor name */
73 const char *chip_name; /* codec chip name */
74
Takashi Iwai058524482015-03-03 15:40:08 +010075 /* verb exec op override */
76 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
77 unsigned int flags, unsigned int *res);
78
Takashi Iwai7639a062015-03-03 10:07:24 +010079 /* widgets */
80 unsigned int num_nodes;
81 hda_nid_t start_nid, end_nid;
82
83 /* misc flags */
84 atomic_t in_pm; /* suspend/resume being performed */
Takashi Iwai3256be62015-02-24 14:59:42 +010085
86 /* sysfs */
Amadeusz Sławińskied180ab2019-05-13 11:18:01 +020087 struct mutex widget_lock;
Takashi Iwai3256be62015-02-24 14:59:42 +010088 struct hdac_widget_tree *widgets;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010089
90 /* regmap */
91 struct regmap *regmap;
Takashi Iwai1a462be2020-01-09 10:01:04 +010092 struct mutex regmap_lock;
Takashi Iwai5e56bce2015-02-26 12:29:03 +010093 struct snd_array vendor_verbs;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010094 bool lazy_cache:1; /* don't wake up for writes */
Takashi Iwaifaa75f82015-02-26 08:54:56 +010095 bool caps_overwriting:1; /* caps overwrite being in process */
Takashi Iwai40ba66a2015-03-13 15:56:25 +010096 bool cache_coef:1; /* cache COEF read/write too */
Cezary Rojewskie7255c02022-07-06 14:02:26 +020097 unsigned int registered:1; /* codec was registered */
Takashi Iwaie3d280f2015-02-17 21:46:37 +010098};
99
100/* device/driver type used for matching */
101enum {
102 HDA_DEV_CORE,
103 HDA_DEV_LEGACY,
Ramesh Babuc1cc18b2015-04-17 17:58:57 +0530104 HDA_DEV_ASOC,
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100105};
106
Pierre-Louis Bossartd82b51c2018-12-15 14:07:23 -0600107enum {
108 SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */
109 SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */
110 SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */
111};
112
Takashi Iwai7639a062015-03-03 10:07:24 +0100113/* direction */
114enum {
115 HDA_INPUT, HDA_OUTPUT
116};
117
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100118#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
119
Takashi Iwai7639a062015-03-03 10:07:24 +0100120int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
121 const char *name, unsigned int addr);
122void snd_hdac_device_exit(struct hdac_device *dev);
Takashi Iwai3256be62015-02-24 14:59:42 +0100123int snd_hdac_device_register(struct hdac_device *codec);
124void snd_hdac_device_unregister(struct hdac_device *codec);
Takashi Iwaided255b2015-10-01 17:59:43 +0200125int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
Greg Kroah-Hartman2a81ada2023-01-11 12:30:17 +0100126int snd_hdac_codec_modalias(const struct hdac_device *hdac, char *buf, size_t size);
Takashi Iwai7639a062015-03-03 10:07:24 +0100127
Takashi Iwai774a0752019-07-03 14:35:12 +0200128int snd_hdac_refresh_widgets(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100129
Takashi Iwai7639a062015-03-03 10:07:24 +0100130int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
131 unsigned int verb, unsigned int parm, unsigned int *res);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100132int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
133 unsigned int *res);
Takashi Iwai9ba17b42015-03-03 23:29:47 +0100134int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
135 int parm);
Takashi Iwaifaa75f82015-02-26 08:54:56 +0100136int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
137 unsigned int parm, unsigned int val);
Takashi Iwai7639a062015-03-03 10:07:24 +0100138int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
139 hda_nid_t *conn_list, int max_conns);
140int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
141 hda_nid_t *start_id);
Takashi Iwaib7d023e2015-04-16 08:19:06 +0200142unsigned int snd_hdac_calc_stream_format(unsigned int rate,
143 unsigned int channels,
Takashi Iwaia6ea5fe2018-07-25 23:19:36 +0200144 snd_pcm_format_t format,
Takashi Iwaib7d023e2015-04-16 08:19:06 +0200145 unsigned int maxbps,
146 unsigned short spdif_ctls);
147int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
148 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
149bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
150 unsigned int format);
Takashi Iwai7639a062015-03-03 10:07:24 +0100151
Subhransu S. Prusty1b5e6162015-10-08 09:48:05 +0100152int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
153 int flags, unsigned int verb, unsigned int parm);
154int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
155 int flags, unsigned int verb, unsigned int parm);
156bool snd_hdac_check_power_state(struct hdac_device *hdac,
157 hda_nid_t nid, unsigned int target_state);
Abhijeet Kumar09787492018-01-23 23:00:51 +0530158unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac,
159 hda_nid_t nid, unsigned int target_state);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100160/**
161 * snd_hdac_read_parm - read a codec parameter
162 * @codec: the codec object
163 * @nid: NID to read a parameter
164 * @parm: parameter to read
165 *
166 * Returns -1 for error. If you need to distinguish the error more
167 * strictly, use _snd_hdac_read_parm() directly.
168 */
169static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
170 int parm)
171{
172 unsigned int val;
173
174 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
175}
176
Takashi Iwai7639a062015-03-03 10:07:24 +0100177#ifdef CONFIG_PM
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200178int snd_hdac_power_up(struct hdac_device *codec);
179int snd_hdac_power_down(struct hdac_device *codec);
180int snd_hdac_power_up_pm(struct hdac_device *codec);
181int snd_hdac_power_down_pm(struct hdac_device *codec);
Takashi Iwaifc4f0002016-03-04 11:34:18 +0100182int snd_hdac_keep_power_up(struct hdac_device *codec);
Takashi Iwaifeb20fae2018-06-27 09:03:51 +0200183
184/* call this at entering into suspend/resume callbacks in codec driver */
185static inline void snd_hdac_enter_pm(struct hdac_device *codec)
186{
187 atomic_inc(&codec->in_pm);
188}
189
190/* call this at leaving from suspend/resume callbacks in codec driver */
191static inline void snd_hdac_leave_pm(struct hdac_device *codec)
192{
193 atomic_dec(&codec->in_pm);
194}
195
196static inline bool snd_hdac_is_in_pm(struct hdac_device *codec)
197{
198 return atomic_read(&codec->in_pm);
199}
200
201static inline bool snd_hdac_is_power_on(struct hdac_device *codec)
202{
203 return !pm_runtime_suspended(&codec->dev);
204}
Takashi Iwai7639a062015-03-03 10:07:24 +0100205#else
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200206static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
207static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
208static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
209static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
Takashi Iwaifc4f0002016-03-04 11:34:18 +0100210static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
Takashi Iwaifeb20fae2018-06-27 09:03:51 +0200211static inline void snd_hdac_enter_pm(struct hdac_device *codec) {}
212static inline void snd_hdac_leave_pm(struct hdac_device *codec) {}
Jason Yan79263c32020-05-06 14:17:16 +0800213static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; }
214static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; }
Takashi Iwai7639a062015-03-03 10:07:24 +0100215#endif
216
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100217/*
218 * HD-audio codec base driver
219 */
220struct hdac_driver {
221 struct device_driver driver;
222 int type;
Vinod Koulec71efc2015-06-03 12:24:31 +0530223 const struct hda_device_id *id_table;
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100224 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100225 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
Rakesh Ughrejae1df9312018-06-01 22:53:51 -0500226
227 /* fields used by ext bus APIs */
228 int (*probe)(struct hdac_device *dev);
229 int (*remove)(struct hdac_device *dev);
230 void (*shutdown)(struct hdac_device *dev);
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100231};
232
233#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
234
Vinod Koulec71efc2015-06-03 12:24:31 +0530235const struct hda_device_id *
236hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
237
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100238/*
Takashi Iwai14752412015-04-14 12:15:47 +0200239 * Bus verb operators
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100240 */
241struct hdac_bus_ops {
242 /* send a single command */
243 int (*command)(struct hdac_bus *bus, unsigned int cmd);
244 /* get a response from the last command */
245 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
246 unsigned int *res);
Kai Vehmanenf9e5fd12021-02-05 20:46:28 +0200247 /* notify of codec link power-up/down */
248 void (*link_power)(struct hdac_device *hdev, bool enable);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100249};
250
Takashi Iwai14752412015-04-14 12:15:47 +0200251/*
Rakesh Ughrejacb04ba32018-06-01 22:53:58 -0500252 * ops used for ASoC HDA codec drivers
253 */
254struct hdac_ext_bus_ops {
255 int (*hdev_attach)(struct hdac_device *hdev);
256 int (*hdev_detach)(struct hdac_device *hdev);
257};
258
Takashi Iwai14752412015-04-14 12:15:47 +0200259#define HDA_UNSOL_QUEUE_SIZE 64
260#define HDA_MAX_CODECS 8 /* limit by controller side */
261
Takashi Iwai14752412015-04-14 12:15:47 +0200262/*
263 * CORB/RIRB
264 *
265 * Each CORB entry is 4byte, RIRB is 8byte
266 */
267struct hdac_rb {
268 __le32 *buf; /* virtual address of CORB/RIRB buffer */
269 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
270 unsigned short rp, wp; /* RIRB read/write pointers */
271 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
272 u32 res[HDA_MAX_CODECS]; /* last read value */
273};
274
275/*
276 * HD-audio bus base driver
Vinod Koul6720b382016-08-04 15:46:00 +0530277 *
278 * @ppcap: pp capabilities pointer
279 * @spbcap: SPIB capabilities pointer
280 * @mlcap: MultiLink capabilities pointer
281 * @gtscap: gts capabilities pointer
282 * @drsmcap: dma resume capabilities pointer
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500283 * @num_streams: streams supported
284 * @idx: HDA link index
285 * @hlink_list: link list of HDA links
Takashi Iwaie61ab9f2019-04-10 16:00:54 +0200286 * @lock: lock for link and display power mgmt
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500287 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB
Takashi Iwai14752412015-04-14 12:15:47 +0200288 */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100289struct hdac_bus {
290 struct device *dev;
291 const struct hdac_bus_ops *ops;
Rakesh Ughrejacb04ba32018-06-01 22:53:58 -0500292 const struct hdac_ext_bus_ops *ext_ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200293
294 /* h/w resources */
295 unsigned long addr;
296 void __iomem *remap_addr;
297 int irq;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100298
Vinod Koul6720b382016-08-04 15:46:00 +0530299 void __iomem *ppcap;
300 void __iomem *spbcap;
301 void __iomem *mlcap;
302 void __iomem *gtscap;
303 void __iomem *drsmcap;
304
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100305 /* codec linked list */
306 struct list_head codec_list;
307 unsigned int num_codecs;
308
309 /* link caddr -> codec */
310 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
311
312 /* unsolicited event queue */
313 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
314 unsigned int unsol_rp, unsol_wp;
315 struct work_struct unsol_work;
316
Takashi Iwai14752412015-04-14 12:15:47 +0200317 /* bit flags of detected codecs */
318 unsigned long codec_mask;
319
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100320 /* bit flags of powered codecs */
321 unsigned long codec_powered;
322
Takashi Iwai14752412015-04-14 12:15:47 +0200323 /* CORB/RIRB */
324 struct hdac_rb corb;
325 struct hdac_rb rirb;
326 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
Takashi Iwai88452da2019-12-10 15:57:27 +0100327 wait_queue_head_t rirb_wq;
Takashi Iwai14752412015-04-14 12:15:47 +0200328
329 /* CORB/RIRB and position buffers */
330 struct snd_dma_buffer rb;
331 struct snd_dma_buffer posbuf;
Takashi Iwai619a1f12019-08-07 20:02:31 +0200332 int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
Takashi Iwai14752412015-04-14 12:15:47 +0200333
334 /* hdac_stream linked list */
335 struct list_head stream_list;
336
337 /* operation state */
338 bool chip_init:1; /* h/w initialized */
339
340 /* behavior flags */
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100341 bool aligned_mmio:1; /* aligned MMIO access */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100342 bool sync_write:1; /* sync after verb write */
Takashi Iwai14752412015-04-14 12:15:47 +0200343 bool use_posbuf:1; /* use position buffer */
344 bool snoop:1; /* enable snooping */
345 bool align_bdle_4k:1; /* BDLE align 4K boundary */
346 bool reverse_assign:1; /* assign devices in reverse order */
347 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
Bard Liao8af42132019-05-27 00:58:34 +0800348 bool polling_mode:1;
Takashi Iwai5f2cb362019-12-12 20:11:01 +0100349 bool needs_damn_long_delay:1;
Bard Liao8af42132019-05-27 00:58:34 +0800350
351 int poll_count;
Takashi Iwai14752412015-04-14 12:15:47 +0200352
353 int bdl_pos_adj; /* BDL position adjustment */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100354
Mohan Kumar41068202020-08-05 15:22:20 +0530355 /* delay time in us for dma stop */
356 unsigned int dma_stop_delay;
357
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100358 /* locks */
Takashi Iwai14752412015-04-14 12:15:47 +0200359 spinlock_t reg_lock;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100360 struct mutex cmd_mutex;
Takashi Iwaie61ab9f2019-04-10 16:00:54 +0200361 struct mutex lock;
Mengdong Lin98d8fc62015-05-19 22:29:30 +0800362
Takashi Iwaiae891ab2018-07-11 15:17:22 +0200363 /* DRM component interface */
364 struct drm_audio_component *audio_component;
Takashi Iwai029d92c2018-12-08 17:31:49 +0100365 long display_power_status;
Chris Wilsond31c85f2019-02-13 15:21:09 +0000366 unsigned long display_power_active;
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500367
368 /* parameters required for enhanced capabilities */
369 int num_streams;
370 int idx;
371
Takashi Iwaie61ab9f2019-04-10 16:00:54 +0200372 /* link management */
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500373 struct list_head hlink_list;
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500374 bool cmd_dma_state;
Sameer Pujar67ae4822020-05-04 13:46:15 +0530375
376 /* factor used to derive STRIPE control value */
377 unsigned int sdo_limit;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100378};
379
380int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
Takashi Iwai19abfef2019-08-07 20:32:08 +0200381 const struct hdac_bus_ops *ops);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100382void snd_hdac_bus_exit(struct hdac_bus *bus);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100383int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
384 unsigned int cmd, unsigned int *res);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100385
Kai Vehmanenf9e5fd12021-02-05 20:46:28 +0200386void snd_hdac_codec_link_up(struct hdac_device *codec);
387void snd_hdac_codec_link_down(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100388
Takashi Iwai14752412015-04-14 12:15:47 +0200389int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
390int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
391 unsigned int *res);
Vinod Koul6720b382016-08-04 15:46:00 +0530392int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
Takashi Iwai14752412015-04-14 12:15:47 +0200393
394bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
395void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
396void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
397void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
398void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
399void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
Yu Zhao75383f82018-09-11 15:15:16 -0600400int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset);
Kai Vehmanenf9e5fd12021-02-05 20:46:28 +0200401void snd_hdac_bus_link_power(struct hdac_device *hdev, bool enable);
Takashi Iwai14752412015-04-14 12:15:47 +0200402
403void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
Takashi Iwai473f4142016-02-23 15:54:47 +0100404int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
Takashi Iwai14752412015-04-14 12:15:47 +0200405 void (*ack)(struct hdac_bus *,
406 struct hdac_stream *));
407
Jeeja KP304dad32015-04-12 18:06:13 +0530408int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
409void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
410
Takashi Iwai19abfef2019-08-07 20:32:08 +0200411#ifdef CONFIG_SND_HDA_ALIGNED_MMIO
412unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask);
413void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
414 unsigned int mask);
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100415#define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio
416#else
417#define snd_hdac_aligned_mmio(bus) false
418#define snd_hdac_aligned_read(addr, mask) 0
419#define snd_hdac_aligned_write(val, addr, mask) do {} while (0)
420#endif
421
422static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr,
423 u8 val)
424{
425 if (snd_hdac_aligned_mmio(bus))
426 snd_hdac_aligned_write(val, addr, 0xff);
427 else
428 writeb(val, addr);
429}
430
431static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr,
432 u16 val)
433{
434 if (snd_hdac_aligned_mmio(bus))
435 snd_hdac_aligned_write(val, addr, 0xffff);
436 else
437 writew(val, addr);
438}
439
440static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr)
441{
442 return snd_hdac_aligned_mmio(bus) ?
443 snd_hdac_aligned_read(addr, 0xff) : readb(addr);
444}
445
446static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr)
447{
448 return snd_hdac_aligned_mmio(bus) ?
449 snd_hdac_aligned_read(addr, 0xffff) : readw(addr);
450}
451
452#define snd_hdac_reg_writel(bus, addr, val) writel(val, addr)
453#define snd_hdac_reg_readl(bus, addr) readl(addr)
Cezary Rojewskic19bd022022-03-11 16:35:28 +0100454#define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr)
455#define snd_hdac_reg_readq(bus, addr) readq(addr)
Takashi Iwai19abfef2019-08-07 20:32:08 +0200456
Takashi Iwai14752412015-04-14 12:15:47 +0200457/*
458 * macros for easy use
459 */
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200460#define _snd_hdac_chip_writeb(chip, reg, value) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100461 snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value)
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200462#define _snd_hdac_chip_readb(chip, reg) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100463 snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg))
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200464#define _snd_hdac_chip_writew(chip, reg, value) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100465 snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value)
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200466#define _snd_hdac_chip_readw(chip, reg) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100467 snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg))
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200468#define _snd_hdac_chip_writel(chip, reg, value) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100469 snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value)
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200470#define _snd_hdac_chip_readl(chip, reg) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100471 snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg))
Takashi Iwai14752412015-04-14 12:15:47 +0200472
473/* read/write a register, pass without AZX_REG_ prefix */
474#define snd_hdac_chip_writel(chip, reg, value) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200475 _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200476#define snd_hdac_chip_writew(chip, reg, value) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200477 _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200478#define snd_hdac_chip_writeb(chip, reg, value) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200479 _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200480#define snd_hdac_chip_readl(chip, reg) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200481 _snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200482#define snd_hdac_chip_readw(chip, reg) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200483 _snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200484#define snd_hdac_chip_readb(chip, reg) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200485 _snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200486
487/* update a register, pass without AZX_REG_ prefix */
488#define snd_hdac_chip_updatel(chip, reg, mask, val) \
489 snd_hdac_chip_writel(chip, reg, \
490 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
491#define snd_hdac_chip_updatew(chip, reg, mask, val) \
492 snd_hdac_chip_writew(chip, reg, \
493 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
494#define snd_hdac_chip_updateb(chip, reg, mask, val) \
495 snd_hdac_chip_writeb(chip, reg, \
496 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
497
Pierre-Louis Bossart62582342022-10-19 11:21:15 -0500498/* update register macro */
499#define snd_hdac_updatel(addr, reg, mask, val) \
500 writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg)
501
502#define snd_hdac_updatew(addr, reg, mask, val) \
503 writew(((readw(addr + reg) & ~(mask)) | (val)), addr + reg)
504
Takashi Iwai14752412015-04-14 12:15:47 +0200505/*
506 * HD-audio stream
507 */
508struct hdac_stream {
509 struct hdac_bus *bus;
510 struct snd_dma_buffer bdl; /* BDL buffer */
511 __le32 *posbuf; /* position buffer pointer */
512 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
513
514 unsigned int bufsize; /* size of the play buffer in bytes */
515 unsigned int period_bytes; /* size of the period in bytes */
516 unsigned int frags; /* number for period in the play buffer */
517 unsigned int fifo_size; /* FIFO size */
518
519 void __iomem *sd_addr; /* stream descriptor pointer */
520
Pierre-Louis Bossart62582342022-10-19 11:21:15 -0500521 void __iomem *spib_addr; /* software position in buffers stream pointer */
522 void __iomem *fifo_addr; /* software position Max fifos stream pointer */
523
524 void __iomem *dpibr_addr; /* DMA position in buffer resume pointer */
525 u32 dpib; /* DMA position in buffer */
526 u32 lpib; /* Linear position in buffer */
527
Takashi Iwai14752412015-04-14 12:15:47 +0200528 u32 sd_int_sta_mask; /* stream int status mask */
529
530 /* pcm support */
531 struct snd_pcm_substream *substream; /* assigned substream,
532 * set in PCM open
533 */
Cezary Rojewski4a9ce6e2020-02-18 15:39:18 +0100534 struct snd_compr_stream *cstream;
Takashi Iwai14752412015-04-14 12:15:47 +0200535 unsigned int format_val; /* format value to be set in the
536 * controller and the codec
537 */
538 unsigned char stream_tag; /* assigned stream */
539 unsigned char index; /* stream index */
540 int assigned_key; /* last device# key assigned to */
541
542 bool opened:1;
543 bool running:1;
Takashi Iwai6d23c8f2015-04-17 13:34:30 +0200544 bool prepared:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200545 bool no_period_wakeup:1;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200546 bool locked:1;
Takashi Iwaie38e4862019-12-02 08:49:47 +0100547 bool stripe:1; /* apply stripe control */
Takashi Iwai14752412015-04-14 12:15:47 +0200548
Cezary Rojewski4a9ce6e2020-02-18 15:39:18 +0100549 u64 curr_pos;
Takashi Iwai14752412015-04-14 12:15:47 +0200550 /* timestamp */
551 unsigned long start_wallclk; /* start + minimum wallclk */
552 unsigned long period_wallclk; /* wallclk for period */
553 struct timecounter tc;
554 struct cyclecounter cc;
555 int delay_negative_threshold;
556
557 struct list_head list;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200558#ifdef CONFIG_SND_HDA_DSP_LOADER
559 /* DSP access mutex */
560 struct mutex dsp_mutex;
561#endif
Takashi Iwai14752412015-04-14 12:15:47 +0200562};
563
564void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
565 int idx, int direction, int tag);
566struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
567 struct snd_pcm_substream *substream);
Pierre-Louis Bossartac3467a2022-09-19 14:10:40 +0200568void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev);
Takashi Iwai14752412015-04-14 12:15:47 +0200569void snd_hdac_stream_release(struct hdac_stream *azx_dev);
Jeeja KP4308c9b2015-08-23 11:52:51 +0530570struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
571 int dir, int stream_tag);
Takashi Iwai14752412015-04-14 12:15:47 +0200572
573int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
574void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
575int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
Jeeja KP86f65012015-04-17 17:58:58 +0530576int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
577 unsigned int format_val);
Zhang Yiqun4fe20d62023-02-09 20:17:23 +0800578void snd_hdac_stream_start(struct hdac_stream *azx_dev);
Takashi Iwai14752412015-04-14 12:15:47 +0200579void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
Pierre-Louis Bossart24ad3832022-09-19 14:10:38 +0200580void snd_hdac_stop_streams(struct hdac_bus *bus);
Pierre-Louis Bossart12054f02021-12-16 17:11:27 -0600581void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
Takashi Iwai14752412015-04-14 12:15:47 +0200582void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
583void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
584 unsigned int streams, unsigned int reg);
585void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
586 unsigned int streams);
587void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
588 unsigned int streams);
Sameer Pujar5dd3d272019-01-14 23:51:09 +0530589int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
590 struct snd_pcm_substream *substream);
591
Pierre-Louis Bossart62582342022-10-19 11:21:15 -0500592void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip,
593 bool enable, int index);
594int snd_hdac_stream_set_spib(struct hdac_bus *bus,
595 struct hdac_stream *azx_dev, u32 value);
596int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
597 struct hdac_stream *azx_dev);
598void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
599 bool enable, int index);
Cezary Rojewskiefffb012022-10-27 14:46:56 +0200600int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev);
Pierre-Louis Bossart62582342022-10-19 11:21:15 -0500601int snd_hdac_stream_set_dpibr(struct hdac_bus *bus,
602 struct hdac_stream *azx_dev, u32 value);
603int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value);
604
Takashi Iwai14752412015-04-14 12:15:47 +0200605/*
606 * macros for easy use
607 */
Takashi Iwai14752412015-04-14 12:15:47 +0200608/* read/write a register, pass without AZX_REG_ prefix */
609#define snd_hdac_stream_writel(dev, reg, value) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100610 snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200611#define snd_hdac_stream_writew(dev, reg, value) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100612 snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200613#define snd_hdac_stream_writeb(dev, reg, value) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100614 snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200615#define snd_hdac_stream_readl(dev, reg) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100616 snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200617#define snd_hdac_stream_readw(dev, reg) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100618 snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200619#define snd_hdac_stream_readb(dev, reg) \
Takashi Iwai4d024fe2020-01-20 11:41:27 +0100620 snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
Amadeusz Sławiński3cab69d2022-08-18 16:15:14 +0200621#define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \
Amadeusz Sławiński556a11a2022-10-07 10:48:56 +0200622 read_poll_timeout_atomic(snd_hdac_reg_readb, val, cond, delay_us, timeout_us, \
623 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
Amadeusz Sławiński3cab69d2022-08-18 16:15:14 +0200624#define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \
Amadeusz Sławiński556a11a2022-10-07 10:48:56 +0200625 read_poll_timeout_atomic(snd_hdac_reg_readl, val, cond, delay_us, timeout_us, \
626 false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200627
628/* update a register, pass without AZX_REG_ prefix */
629#define snd_hdac_stream_updatel(dev, reg, mask, val) \
630 snd_hdac_stream_writel(dev, reg, \
631 (snd_hdac_stream_readl(dev, reg) & \
632 ~(mask)) | (val))
633#define snd_hdac_stream_updatew(dev, reg, mask, val) \
634 snd_hdac_stream_writew(dev, reg, \
635 (snd_hdac_stream_readw(dev, reg) & \
636 ~(mask)) | (val))
637#define snd_hdac_stream_updateb(dev, reg, mask, val) \
638 snd_hdac_stream_writeb(dev, reg, \
639 (snd_hdac_stream_readb(dev, reg) & \
640 ~(mask)) | (val))
641
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200642#ifdef CONFIG_SND_HDA_DSP_LOADER
643/* DSP lock helpers */
644#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
645#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
646#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
647#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
648/* DSP loader helpers */
649int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
650 unsigned int byte_size, struct snd_dma_buffer *bufp);
651void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
652void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
653 struct snd_dma_buffer *dmab);
654#else /* CONFIG_SND_HDA_DSP_LOADER */
655#define snd_hdac_dsp_lock_init(dev) do {} while (0)
656#define snd_hdac_dsp_lock(dev) do {} while (0)
657#define snd_hdac_dsp_unlock(dev) do {} while (0)
658#define snd_hdac_stream_is_locked(dev) 0
659
660static inline int
661snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
662 unsigned int byte_size, struct snd_dma_buffer *bufp)
663{
664 return 0;
665}
666
667static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
668{
669}
670
671static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
672 struct snd_dma_buffer *dmab)
673{
674}
675#endif /* CONFIG_SND_HDA_DSP_LOADER */
676
677
Takashi Iwai71fc4c72015-03-03 17:33:10 +0100678/*
679 * generic array helpers
680 */
681void *snd_array_new(struct snd_array *array);
682void snd_array_free(struct snd_array *array);
683static inline void snd_array_init(struct snd_array *array, unsigned int size,
684 unsigned int align)
685{
686 array->elem_size = size;
687 array->alloc_align = align;
688}
689
690static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
691{
692 return array->list + idx * array->elem_size;
693}
694
695static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
696{
697 return (unsigned long)(ptr - array->list) / array->elem_size;
698}
699
Takashi Iwaia9c2dfc2018-04-23 17:24:56 +0200700/* a helper macro to iterate for each snd_array element */
701#define snd_array_for_each(array, idx, ptr) \
702 for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \
703 (ptr) = snd_array_elem(array, ++(idx)))
704
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100705#endif /* __SOUND_HDAUDIO_H */