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<a name="AArch64-Opcodes"></a>
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<h4 class="subsection">9.1.6 Opcodes</h4>
<p><a name="index-AArch64-opcodes-583"></a><a name="index-opcodes-for-AArch64-584"></a>GAS implements all the standard AArch64 opcodes. It also
implements several pseudo opcodes, including several synthetic load
instructions.
<a name="index-g_t_0040code_007bLDR-reg_002c_003d_003cexpr_003e_007d-pseudo-op_002c-AArch64-585"></a>
<dl><dt><code>LDR =</code><dd>
<pre class="smallexample"> ldr &lt;register&gt; , =&lt;expression&gt;
</pre>
<p>The constant expression will be placed into the nearest literal pool (if it not
already there) and a PC-relative LDR instruction will be generated.
</dl>
<p>For more information on the AArch64 instruction set and assembly language
notation, see &lsquo;<samp><span class="samp">ARMv8 Instruction Set Overview</span></samp>&rsquo; available at
<a href="http://infocenter.arm.com">http://infocenter.arm.com</a>.
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