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| <h4 class="subsection">9.3.1 Options</h4> |
| |
| <p><a name="index-ARC-options-617"></a><a name="index-options-for-ARC-618"></a> |
| The following options control the type of CPU for which code is |
| assembled, and generic constraints on the code generated: |
| |
| <dl> |
| <dt><code>-mcpu=</code><var>cpu</var><dd><a name="index-g_t_0040code_007b_002dmcpu_003d_0040var_007bcpu_007d_007d-command_002dline-option_002c-ARC-619"></a>Set architecture type and register usage for <var>cpu</var>. There are |
| also shortcut alias options available for backward compatibility and |
| convenience. Supported values for <var>cpu</var> are |
| |
| |
| <a name="index-g_t_0040code_007bmA6_007d-command_002dline-option_002c-ARC-620"></a> |
| <a name="index-g_t_0040code_007bmarc600_007d-command_002dline-option_002c-ARC-621"></a> |
| <dl><dt><code>arc600</code><dd>Assemble for ARC 600. Aliases: <code>-mA6</code>, <code>-mARC600</code>. |
| |
| <br><dt><code>arc600_norm</code><dd>Assemble for ARC 600 with norm instructions. |
| |
| <br><dt><code>arc600_mul64</code><dd>Assemble for ARC 600 with mul64 instructions. |
| |
| <br><dt><code>arc600_mul32x16</code><dd>Assemble for ARC 600 with mul32x16 instructions. |
| |
| <br><dt><code>arc601</code><dd><a name="index-g_t_0040code_007bmARC601_007d-command_002dline-option_002c-ARC-622"></a>Assemble for ARC 601. Alias: <code>-mARC601</code>. |
| |
| <br><dt><code>arc601_norm</code><dd>Assemble for ARC 601 with norm instructions. |
| |
| <br><dt><code>arc601_mul64</code><dd>Assemble for ARC 601 with mul64 instructions. |
| |
| <br><dt><code>arc601_mul32x16</code><dd>Assemble for ARC 601 with mul32x16 instructions. |
| |
| <br><dt><code>arc700</code><dd><a name="index-g_t_0040code_007bmA7_007d-command_002dline-option_002c-ARC-623"></a><a name="index-g_t_0040code_007bmARC700_007d-command_002dline-option_002c-ARC-624"></a>Assemble for ARC 700. Aliases: <code>-mA7</code>, <code>-mARC700</code>. |
| |
| <br><dt><code>arcem</code><dd><a name="index-g_t_0040code_007bmEM_007d-command_002dline-option_002c-ARC-625"></a>Assemble for ARC EM. Aliases: <code>-mEM</code> |
| |
| <br><dt><code>em</code><dd>Assemble for ARC EM, identical as arcem variant. |
| |
| <br><dt><code>em4</code><dd>Assemble for ARC EM with code-density instructions. |
| |
| <br><dt><code>em4_dmips</code><dd>Assemble for ARC EM with code-density instructions. |
| |
| <br><dt><code>em4_fpus</code><dd>Assemble for ARC EM with code-density instructions. |
| |
| <br><dt><code>em4_fpuda</code><dd>Assemble for ARC EM with code-density, and double-precision assist |
| instructions. |
| |
| <br><dt><code>quarkse_em</code><dd>Assemble for QuarkSE-EM cpu. |
| |
| <br><dt><code>archs</code><dd><a name="index-g_t_0040code_007bmHS_007d-command_002dline-option_002c-ARC-626"></a>Assemble for ARC HS. Aliases: <code>-mHS</code>, <code>-mav2hs</code>. |
| |
| <br><dt><code>hs</code><dd>Assemble for ARC HS. |
| |
| <br><dt><code>hs34</code><dd>Assemble for ARC HS34. |
| |
| <br><dt><code>hs38</code><dd>Assemble for ARC HS38. |
| |
| <br><dt><code>hs38_linux</code><dd>Assemble for ARC HS38 with floating point support on. |
| |
| <br><dt><code>nps400</code><dd><a name="index-g_t_0040code_007bmnps400_007d-command_002dline-option_002c-ARC-627"></a>Assemble for ARC 700 with NPS-400 extended instructions. |
| |
| </dl> |
| |
| <p>Note: the <code>.cpu</code> directive (see <a href="ARC-Directives.html#ARC-Directives">ARC Directives</a>) can |
| to be used to select a core variant from within assembly code. |
| |
| <p><a name="index-g_t_0040code_007b_002dEB_007d-command_002dline-option_002c-ARC-628"></a><br><dt><code>-EB</code><dd>This option specifies that the output generated by the assembler should |
| be marked as being encoded for a big-endian processor. |
| |
| <p><a name="index-g_t_0040code_007b_002dEL_007d-command_002dline-option_002c-ARC-629"></a><br><dt><code>-EL</code><dd>This option specifies that the output generated by the assembler should |
| be marked as being encoded for a little-endian processor - this is the |
| default. |
| |
| <p><a name="index-g_t_0040code_007b_002dmcode_002ddensity_007d-command_002dline-option_002c-ARC-630"></a><br><dt><code>-mcode-density</code><dd>This option turns on Code Density instructions. Only valid for ARC EM |
| processors. |
| |
| <p><a name="index-g_t_0040code_007b_002dmrelax_007d-command_002dline-option_002c-ARC-631"></a><br><dt><code>-mrelax</code><dd>Enable support for assembly-time relaxation. The assembler will |
| replace a longer version of an instruction with a shorter one, |
| whenever it is possible. |
| |
| <p><a name="index-g_t_0040code_007b_002dmnps400_007d-command_002dline-option_002c-ARC-632"></a><br><dt><code>-mnps400</code><dd>Enable support for NPS-400 extended instructions. |
| |
| <p><a name="index-g_t_0040code_007b_002dmspfp_007d-command_002dline-option_002c-ARC-633"></a><br><dt><code>-mspfp</code><dd>Enable support for single-precision floating point instructions. |
| |
| <p><a name="index-g_t_0040code_007b_002dmdpfp_007d-command_002dline-option_002c-ARC-634"></a><br><dt><code>-mdpfp</code><dd>Enable support for double-precision floating point instructions. |
| |
| <p><a name="index-g_t_0040code_007b_002dmfpuda_007d-command_002dline-option_002c-ARC-635"></a><br><dt><code>-mfpuda</code><dd>Enable support for double-precision assist floating point instructions. |
| Only valid for ARC EM processors. |
| |
| </dl> |
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