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| <a name="BPF-Opcodes"></a> |
| <p> |
| Previous: <a rel="previous" accesskey="p" href="BPF-Directives.html#BPF-Directives">BPF Directives</a>, |
| Up: <a rel="up" accesskey="u" href="BPF_002dDependent.html#BPF_002dDependent">BPF-Dependent</a> |
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| |
| <h4 class="subsection">9.7.4 Opcodes</h4> |
| |
| <p><a name="index-BPF-opcodes-869"></a><a name="index-opcodes-for-BPF-870"></a>In the instruction descriptions below the following field descriptors |
| are used: |
| |
| <dl> |
| <dt><code>%d</code><dd>Destination general-purpose register whose role is to be destination |
| of an operation. |
| <br><dt><code>%s</code><dd>Source general-purpose register whose role is to be the source of an |
| operation. |
| <br><dt><code>disp16</code><dd>16-bit signed PC-relative offset, measured in number of 64-bit words, |
| minus one. |
| <br><dt><code>disp32</code><dd>32-bit signed PC-relative offset, measured in number of 64-bit words, |
| minus one. |
| <br><dt><code>offset16</code><dd>Signed 16-bit immediate. |
| <br><dt><code>imm32</code><dd>Signed 32-bit immediate. |
| <br><dt><code>imm64</code><dd>Signed 64-bit immediate. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.1 Arithmetic instructions</h5> |
| |
| <p>The destination register in these instructions act like an |
| accumulator. |
| |
| <dl> |
| <dt><code>add %d, (%s|imm32)</code><dd>64-bit arithmetic addition. |
| <br><dt><code>sub %d, (%s|imm32)</code><dd>64-bit arithmetic subtraction. |
| <br><dt><code>mul %d, (%s|imm32)</code><dd>64-bit arithmetic multiplication. |
| <br><dt><code>div %d, (%s|imm32)</code><dd>64-bit arithmetic integer division. |
| <br><dt><code>mod %d, (%s|imm32)</code><dd>64-bit integer remainder. |
| <br><dt><code>and %d, (%s|imm32)</code><dd>64-bit bit-wise “and” operation. |
| <br><dt><code>or %d, (%s|imm32)</code><dd>64-bit bit-wise “or” operation. |
| <br><dt><code>xor %d, (%s|imm32)</code><dd>64-bit bit-wise exclusive-or operation. |
| <br><dt><code>lsh %d, (%s|imm32)</code><dd>64-bit left shift, by <code>%s</code> or <code>imm32</code> bits. |
| <br><dt><code>rsh %d, (%s|imm32)</code><dd>64-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits. |
| <br><dt><code>arsh %d, (%s|imm32)</code><dd>64-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits. |
| <br><dt><code>neg %d</code><dd>64-bit arithmetic negation. |
| <br><dt><code>mov %d, (%s|imm32)</code><dd>Move the 64-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code> |
| in <code>%d</code>. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.2 32-bit arithmetic instructions</h5> |
| |
| <p>The destination register in these instructions act as an accumulator. |
| |
| <dl> |
| <dt><code>add32 %d, (%s|imm32)</code><dd>32-bit arithmetic addition. |
| <br><dt><code>sub32 %d, (%s|imm32)</code><dd>32-bit arithmetic subtraction. |
| <br><dt><code>mul32 %d, (%s|imm32)</code><dd>32-bit arithmetic multiplication. |
| <br><dt><code>div32 %d, (%s|imm32)</code><dd>32-bit arithmetic integer division. |
| <br><dt><code>mod32 %d, (%s|imm32)</code><dd>32-bit integer remainder. |
| <br><dt><code>and32 %d, (%s|imm32)</code><dd>32-bit bit-wise “and” operation. |
| <br><dt><code>or32 %d, (%s|imm32)</code><dd>32-bit bit-wise “or” operation. |
| <br><dt><code>xor32 %d, (%s|imm32)</code><dd>32-bit bit-wise exclusive-or operation. |
| <br><dt><code>lsh32 %d, (%s|imm32)</code><dd>32-bit left shift, by <code>%s</code> or <code>imm32</code> bits. |
| <br><dt><code>rsh32 %d, (%s|imm32)</code><dd>32-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits. |
| <br><dt><code>arsh32 %d, (%s|imm32)</code><dd>32-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits. |
| <br><dt><code>neg32 %d</code><dd>32-bit arithmetic negation. |
| <br><dt><code>mov32 %d, (%s|imm32)</code><dd>Move the 32-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code> |
| in <code>%d</code>. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.3 Endianness conversion instructions</h5> |
| |
| <dl> |
| <dt><code>endle %d, (8|16|32)</code><dd>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to |
| little-endian. |
| <br><dt><code>endbe %d, (8|16|32)</code><dd>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to big-endian. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.4 64-bit load and pseudo maps</h5> |
| |
| <dl> |
| <dt><code>lddw %d, imm64</code><dd>Load the given signed 64-bit immediate, or pseudo map descriptor, to |
| the destination register <code>%d</code>. |
| <br><dt><code>lddw %d, %map_fd(N)</code><dd>Load the address of the given pseudo map fd <em>N</em> to the |
| destination register <code>%d</code>. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.5 Load instructions for socket filters</h5> |
| |
| <p>The following instructions are intended to be used in socket filters, |
| and are therefore not general-purpose: they make assumptions on the |
| contents of several registers. See the file |
| <samp><span class="file">Documentation/networking/filter.txt</span></samp> in the Linux kernel source |
| tree for more information. |
| |
| <p>Absolute loads: |
| |
| <dl> |
| <dt><code>ldabsdw imm32</code><dd>Absolute 64-bit load. |
| <br><dt><code>ldabsw imm32</code><dd>Absolute 32-bit load. |
| <br><dt><code>ldabsh imm32</code><dd>Absolute 16-bit load. |
| <br><dt><code>ldabsb imm32</code><dd>Absolute 8-bit load. |
| </dl> |
| |
| <p>Indirect loads: |
| |
| <dl> |
| <dt><code>ldinddw %s, imm32</code><dd>Indirect 64-bit load. |
| <br><dt><code>ldindw %s, imm32</code><dd>Indirect 32-bit load. |
| <br><dt><code>ldindh %s, imm32</code><dd>Indirect 16-bit load. |
| <br><dt><code>ldindb %s, imm32</code><dd>Indirect 8-bit load. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.6 Generic load/store instructions</h5> |
| |
| <p>General-purpose load and store instructions are provided for several |
| word sizes. |
| |
| <p>Load to register instructions: |
| |
| <dl> |
| <dt><code>ldxdw %d, [%s+offset16]</code><dd>Generic 64-bit load. |
| <br><dt><code>ldxw %d, [%s+offset16]</code><dd>Generic 32-bit load. |
| <br><dt><code>ldxh %d, [%s+offset16]</code><dd>Generic 16-bit load. |
| <br><dt><code>ldxb %d, [%s+offset16]</code><dd>Generic 8-bit load. |
| </dl> |
| |
| <p>Store from register instructions: |
| |
| <dl> |
| <dt><code>stxdw [%d+offset16], %s</code><dd>Generic 64-bit store. |
| <br><dt><code>stxw [%d+offset16], %s</code><dd>Generic 32-bit store. |
| <br><dt><code>stxh [%d+offset16], %s</code><dd>Generic 16-bit store. |
| <br><dt><code>stxb [%d+offset16], %s</code><dd>Generic 8-bit store. |
| </dl> |
| |
| <p>Store from immediates instructions: |
| |
| <dl> |
| <dt><code>stddw [%d+offset16], imm32</code><dd>Store immediate as 64-bit. |
| <br><dt><code>stdw [%d+offset16], imm32</code><dd>Store immediate as 32-bit. |
| <br><dt><code>stdh [%d+offset16], imm32</code><dd>Store immediate as 16-bit. |
| <br><dt><code>stdb [%d+offset16], imm32</code><dd>Store immediate as 8-bit. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.7 Jump instructions</h5> |
| |
| <p>eBPF provides the following compare-and-jump instructions, which |
| compare the values of the two given registers, or the values of a |
| register and an immediate, and perform a branch in case the comparison |
| holds true. |
| |
| <dl> |
| <dt><code>ja %d,(%s|imm32),disp16</code><dd>Jump-always. |
| <br><dt><code>jeq %d,(%s|imm32),disp16</code><dd>Jump if equal. |
| <br><dt><code>jgt %d,(%s|imm32),disp16</code><dd>Jump if greater. |
| <br><dt><code>jge %d,(%s|imm32),disp16</code><dd>Jump if greater or equal. |
| <br><dt><code>jlt %d,(%s|imm32),disp16</code><dd>Jump if lesser. |
| <br><dt><code>jle %d,(%s|imm32),disp16</code><dd>Jump if lesser or equal. |
| <br><dt><code>jset %d,(%s|imm32),disp16</code><dd>Jump if signed equal. |
| <br><dt><code>jne %d,(%s|imm32),disp16</code><dd>Jump if not equal. |
| <br><dt><code>jsgt %d,(%s|imm32),disp16</code><dd>Jump if signed greater. |
| <br><dt><code>jsge %d,(%s|imm32),disp16</code><dd>Jump if signed greater or equal. |
| <br><dt><code>jslt %d,(%s|imm32),disp16</code><dd>Jump if signed lesser. |
| <br><dt><code>jsle %d,(%s|imm32),disp16</code><dd>Jump if signed lesser or equal. |
| </dl> |
| |
| <p>A call instruction is provided in order to perform calls to other eBPF |
| functions, or to external kernel helpers: |
| |
| <dl> |
| <dt><code>call (disp32|imm32)</code><dd>Jump and link to the offset <em>disp32</em>, or to the kernel helper |
| function identified by <em>imm32</em>. |
| </dl> |
| |
| <p>Finally: |
| |
| <dl> |
| <dt><code>exit</code><dd>Terminate the eBPF program. |
| </dl> |
| |
| <h5 class="subsubsec">9.7.4.8 Atomic instructions</h5> |
| |
| <p>Atomic exchange-and-add instructions are provided in two flavors: one |
| for swapping 64-bit quantities and another for 32-bit quantities. |
| |
| <dl> |
| <dt><code>xadddw [%d+offset16],%s</code><dd>Exchange-and-add a 64-bit value at the specified location. |
| <br><dt><code>xaddw [%d+offset16],%s</code><dd>Exchange-and-add a 32-bit value at the specified location. |
| </dl> |
| |
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