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| <h5 class="subsubsection">9.27.9.2 Supported FP ABIs</h5> |
| |
| <p>The supported floating-point ABI variants are: |
| |
| <dl> |
| <dt><code>0 - No floating-point</code><dd>This variant is used to indicate that floating-point is not used within |
| the module at all and therefore has no impact on the ABI. This is the |
| default. |
| |
| <br><dt><code>1 - Double-precision</code><dd>This variant indicates that double-precision support is used. For 64-bit |
| ABIs this means that 64-bit wide floating-point registers are required. |
| For 32-bit ABIs this means that 32-bit wide floating-point registers are |
| required and double-precision operations use pairs of registers. |
| |
| <br><dt><code>2 - Single-precision</code><dd>This variant indicates that single-precision support is used. Double |
| precision operations will be supported via soft-float routines. |
| |
| <br><dt><code>3 - Soft-float</code><dd>This variant indicates that although floating-point support is used all |
| operations are emulated in software. This means the ABI is modified to |
| pass all floating-point data in general-purpose registers. |
| |
| <br><dt><code>4 - Deprecated</code><dd>This variant existed as an initial attempt at supporting 64-bit wide |
| floating-point registers for O32 ABI on a MIPS32r2 CPU. This has been |
| superseded by 5, 6 and 7. |
| |
| <br><dt><code>5 - Double-precision 32-bit CPU, 32-bit or 64-bit FPU</code><dd>This variant is used by 32-bit ABIs to indicate that the floating-point |
| code in the module has been designed to operate correctly with either |
| 32-bit wide or 64-bit wide floating-point registers. Double-precision |
| support is used. Only O32 currently supports this variant and requires |
| a minimum architecture of MIPS II. |
| |
| <br><dt><code>6 - Double-precision 32-bit FPU, 64-bit FPU</code><dd>This variant is used by 32-bit ABIs to indicate that the floating-point |
| code in the module requires 64-bit wide floating-point registers. |
| Double-precision support is used. Only O32 currently supports this |
| variant and requires a minimum architecture of MIPS32r2. |
| |
| <br><dt><code>7 - Double-precision compat 32-bit FPU, 64-bit FPU</code><dd>This variant is used by 32-bit ABIs to indicate that the floating-point |
| code in the module requires 64-bit wide floating-point registers. |
| Double-precision support is used. This differs from the previous ABI |
| as it restricts use of odd-numbered single-precision registers. Only |
| O32 currently supports this variant and requires a minimum architecture |
| of MIPS32r2. |
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