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| |
| <h2 class="chapter">1 Overview</h2> |
| |
| <p><a name="index-invocation-summary-1"></a><a name="index-option-summary-2"></a><a name="index-summary-of-options-3"></a>Here is a brief summary of how to invoke <samp><span class="command">as</span></samp>. For details, |
| see <a href="Invoking.html#Invoking">Command-Line Options</a>. |
| |
| <!-- man title AS the portable GNU assembler. --> |
| <!-- We don't use deffn and friends for the following because they seem --> |
| <!-- to be limited to one line for the header. --> |
| <pre class="smallexample"> <!-- man begin SYNOPSIS --> |
| as [<b>-a</b>[<b>cdghlns</b>][=<var>file</var>]] [<b>--alternate</b>] [<b>-D</b>] |
| [<b>--compress-debug-sections</b>] [<b>--nocompress-debug-sections</b>] |
| [<b>--debug-prefix-map</b> <var>old</var>=<var>new</var>] |
| [<b>--defsym</b> <var>sym</var>=<var>val</var>] [<b>-f</b>] [<b>-g</b>] [<b>--gstabs</b>] |
| [<b>--gstabs+</b>] [<b>--gdwarf-2</b>] [<b>--gdwarf-sections</b>] |
| [<b>--help</b>] [<b>-I</b> <var>dir</var>] [<b>-J</b>] |
| [<b>-K</b>] [<b>-L</b>] [<b>--listing-lhs-width</b>=<var>NUM</var>] |
| [<b>--listing-lhs-width2</b>=<var>NUM</var>] [<b>--listing-rhs-width</b>=<var>NUM</var>] |
| [<b>--listing-cont-lines</b>=<var>NUM</var>] [<b>--keep-locals</b>] |
| [<b>--no-pad-sections</b>] |
| [<b>-o</b> <var>objfile</var>] [<b>-R</b>] |
| [<b>--hash-size</b>=<var>NUM</var>] [<b>--reduce-memory-overheads</b>] |
| [<b>--statistics</b>] |
| [<b>-v</b>] [<b>-version</b>] [<b>--version</b>] |
| [<b>-W</b>] [<b>--warn</b>] [<b>--fatal-warnings</b>] [<b>-w</b>] [<b>-x</b>] |
| [<b>-Z</b>] [<b>@</b><var>FILE</var>] |
| [<b>--sectname-subst</b>] [<b>--size-check=[error|warning]</b>] |
| [<b>--elf-stt-common=[no|yes]</b>] |
| [<b>--generate-missing-build-notes=[no|yes]</b>] |
| [<b>--target-help</b>] [<var>target-options</var>] |
| [<b>--</b>|<var>files</var> ...] |
| <!-- man end --> |
| <!-- Target dependent options are listed below. Keep the list sorted. --> |
| <!-- Add an empty line for separation. --> |
| <!-- man begin TARGET --> |
| |
| <em>Target AArch64 options:</em> |
| [<b>-EB</b>|<b>-EL</b>] |
| [<b>-mabi</b>=<var>ABI</var>] |
| |
| <em>Target Alpha options:</em> |
| [<b>-m</b><var>cpu</var>] |
| [<b>-mdebug</b> | <b>-no-mdebug</b>] |
| [<b>-replace</b> | <b>-noreplace</b>] |
| [<b>-relax</b>] [<b>-g</b>] [<b>-G</b><var>size</var>] |
| [<b>-F</b>] [<b>-32addr</b>] |
| |
| <em>Target ARC options:</em> |
| [<b>-mcpu=</b><var>cpu</var>] |
| [<b>-mA6</b>|<b>-mARC600</b>|<b>-mARC601</b>|<b>-mA7</b>|<b>-mARC700</b>|<b>-mEM</b>|<b>-mHS</b>] |
| [<b>-mcode-density</b>] |
| [<b>-mrelax</b>] |
| [<b>-EB</b>|<b>-EL</b>] |
| |
| <em>Target ARM options:</em> |
| <!-- Don't document the deprecated options --> |
| [<b>-mcpu</b>=<var>processor</var>[+<var>extension</var>...]] |
| [<b>-march</b>=<var>architecture</var>[+<var>extension</var>...]] |
| [<b>-mfpu</b>=<var>floating-point-format</var>] |
| [<b>-mfloat-abi</b>=<var>abi</var>] |
| [<b>-meabi</b>=<var>ver</var>] |
| [<b>-mthumb</b>] |
| [<b>-EB</b>|<b>-EL</b>] |
| [<b>-mapcs-32</b>|<b>-mapcs-26</b>|<b>-mapcs-float</b>| |
| <b>-mapcs-reentrant</b>] |
| [<b>-mthumb-interwork</b>] [<b>-k</b>] |
| |
| <em>Target Blackfin options:</em> |
| [<b>-mcpu</b>=<var>processor</var>[-<var>sirevision</var>]] |
| [<b>-mfdpic</b>] |
| [<b>-mno-fdpic</b>] |
| [<b>-mnopic</b>] |
| |
| <em>Target BPF options:</em> |
| [<b>-EL</b>] [<b>-EB</b>] |
| |
| <em>Target CRIS options:</em> |
| [<b>--underscore</b> | <b>--no-underscore</b>] |
| [<b>--pic</b>] [<b>-N</b>] |
| [<b>--emulation=criself</b> | <b>--emulation=crisaout</b>] |
| [<b>--march=v0_v10</b> | <b>--march=v10</b> | <b>--march=v32</b> | <b>--march=common_v10_v32</b>] |
| <!-- Deprecated - deliberately not documented. --> |
| <!-- [@b{-h}] [@b{-H}] --> |
| |
| <em>Target C-SKY options:</em> |
| [<b>-march=</b><var>arch</var>] [<b>-mcpu=</b><var>cpu</var>] |
| [<b>-EL</b>] [<b>-mlittle-endian</b>] [<b>-EB</b>] [<b>-mbig-endian</b>] |
| [<b>-fpic</b>] [<b>-pic</b>] |
| [<b>-mljump</b>] [<b>-mno-ljump</b>] |
| [<b>-force2bsr</b>] [<b>-mforce2bsr</b>] [<b>-no-force2bsr</b>] [<b>-mno-force2bsr</b>] |
| [<b>-jsri2bsr</b>] [<b>-mjsri2bsr</b>] [<b>-no-jsri2bsr </b>] [<b>-mno-jsri2bsr</b>] |
| [<b>-mnolrw </b>] [<b>-mno-lrw</b>] |
| [<b>-melrw</b>] [<b>-mno-elrw</b>] |
| [<b>-mlaf </b>] [<b>-mliterals-after-func</b>] |
| [<b>-mno-laf</b>] [<b>-mno-literals-after-func</b>] |
| [<b>-mlabr</b>] [<b>-mliterals-after-br</b>] |
| [<b>-mno-labr</b>] [<b>-mnoliterals-after-br</b>] |
| [<b>-mistack</b>] [<b>-mno-istack</b>] |
| [<b>-mhard-float</b>] [<b>-mmp</b>] [<b>-mcp</b>] [<b>-mcache</b>] |
| [<b>-msecurity</b>] [<b>-mtrust</b>] |
| [<b>-mdsp</b>] [<b>-medsp</b>] [<b>-mvdsp</b>] |
| |
| <em>Target D10V options:</em> |
| [<b>-O</b>] |
| |
| <em>Target D30V options:</em> |
| [<b>-O</b>|<b>-n</b>|<b>-N</b>] |
| |
| <em>Target EPIPHANY options:</em> |
| [<b>-mepiphany</b>|<b>-mepiphany16</b>] |
| |
| <em>Target H8/300 options:</em> |
| [-h-tick-hex] |
| <!-- HPPA has no machine-dependent assembler options (yet). --> |
| |
| <em>Target i386 options:</em> |
| [<b>--32</b>|<b>--x32</b>|<b>--64</b>] [<b>-n</b>] |
| [<b>-march</b>=<var>CPU</var>[+<var>EXTENSION</var>...]] [<b>-mtune</b>=<var>CPU</var>] |
| |
| <em>Target IA-64 options:</em> |
| [<b>-mconstant-gp</b>|<b>-mauto-pic</b>] |
| [<b>-milp32</b>|<b>-milp64</b>|<b>-mlp64</b>|<b>-mp64</b>] |
| [<b>-mle</b>|<b>mbe</b>] |
| [<b>-mtune=itanium1</b>|<b>-mtune=itanium2</b>] |
| [<b>-munwind-check=warning</b>|<b>-munwind-check=error</b>] |
| [<b>-mhint.b=ok</b>|<b>-mhint.b=warning</b>|<b>-mhint.b=error</b>] |
| [<b>-x</b>|<b>-xexplicit</b>] [<b>-xauto</b>] [<b>-xdebug</b>] |
| |
| <em>Target IP2K options:</em> |
| [<b>-mip2022</b>|<b>-mip2022ext</b>] |
| |
| <em>Target M32C options:</em> |
| [<b>-m32c</b>|<b>-m16c</b>] [-relax] [-h-tick-hex] |
| |
| <em>Target M32R options:</em> |
| [<b>--m32rx</b>|<b>--[no-]warn-explicit-parallel-conflicts</b>| |
| <b>--W[n]p</b>] |
| |
| <em>Target M680X0 options:</em> |
| [<b>-l</b>] [<b>-m68000</b>|<b>-m68010</b>|<b>-m68020</b>|...] |
| |
| <em>Target M68HC11 options:</em> |
| [<b>-m68hc11</b>|<b>-m68hc12</b>|<b>-m68hcs12</b>|<b>-mm9s12x</b>|<b>-mm9s12xg</b>] |
| [<b>-mshort</b>|<b>-mlong</b>] |
| [<b>-mshort-double</b>|<b>-mlong-double</b>] |
| [<b>--force-long-branches</b>] [<b>--short-branches</b>] |
| [<b>--strict-direct-mode</b>] [<b>--print-insn-syntax</b>] |
| [<b>--print-opcodes</b>] [<b>--generate-example</b>] |
| |
| <em>Target MCORE options:</em> |
| [<b>-jsri2bsr</b>] [<b>-sifilter</b>] [<b>-relax</b>] |
| [<b>-mcpu=[210|340]</b>] |
| |
| <em>Target Meta options:</em> |
| [<b>-mcpu=</b><var>cpu</var>] [<b>-mfpu=</b><var>cpu</var>] [<b>-mdsp=</b><var>cpu</var>] |
| <em>Target MICROBLAZE options:</em> |
| <!-- MicroBlaze has no machine-dependent assembler options. --> |
| |
| <em>Target MIPS options:</em> |
| [<b>-nocpp</b>] [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>[<var>optimization level</var>]] |
| [<b>-g</b>[<var>debug level</var>]] [<b>-G</b> <var>num</var>] [<b>-KPIC</b>] [<b>-call_shared</b>] |
| [<b>-non_shared</b>] [<b>-xgot</b> [<b>-mvxworks-pic</b>] |
| [<b>-mabi</b>=<var>ABI</var>] [<b>-32</b>] [<b>-n32</b>] [<b>-64</b>] [<b>-mfp32</b>] [<b>-mgp32</b>] |
| [<b>-mfp64</b>] [<b>-mgp64</b>] [<b>-mfpxx</b>] |
| [<b>-modd-spreg</b>] [<b>-mno-odd-spreg</b>] |
| [<b>-march</b>=<var>CPU</var>] [<b>-mtune</b>=<var>CPU</var>] [<b>-mips1</b>] [<b>-mips2</b>] |
| [<b>-mips3</b>] [<b>-mips4</b>] [<b>-mips5</b>] [<b>-mips32</b>] [<b>-mips32r2</b>] |
| [<b>-mips32r3</b>] [<b>-mips32r5</b>] [<b>-mips32r6</b>] [<b>-mips64</b>] [<b>-mips64r2</b>] |
| [<b>-mips64r3</b>] [<b>-mips64r5</b>] [<b>-mips64r6</b>] |
| [<b>-construct-floats</b>] [<b>-no-construct-floats</b>] |
| [<b>-mignore-branch-isa</b>] [<b>-mno-ignore-branch-isa</b>] |
| [<b>-mnan=</b><var>encoding</var>] |
| [<b>-trap</b>] [<b>-no-break</b>] [<b>-break</b>] [<b>-no-trap</b>] |
| [<b>-mips16</b>] [<b>-no-mips16</b>] |
| [<b>-mmips16e2</b>] [<b>-mno-mips16e2</b>] |
| [<b>-mmicromips</b>] [<b>-mno-micromips</b>] |
| [<b>-msmartmips</b>] [<b>-mno-smartmips</b>] |
| [<b>-mips3d</b>] [<b>-no-mips3d</b>] |
| [<b>-mdmx</b>] [<b>-no-mdmx</b>] |
| [<b>-mdsp</b>] [<b>-mno-dsp</b>] |
| [<b>-mdspr2</b>] [<b>-mno-dspr2</b>] |
| [<b>-mdspr3</b>] [<b>-mno-dspr3</b>] |
| [<b>-mmsa</b>] [<b>-mno-msa</b>] |
| [<b>-mxpa</b>] [<b>-mno-xpa</b>] |
| [<b>-mmt</b>] [<b>-mno-mt</b>] |
| [<b>-mmcu</b>] [<b>-mno-mcu</b>] |
| [<b>-mcrc</b>] [<b>-mno-crc</b>] |
| [<b>-mginv</b>] [<b>-mno-ginv</b>] |
| [<b>-mloongson-mmi</b>] [<b>-mno-loongson-mmi</b>] |
| [<b>-mloongson-cam</b>] [<b>-mno-loongson-cam</b>] |
| [<b>-mloongson-ext</b>] [<b>-mno-loongson-ext</b>] |
| [<b>-mloongson-ext2</b>] [<b>-mno-loongson-ext2</b>] |
| [<b>-minsn32</b>] [<b>-mno-insn32</b>] |
| [<b>-mfix7000</b>] [<b>-mno-fix7000</b>] |
| [<b>-mfix-rm7000</b>] [<b>-mno-fix-rm7000</b>] |
| [<b>-mfix-vr4120</b>] [<b>-mno-fix-vr4120</b>] |
| [<b>-mfix-vr4130</b>] [<b>-mno-fix-vr4130</b>] |
| [<b>-mfix-r5900</b>] [<b>-mno-fix-r5900</b>] |
| [<b>-mdebug</b>] [<b>-no-mdebug</b>] |
| [<b>-mpdr</b>] [<b>-mno-pdr</b>] |
| |
| <em>Target MMIX options:</em> |
| [<b>--fixed-special-register-names</b>] [<b>--globalize-symbols</b>] |
| [<b>--gnu-syntax</b>] [<b>--relax</b>] [<b>--no-predefined-symbols</b>] |
| [<b>--no-expand</b>] [<b>--no-merge-gregs</b>] [<b>-x</b>] |
| [<b>--linker-allocated-gregs</b>] |
| |
| <em>Target Nios II options:</em> |
| [<b>-relax-all</b>] [<b>-relax-section</b>] [<b>-no-relax</b>] |
| [<b>-EB</b>] [<b>-EL</b>] |
| |
| <em>Target NDS32 options:</em> |
| [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>] [<b>-Os</b>] [<b>-mcpu=</b><var>cpu</var>] |
| [<b>-misa=</b><var>isa</var>] [<b>-mabi=</b><var>abi</var>] [<b>-mall-ext</b>] |
| [<b>-m[no-]16-bit</b>] [<b>-m[no-]perf-ext</b>] [<b>-m[no-]perf2-ext</b>] |
| [<b>-m[no-]string-ext</b>] [<b>-m[no-]dsp-ext</b>] [<b>-m[no-]mac</b>] [<b>-m[no-]div</b>] |
| [<b>-m[no-]audio-isa-ext</b>] [<b>-m[no-]fpu-sp-ext</b>] [<b>-m[no-]fpu-dp-ext</b>] |
| [<b>-m[no-]fpu-fma</b>] [<b>-mfpu-freg=</b><var>FREG</var>] [<b>-mreduced-regs</b>] |
| [<b>-mfull-regs</b>] [<b>-m[no-]dx-regs</b>] [<b>-mpic</b>] [<b>-mno-relax</b>] |
| [<b>-mb2bb</b>] |
| <!-- OpenRISC has no machine-dependent assembler options. --> |
| |
| <em>Target PDP11 options:</em> |
| [<b>-mpic</b>|<b>-mno-pic</b>] [<b>-mall</b>] [<b>-mno-extensions</b>] |
| [<b>-m</b><var>extension</var>|<b>-mno-</b><var>extension</var>] |
| [<b>-m</b><var>cpu</var>] [<b>-m</b><var>machine</var>] |
| |
| <em>Target picoJava options:</em> |
| [<b>-mb</b>|<b>-me</b>] |
| |
| <em>Target PowerPC options:</em> |
| [<b>-a32</b>|<b>-a64</b>] |
| [<b>-mpwrx</b>|<b>-mpwr2</b>|<b>-mpwr</b>|<b>-m601</b>|<b>-mppc</b>|<b>-mppc32</b>|<b>-m603</b>|<b>-m604</b>|<b>-m403</b>|<b>-m405</b>| |
| <b>-m440</b>|<b>-m464</b>|<b>-m476</b>|<b>-m7400</b>|<b>-m7410</b>|<b>-m7450</b>|<b>-m7455</b>|<b>-m750cl</b>|<b>-mgekko</b>| |
| <b>-mbroadway</b>|<b>-mppc64</b>|<b>-m620</b>|<b>-me500</b>|<b>-e500x2</b>|<b>-me500mc</b>|<b>-me500mc64</b>|<b>-me5500</b>| |
| <b>-me6500</b>|<b>-mppc64bridge</b>|<b>-mbooke</b>|<b>-mpower4</b>|<b>-mpwr4</b>|<b>-mpower5</b>|<b>-mpwr5</b>|<b>-mpwr5x</b>| |
| <b>-mpower6</b>|<b>-mpwr6</b>|<b>-mpower7</b>|<b>-mpwr7</b>|<b>-mpower8</b>|<b>-mpwr8</b>|<b>-mpower9</b>|<b>-mpwr9</b><b>-ma2</b>| |
| <b>-mcell</b>|<b>-mspe</b>|<b>-mspe2</b>|<b>-mtitan</b>|<b>-me300</b>|<b>-mcom</b>] |
| [<b>-many</b>] [<b>-maltivec</b>|<b>-mvsx</b>|<b>-mhtm</b>|<b>-mvle</b>] |
| [<b>-mregnames</b>|<b>-mno-regnames</b>] |
| [<b>-mrelocatable</b>|<b>-mrelocatable-lib</b>|<b>-K PIC</b>] [<b>-memb</b>] |
| [<b>-mlittle</b>|<b>-mlittle-endian</b>|<b>-le</b>|<b>-mbig</b>|<b>-mbig-endian</b>|<b>-be</b>] |
| [<b>-msolaris</b>|<b>-mno-solaris</b>] |
| [<b>-nops=</b><var>count</var>] |
| |
| <em>Target PRU options:</em> |
| [<b>-link-relax</b>] |
| [<b>-mnolink-relax</b>] |
| [<b>-mno-warn-regname-label</b>] |
| |
| <em>Target RISC-V options:</em> |
| [<b>-fpic</b>|<b>-fPIC</b>|<b>-fno-pic</b>] |
| [<b>-march</b>=<var>ISA</var>] |
| [<b>-mabi</b>=<var>ABI</var>] |
| |
| <em>Target RL78 options:</em> |
| [<b>-mg10</b>] |
| [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>] |
| |
| <em>Target RX options:</em> |
| [<b>-mlittle-endian</b>|<b>-mbig-endian</b>] |
| [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>] |
| [<b>-muse-conventional-section-names</b>] |
| [<b>-msmall-data-limit</b>] |
| [<b>-mpid</b>] |
| [<b>-mrelax</b>] |
| [<b>-mint-register=</b><var>number</var>] |
| [<b>-mgcc-abi</b>|<b>-mrx-abi</b>] |
| |
| <em>Target s390 options:</em> |
| [<b>-m31</b>|<b>-m64</b>] [<b>-mesa</b>|<b>-mzarch</b>] [<b>-march</b>=<var>CPU</var>] |
| [<b>-mregnames</b>|<b>-mno-regnames</b>] |
| [<b>-mwarn-areg-zero</b>] |
| |
| <em>Target SCORE options:</em> |
| [<b>-EB</b>][<b>-EL</b>][<b>-FIXDD</b>][<b>-NWARN</b>] |
| [<b>-SCORE5</b>][<b>-SCORE5U</b>][<b>-SCORE7</b>][<b>-SCORE3</b>] |
| [<b>-march=score7</b>][<b>-march=score3</b>] |
| [<b>-USE_R1</b>][<b>-KPIC</b>][<b>-O0</b>][<b>-G</b> <var>num</var>][<b>-V</b>] |
| |
| <em>Target SPARC options:</em> |
| <!-- The order here is important. See c-sparc.texi. --> |
| [<b>-Av6</b>|<b>-Av7</b>|<b>-Av8</b>|<b>-Aleon</b>|<b>-Asparclet</b>|<b>-Asparclite</b> |
| <b>-Av8plus</b>|<b>-Av8plusa</b>|<b>-Av8plusb</b>|<b>-Av8plusc</b>|<b>-Av8plusd</b> |
| <b>-Av8plusv</b>|<b>-Av8plusm</b>|<b>-Av9</b>|<b>-Av9a</b>|<b>-Av9b</b>|<b>-Av9c</b> |
| <b>-Av9d</b>|<b>-Av9e</b>|<b>-Av9v</b>|<b>-Av9m</b>|<b>-Asparc</b>|<b>-Asparcvis</b> |
| <b>-Asparcvis2</b>|<b>-Asparcfmaf</b>|<b>-Asparcima</b>|<b>-Asparcvis3</b> |
| <b>-Asparcvisr</b>|<b>-Asparc5</b>] |
| [<b>-xarch=v8plus</b>|<b>-xarch=v8plusa</b>]|<b>-xarch=v8plusb</b>|<b>-xarch=v8plusc</b> |
| <b>-xarch=v8plusd</b>|<b>-xarch=v8plusv</b>|<b>-xarch=v8plusm</b>|<b>-xarch=v9</b> |
| <b>-xarch=v9a</b>|<b>-xarch=v9b</b>|<b>-xarch=v9c</b>|<b>-xarch=v9d</b>|<b>-xarch=v9e</b> |
| <b>-xarch=v9v</b>|<b>-xarch=v9m</b>|<b>-xarch=sparc</b>|<b>-xarch=sparcvis</b> |
| <b>-xarch=sparcvis2</b>|<b>-xarch=sparcfmaf</b>|<b>-xarch=sparcima</b> |
| <b>-xarch=sparcvis3</b>|<b>-xarch=sparcvisr</b>|<b>-xarch=sparc5</b> |
| <b>-bump</b>] |
| [<b>-32</b>|<b>-64</b>] |
| [<b>--enforce-aligned-data</b>][<b>--dcti-couples-detect</b>] |
| |
| <em>Target TIC54X options:</em> |
| [<b>-mcpu=54[123589]</b>|<b>-mcpu=54[56]lp</b>] [<b>-mfar-mode</b>|<b>-mf</b>] |
| [<b>-merrors-to-file</b> <var><filename></var>|<b>-me</b> <var><filename></var>] |
| |
| <em>Target TIC6X options:</em> |
| [<b>-march=</b><var>arch</var>] [<b>-mbig-endian</b>|<b>-mlittle-endian</b>] |
| [<b>-mdsbt</b>|<b>-mno-dsbt</b>] [<b>-mpid=no</b>|<b>-mpid=near</b>|<b>-mpid=far</b>] |
| [<b>-mpic</b>|<b>-mno-pic</b>] |
| |
| <em>Target TILE-Gx options:</em> |
| [<b>-m32</b>|<b>-m64</b>][<b>-EB</b>][<b>-EL</b>] |
| <!-- TILEPro has no machine-dependent assembler options --> |
| |
| <em>Target Visium options:</em> |
| [<b>-mtune=</b><var>arch</var>] |
| |
| <em>Target Xtensa options:</em> |
| [<b>--[no-]text-section-literals</b>] [<b>--[no-]auto-litpools</b>] |
| [<b>--[no-]absolute-literals</b>] |
| [<b>--[no-]target-align</b>] [<b>--[no-]longcalls</b>] |
| [<b>--[no-]transform</b>] |
| [<b>--rename-section</b> <var>oldname</var>=<var>newname</var>] |
| [<b>--[no-]trampolines</b>] |
| |
| <em>Target Z80 options:</em> |
| [<b>-z80</b>] [<b>-r800</b>] |
| [<b> -ignore-undocumented-instructions</b>] [<b>-Wnud</b>] |
| [<b> -ignore-unportable-instructions</b>] [<b>-Wnup</b>] |
| [<b> -warn-undocumented-instructions</b>] [<b>-Wud</b>] |
| [<b> -warn-unportable-instructions</b>] [<b>-Wup</b>] |
| [<b> -forbid-undocumented-instructions</b>] [<b>-Fud</b>] |
| [<b> -forbid-unportable-instructions</b>] [<b>-Fup</b>] |
| |
| <!-- Z8000 has no machine-dependent assembler options --> |
| |
| <!-- man end --> |
| </pre> |
| <!-- man begin OPTIONS --> |
| <dl> |
| <!-- This file is designed to be included in manuals that use --> |
| <!-- expandargv. --> |
| |
| <dt><code>@</code><var>file</var><dd>Read command-line options from <var>file</var>. The options read are |
| inserted in place of the original @<var>file</var> option. If <var>file</var> |
| does not exist, or cannot be read, then the option will be treated |
| literally, and not removed. |
| |
| <p>Options in <var>file</var> are separated by whitespace. A whitespace |
| character may be included in an option by surrounding the entire |
| option in either single or double quotes. Any character (including a |
| backslash) may be included by prefixing the character to be included |
| with a backslash. The <var>file</var> may itself contain additional |
| @<var>file</var> options; any such options will be processed recursively. |
| |
| <br><dt><code>-a[cdghlmns]</code><dd>Turn on listings, in any of a variety of ways: |
| |
| <dl> |
| <dt><code>-ac</code><dd>omit false conditionals |
| |
| <br><dt><code>-ad</code><dd>omit debugging directives |
| |
| <br><dt><code>-ag</code><dd>include general information, like as version and options passed |
| |
| <br><dt><code>-ah</code><dd>include high-level source |
| |
| <br><dt><code>-al</code><dd>include assembly |
| |
| <br><dt><code>-am</code><dd>include macro expansions |
| |
| <br><dt><code>-an</code><dd>omit forms processing |
| |
| <br><dt><code>-as</code><dd>include symbols |
| |
| <br><dt><code>=file</code><dd>set the name of the listing file |
| </dl> |
| |
| <p>You may combine these options; for example, use ‘<samp><span class="samp">-aln</span></samp>’ for assembly |
| listing without forms processing. The ‘<samp><span class="samp">=file</span></samp>’ option, if used, must be |
| the last one. By itself, ‘<samp><span class="samp">-a</span></samp>’ defaults to ‘<samp><span class="samp">-ahls</span></samp>’. |
| |
| <br><dt><code>--alternate</code><dd>Begin in alternate macro mode. |
| See <a href="Altmacro.html#Altmacro"><code>.altmacro</code></a>. |
| |
| <br><dt><code>--compress-debug-sections</code><dd>Compress DWARF debug sections using zlib with SHF_COMPRESSED from the |
| ELF ABI. The resulting object file may not be compatible with older |
| linkers and object file utilities. Note if compression would make a |
| given section <em>larger</em> then it is not compressed. |
| |
| <p><a name="index-g_t_0040samp_007b_002d_002dcompress_002ddebug_002dsections_003d_007d-option-4"></a><br><dt><code>--compress-debug-sections=none</code><dt><code>--compress-debug-sections=zlib</code><dt><code>--compress-debug-sections=zlib-gnu</code><dt><code>--compress-debug-sections=zlib-gabi</code><dd>These options control how DWARF debug sections are compressed. |
| <samp><span class="option">--compress-debug-sections=none</span></samp> is equivalent to |
| <samp><span class="option">--nocompress-debug-sections</span></samp>. |
| <samp><span class="option">--compress-debug-sections=zlib</span></samp> and |
| <samp><span class="option">--compress-debug-sections=zlib-gabi</span></samp> are equivalent to |
| <samp><span class="option">--compress-debug-sections</span></samp>. |
| <samp><span class="option">--compress-debug-sections=zlib-gnu</span></samp> compresses DWARF debug |
| sections using zlib. The debug sections are renamed to begin with |
| ‘<samp><span class="samp">.zdebug</span></samp>’. Note if compression would make a given section |
| <em>larger</em> then it is not compressed nor renamed. |
| |
| <br><dt><code>--nocompress-debug-sections</code><dd>Do not compress DWARF debug sections. This is usually the default for all |
| targets except the x86/x86_64, but a configure time option can be used to |
| override this. |
| |
| <br><dt><code>-D</code><dd>Ignored. This option is accepted for script compatibility with calls to |
| other assemblers. |
| |
| <br><dt><code>--debug-prefix-map </code><var>old</var><code>=</code><var>new</var><dd>When assembling files in directory <samp><var>old</var></samp>, record debugging |
| information describing them as in <samp><var>new</var></samp> instead. |
| |
| <br><dt><code>--defsym </code><var>sym</var><code>=</code><var>value</var><dd>Define the symbol <var>sym</var> to be <var>value</var> before assembling the input file. |
| <var>value</var> must be an integer constant. As in C, a leading ‘<samp><span class="samp">0x</span></samp>’ |
| indicates a hexadecimal value, and a leading ‘<samp><span class="samp">0</span></samp>’ indicates an octal |
| value. The value of the symbol can be overridden inside a source file via the |
| use of a <code>.set</code> pseudo-op. |
| |
| <br><dt><code>-f</code><dd>“fast”—skip whitespace and comment preprocessing (assume source is |
| compiler output). |
| |
| <br><dt><code>-g</code><dt><code>--gen-debug</code><dd>Generate debugging information for each assembler source line using whichever |
| debug format is preferred by the target. This currently means either STABS, |
| ECOFF or DWARF2. |
| |
| <br><dt><code>--gstabs</code><dd>Generate stabs debugging information for each assembler line. This |
| may help debugging assembler code, if the debugger can handle it. |
| |
| <br><dt><code>--gstabs+</code><dd>Generate stabs debugging information for each assembler line, with GNU |
| extensions that probably only gdb can handle, and that could make other |
| debuggers crash or refuse to read your program. This |
| may help debugging assembler code. Currently the only GNU extension is |
| the location of the current working directory at assembling time. |
| |
| <br><dt><code>--gdwarf-2</code><dd>Generate DWARF2 debugging information for each assembler line. This |
| may help debugging assembler code, if the debugger can handle it. Note—this |
| option is only supported by some targets, not all of them. |
| |
| <br><dt><code>--gdwarf-sections</code><dd>Instead of creating a .debug_line section, create a series of |
| .debug_line.<var>foo</var> sections where <var>foo</var> is the name of the |
| corresponding code section. For example a code section called <var>.text.func</var> |
| will have its dwarf line number information placed into a section called |
| <var>.debug_line.text.func</var>. If the code section is just called <var>.text</var> |
| then debug line section will still be called just <var>.debug_line</var> without any |
| suffix. |
| |
| <br><dt><code>--size-check=error</code><dt><code>--size-check=warning</code><dd>Issue an error or warning for invalid ELF .size directive. |
| |
| <br><dt><code>--elf-stt-common=no</code><dt><code>--elf-stt-common=yes</code><dd>These options control whether the ELF assembler should generate common |
| symbols with the <code>STT_COMMON</code> type. The default can be controlled |
| by a configure option <samp><span class="option">--enable-elf-stt-common</span></samp>. |
| |
| <br><dt><code>--generate-missing-build-notes=yes</code><dt><code>--generate-missing-build-notes=no</code><dd>These options control whether the ELF assembler should generate GNU Build |
| attribute notes if none are present in the input sources. |
| The default can be controlled by the <samp><span class="option">--enable-generate-build-notes</span></samp> |
| configure option. |
| |
| <br><dt><code>--help</code><dd>Print a summary of the command-line options and exit. |
| |
| <br><dt><code>--target-help</code><dd>Print a summary of all target specific options and exit. |
| |
| <br><dt><code>-I </code><var>dir</var><dd>Add directory <var>dir</var> to the search list for <code>.include</code> directives. |
| |
| <br><dt><code>-J</code><dd>Don't warn about signed overflow. |
| |
| <br><dt><code>-K</code><dd>Issue warnings when difference tables altered for long displacements. |
| |
| <br><dt><code>-L</code><dt><code>--keep-locals</code><dd>Keep (in the symbol table) local symbols. These symbols start with |
| system-specific local label prefixes, typically ‘<samp><span class="samp">.L</span></samp>’ for ELF systems |
| or ‘<samp><span class="samp">L</span></samp>’ for traditional a.out systems. |
| See <a href="Symbol-Names.html#Symbol-Names">Symbol Names</a>. |
| |
| <br><dt><code>--listing-lhs-width=</code><var>number</var><dd>Set the maximum width, in words, of the output data column for an assembler |
| listing to <var>number</var>. |
| |
| <br><dt><code>--listing-lhs-width2=</code><var>number</var><dd>Set the maximum width, in words, of the output data column for continuation |
| lines in an assembler listing to <var>number</var>. |
| |
| <br><dt><code>--listing-rhs-width=</code><var>number</var><dd>Set the maximum width of an input source line, as displayed in a listing, to |
| <var>number</var> bytes. |
| |
| <br><dt><code>--listing-cont-lines=</code><var>number</var><dd>Set the maximum number of lines printed in a listing for a single line of input |
| to <var>number</var> + 1. |
| |
| <br><dt><code>--no-pad-sections</code><dd>Stop the assembler for padding the ends of output sections to the alignment |
| of that section. The default is to pad the sections, but this can waste space |
| which might be needed on targets which have tight memory constraints. |
| |
| <br><dt><code>-o </code><var>objfile</var><dd>Name the object-file output from <samp><span class="command">as</span></samp> <var>objfile</var>. |
| |
| <br><dt><code>-R</code><dd>Fold the data section into the text section. |
| |
| <br><dt><code>--hash-size=</code><var>number</var><dd>Set the default size of GAS's hash tables to a prime number close to |
| <var>number</var>. Increasing this value can reduce the length of time it takes the |
| assembler to perform its tasks, at the expense of increasing the assembler's |
| memory requirements. Similarly reducing this value can reduce the memory |
| requirements at the expense of speed. |
| |
| <br><dt><code>--reduce-memory-overheads</code><dd>This option reduces GAS's memory requirements, at the expense of making the |
| assembly processes slower. Currently this switch is a synonym for |
| ‘<samp><span class="samp">--hash-size=4051</span></samp>’, but in the future it may have other effects as well. |
| |
| <br><dt><code>--sectname-subst</code><dd>Honor substitution sequences in section names. |
| See <a href="Section-Name-Substitutions.html#Section-Name-Substitutions"><code>.section </code><var>name</var></a>. |
| |
| <br><dt><code>--statistics</code><dd>Print the maximum space (in bytes) and total time (in seconds) used by |
| assembly. |
| |
| <br><dt><code>--strip-local-absolute</code><dd>Remove local absolute symbols from the outgoing symbol table. |
| |
| <br><dt><code>-v</code><dt><code>-version</code><dd>Print the <samp><span class="command">as</span></samp> version. |
| |
| <br><dt><code>--version</code><dd>Print the <samp><span class="command">as</span></samp> version and exit. |
| |
| <br><dt><code>-W</code><dt><code>--no-warn</code><dd>Suppress warning messages. |
| |
| <br><dt><code>--fatal-warnings</code><dd>Treat warnings as errors. |
| |
| <br><dt><code>--warn</code><dd>Don't suppress warning messages or treat them as errors. |
| |
| <br><dt><code>-w</code><dd>Ignored. |
| |
| <br><dt><code>-x</code><dd>Ignored. |
| |
| <br><dt><code>-Z</code><dd>Generate an object file even after errors. |
| |
| <br><dt><code>-- | </code><var>files</var><code> ...</code><dd>Standard input, or source files to assemble. |
| |
| </dl> |
| <!-- man end --> |
| |
| <p>See <a href="AArch64-Options.html#AArch64-Options">AArch64 Options</a>, for the options available when as is configured |
| for the 64-bit mode of the ARM Architecture (AArch64). |
| |
| <p>See <a href="Alpha-Options.html#Alpha-Options">Alpha Options</a>, for the options available when as is configured |
| for an Alpha processor. |
| |
| <!-- man begin OPTIONS --> |
| <p>The following options are available when as is configured for an ARC |
| processor. |
| |
| <dl> |
| <dt><code>-mcpu=</code><var>cpu</var><dd>This option selects the core processor variant. |
| <br><dt><code>-EB | -EL</code><dd>Select either big-endian (-EB) or little-endian (-EL) output. |
| <br><dt><code>-mcode-density</code><dd>Enable Code Density extenssion instructions. |
| </dl> |
| |
| <p>The following options are available when as is configured for the ARM |
| processor family. |
| |
| <dl> |
| <dt><code>-mcpu=</code><var>processor</var><code>[+</code><var>extension</var><code>...]</code><dd>Specify which ARM processor variant is the target. |
| <br><dt><code>-march=</code><var>architecture</var><code>[+</code><var>extension</var><code>...]</code><dd>Specify which ARM architecture variant is used by the target. |
| <br><dt><code>-mfpu=</code><var>floating-point-format</var><dd>Select which Floating Point architecture is the target. |
| <br><dt><code>-mfloat-abi=</code><var>abi</var><dd>Select which floating point ABI is in use. |
| <br><dt><code>-mthumb</code><dd>Enable Thumb only instruction decoding. |
| <br><dt><code>-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant</code><dd>Select which procedure calling convention is in use. |
| <br><dt><code>-EB | -EL</code><dd>Select either big-endian (-EB) or little-endian (-EL) output. |
| <br><dt><code>-mthumb-interwork</code><dd>Specify that the code has been generated with interworking between Thumb and |
| ARM code in mind. |
| <br><dt><code>-mccs</code><dd>Turns on CodeComposer Studio assembly syntax compatibility mode. |
| <br><dt><code>-k</code><dd>Specify that PIC code has been generated. |
| </dl> |
| <!-- man end --> |
| |
| <p>See <a href="Blackfin-Options.html#Blackfin-Options">Blackfin Options</a>, for the options available when as is |
| configured for the Blackfin processor family. |
| |
| <p>See <a href="BPF-Options.html#BPF-Options">BPF Options</a>, for the options available when as is |
| configured for the Linux kernel BPF processor family. |
| |
| <!-- man begin OPTIONS --> |
| <p>See the info pages for documentation of the CRIS-specific options. |
| |
| <p>See <a href="C_002dSKY-Options.html#C_002dSKY-Options">C-SKY Options</a>, for the options available when as is |
| configured for the C-SKY processor family. |
| |
| <p>The following options are available when as is configured for |
| a D10V processor. |
| |
| <a name="index-D10V-optimization-5"></a> |
| <a name="index-optimization_002c-D10V-6"></a> |
| <dl><dt><code>-O</code><dd>Optimize output by parallelizing instructions. |
| </dl> |
| |
| <p>The following options are available when as is configured for a D30V |
| processor. |
| |
| <a name="index-D30V-optimization-7"></a> |
| <a name="index-optimization_002c-D30V-8"></a> |
| <dl><dt><code>-O</code><dd>Optimize output by parallelizing instructions. |
| |
| <p><a name="index-D30V-nops-9"></a><br><dt><code>-n</code><dd>Warn when nops are generated. |
| |
| <p><a name="index-D30V-nops-after-32_002dbit-multiply-10"></a><br><dt><code>-N</code><dd>Warn when a nop after a 32-bit multiply instruction is generated. |
| </dl> |
| <!-- man end --> |
| |
| <p>The following options are available when as is configured for the |
| Adapteva EPIPHANY series. |
| |
| <p>See <a href="Epiphany-Options.html#Epiphany-Options">Epiphany Options</a>, for the options available when as is |
| configured for an Epiphany processor. |
| |
| <p>See <a href="i386_002dOptions.html#i386_002dOptions">i386-Options</a>, for the options available when as is |
| configured for an i386 processor. |
| |
| <!-- man begin OPTIONS --> |
| <p>The following options are available when as is configured for the |
| Ubicom IP2K series. |
| |
| <dl> |
| <dt><code>-mip2022ext</code><dd>Specifies that the extended IP2022 instructions are allowed. |
| |
| <br><dt><code>-mip2022</code><dd>Restores the default behaviour, which restricts the permitted instructions to |
| just the basic IP2022 ones. |
| |
| </dl> |
| |
| <p>The following options are available when as is configured for the |
| Renesas M32C and M16C processors. |
| |
| <dl> |
| <dt><code>-m32c</code><dd>Assemble M32C instructions. |
| |
| <br><dt><code>-m16c</code><dd>Assemble M16C instructions (the default). |
| |
| <br><dt><code>-relax</code><dd>Enable support for link-time relaxations. |
| |
| <br><dt><code>-h-tick-hex</code><dd>Support H'00 style hex constants in addition to 0x00 style. |
| |
| </dl> |
| |
| <p>The following options are available when as is configured for the |
| Renesas M32R (formerly Mitsubishi M32R) series. |
| |
| <dl> |
| <dt><code>--m32rx</code><dd>Specify which processor in the M32R family is the target. The default |
| is normally the M32R, but this option changes it to the M32RX. |
| |
| <br><dt><code>--warn-explicit-parallel-conflicts or --Wp</code><dd>Produce warning messages when questionable parallel constructs are |
| encountered. |
| |
| <br><dt><code>--no-warn-explicit-parallel-conflicts or --Wnp</code><dd>Do not produce warning messages when questionable parallel constructs are |
| encountered. |
| |
| </dl> |
| |
| <p>The following options are available when as is configured for the |
| Motorola 68000 series. |
| |
| <dl> |
| <dt><code>-l</code><dd>Shorten references to undefined symbols, to one word instead of two. |
| |
| <br><dt><code>-m68000 | -m68008 | -m68010 | -m68020 | -m68030</code><dt><code>| -m68040 | -m68060 | -m68302 | -m68331 | -m68332</code><dt><code>| -m68333 | -m68340 | -mcpu32 | -m5200</code><dd>Specify what processor in the 68000 family is the target. The default |
| is normally the 68020, but this can be changed at configuration time. |
| |
| <br><dt><code>-m68881 | -m68882 | -mno-68881 | -mno-68882</code><dd>The target machine does (or does not) have a floating-point coprocessor. |
| The default is to assume a coprocessor for 68020, 68030, and cpu32. Although |
| the basic 68000 is not compatible with the 68881, a combination of the |
| two can be specified, since it's possible to do emulation of the |
| coprocessor instructions with the main processor. |
| |
| <br><dt><code>-m68851 | -mno-68851</code><dd>The target machine does (or does not) have a memory-management |
| unit coprocessor. The default is to assume an MMU for 68020 and up. |
| |
| </dl> |
| |
| <p>See <a href="Nios-II-Options.html#Nios-II-Options">Nios II Options</a>, for the options available when as is configured |
| for an Altera Nios II processor. |
| |
| <p>For details about the PDP-11 machine dependent features options, |
| see <a href="PDP_002d11_002dOptions.html#PDP_002d11_002dOptions">PDP-11-Options</a>. |
| |
| <dl> |
| <dt><code>-mpic | -mno-pic</code><dd>Generate position-independent (or position-dependent) code. The |
| default is <samp><span class="option">-mpic</span></samp>. |
| |
| <br><dt><code>-mall</code><dt><code>-mall-extensions</code><dd>Enable all instruction set extensions. This is the default. |
| |
| <br><dt><code>-mno-extensions</code><dd>Disable all instruction set extensions. |
| |
| <br><dt><code>-m</code><var>extension</var><code> | -mno-</code><var>extension</var><dd>Enable (or disable) a particular instruction set extension. |
| |
| <br><dt><code>-m</code><var>cpu</var><dd>Enable the instruction set extensions supported by a particular CPU, and |
| disable all other extensions. |
| |
| <br><dt><code>-m</code><var>machine</var><dd>Enable the instruction set extensions supported by a particular machine |
| model, and disable all other extensions. |
| </dl> |
| |
| <p>The following options are available when as is configured for |
| a picoJava processor. |
| |
| |
| <a name="index-PJ-endianness-11"></a> |
| <a name="index-endianness_002c-PJ-12"></a> |
| <a name="index-big-endian-output_002c-PJ-13"></a> |
| <dl><dt><code>-mb</code><dd>Generate “big endian” format output. |
| |
| <p><a name="index-little-endian-output_002c-PJ-14"></a><br><dt><code>-ml</code><dd>Generate “little endian” format output. |
| |
| </dl> |
| |
| <p>See <a href="PRU-Options.html#PRU-Options">PRU Options</a>, for the options available when as is configured |
| for a PRU processor. |
| |
| <p>The following options are available when as is configured for the |
| Motorola 68HC11 or 68HC12 series. |
| |
| <dl> |
| <dt><code>-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg</code><dd>Specify what processor is the target. The default is |
| defined by the configuration option when building the assembler. |
| |
| <br><dt><code>--xgate-ramoffset</code><dd>Instruct the linker to offset RAM addresses from S12X address space into |
| XGATE address space. |
| |
| <br><dt><code>-mshort</code><dd>Specify to use the 16-bit integer ABI. |
| |
| <br><dt><code>-mlong</code><dd>Specify to use the 32-bit integer ABI. |
| |
| <br><dt><code>-mshort-double</code><dd>Specify to use the 32-bit double ABI. |
| |
| <br><dt><code>-mlong-double</code><dd>Specify to use the 64-bit double ABI. |
| |
| <br><dt><code>--force-long-branches</code><dd>Relative branches are turned into absolute ones. This concerns |
| conditional branches, unconditional branches and branches to a |
| sub routine. |
| |
| <br><dt><code>-S | --short-branches</code><dd>Do not turn relative branches into absolute ones |
| when the offset is out of range. |
| |
| <br><dt><code>--strict-direct-mode</code><dd>Do not turn the direct addressing mode into extended addressing mode |
| when the instruction does not support direct addressing mode. |
| |
| <br><dt><code>--print-insn-syntax</code><dd>Print the syntax of instruction in case of error. |
| |
| <br><dt><code>--print-opcodes</code><dd>Print the list of instructions with syntax and then exit. |
| |
| <br><dt><code>--generate-example</code><dd>Print an example of instruction for each possible instruction and then exit. |
| This option is only useful for testing <samp><span class="command">as</span></samp>. |
| |
| </dl> |
| |
| <p>The following options are available when <samp><span class="command">as</span></samp> is configured |
| for the SPARC architecture: |
| |
| <dl> |
| <dt><code>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</code><dt><code>-Av8plus | -Av8plusa | -Av9 | -Av9a</code><dd>Explicitly select a variant of the SPARC architecture. |
| |
| <p>‘<samp><span class="samp">-Av8plus</span></samp>’ and ‘<samp><span class="samp">-Av8plusa</span></samp>’ select a 32 bit environment. |
| ‘<samp><span class="samp">-Av9</span></samp>’ and ‘<samp><span class="samp">-Av9a</span></samp>’ select a 64 bit environment. |
| |
| <p>‘<samp><span class="samp">-Av8plusa</span></samp>’ and ‘<samp><span class="samp">-Av9a</span></samp>’ enable the SPARC V9 instruction set with |
| UltraSPARC extensions. |
| |
| <br><dt><code>-xarch=v8plus | -xarch=v8plusa</code><dd>For compatibility with the Solaris v9 assembler. These options are |
| equivalent to -Av8plus and -Av8plusa, respectively. |
| |
| <br><dt><code>-bump</code><dd>Warn when the assembler switches to another architecture. |
| </dl> |
| |
| <p>The following options are available when as is configured for the 'c54x |
| architecture. |
| |
| <dl> |
| <dt><code>-mfar-mode</code><dd>Enable extended addressing mode. All addresses and relocations will assume |
| extended addressing (usually 23 bits). |
| <br><dt><code>-mcpu=</code><var>CPU_VERSION</var><dd>Sets the CPU version being compiled for. |
| <br><dt><code>-merrors-to-file </code><var>FILENAME</var><dd>Redirect error output to a file, for broken systems which don't support such |
| behaviour in the shell. |
| </dl> |
| |
| <!-- man begin OPTIONS --> |
| <p>The following options are available when as is configured for |
| a MIPS processor. |
| |
| <dl> |
| <dt><code>-G </code><var>num</var><dd>This option sets the largest size of an object that can be referenced |
| implicitly with the <code>gp</code> register. It is only accepted for targets that |
| use ECOFF format, such as a DECstation running Ultrix. The default value is 8. |
| |
| <p><a name="index-MIPS-endianness-15"></a><a name="index-endianness_002c-MIPS-16"></a><a name="index-big-endian-output_002c-MIPS-17"></a><br><dt><code>-EB</code><dd>Generate “big endian” format output. |
| |
| <p><a name="index-little-endian-output_002c-MIPS-18"></a><br><dt><code>-EL</code><dd>Generate “little endian” format output. |
| |
| <p><a name="index-MIPS-ISA-19"></a><br><dt><code>-mips1</code><dt><code>-mips2</code><dt><code>-mips3</code><dt><code>-mips4</code><dt><code>-mips5</code><dt><code>-mips32</code><dt><code>-mips32r2</code><dt><code>-mips32r3</code><dt><code>-mips32r5</code><dt><code>-mips32r6</code><dt><code>-mips64</code><dt><code>-mips64r2</code><dt><code>-mips64r3</code><dt><code>-mips64r5</code><dt><code>-mips64r6</code><dd>Generate code for a particular MIPS Instruction Set Architecture level. |
| ‘<samp><span class="samp">-mips1</span></samp>’ is an alias for ‘<samp><span class="samp">-march=r3000</span></samp>’, ‘<samp><span class="samp">-mips2</span></samp>’ is an |
| alias for ‘<samp><span class="samp">-march=r6000</span></samp>’, ‘<samp><span class="samp">-mips3</span></samp>’ is an alias for |
| ‘<samp><span class="samp">-march=r4000</span></samp>’ and ‘<samp><span class="samp">-mips4</span></samp>’ is an alias for ‘<samp><span class="samp">-march=r8000</span></samp>’. |
| ‘<samp><span class="samp">-mips5</span></samp>’, ‘<samp><span class="samp">-mips32</span></samp>’, ‘<samp><span class="samp">-mips32r2</span></samp>’, ‘<samp><span class="samp">-mips32r3</span></samp>’, |
| ‘<samp><span class="samp">-mips32r5</span></samp>’, ‘<samp><span class="samp">-mips32r6</span></samp>’, ‘<samp><span class="samp">-mips64</span></samp>’, ‘<samp><span class="samp">-mips64r2</span></samp>’, |
| ‘<samp><span class="samp">-mips64r3</span></samp>’, ‘<samp><span class="samp">-mips64r5</span></samp>’, and ‘<samp><span class="samp">-mips64r6</span></samp>’ correspond to generic |
| MIPS V, MIPS32, MIPS32 Release 2, MIPS32 Release 3, MIPS32 Release 5, MIPS32 |
| Release 6, MIPS64, MIPS64 Release 2, MIPS64 Release 3, MIPS64 Release 5, and |
| MIPS64 Release 6 ISA processors, respectively. |
| |
| <br><dt><code>-march=</code><var>cpu</var><dd>Generate code for a particular MIPS CPU. |
| |
| <br><dt><code>-mtune=</code><var>cpu</var><dd>Schedule and tune for a particular MIPS CPU. |
| |
| <br><dt><code>-mfix7000</code><dt><code>-mno-fix7000</code><dd>Cause nops to be inserted if the read of the destination register |
| of an mfhi or mflo instruction occurs in the following two instructions. |
| |
| <br><dt><code>-mfix-rm7000</code><dt><code>-mno-fix-rm7000</code><dd>Cause nops to be inserted if a dmult or dmultu instruction is |
| followed by a load instruction. |
| |
| <br><dt><code>-mfix-r5900</code><dt><code>-mno-fix-r5900</code><dd>Do not attempt to schedule the preceding instruction into the delay slot |
| of a branch instruction placed at the end of a short loop of six |
| instructions or fewer and always schedule a <code>nop</code> instruction there |
| instead. The short loop bug under certain conditions causes loops to |
| execute only once or twice, due to a hardware bug in the R5900 chip. |
| |
| <br><dt><code>-mdebug</code><dt><code>-no-mdebug</code><dd>Cause stabs-style debugging output to go into an ECOFF-style .mdebug |
| section instead of the standard ELF .stabs sections. |
| |
| <br><dt><code>-mpdr</code><dt><code>-mno-pdr</code><dd>Control generation of <code>.pdr</code> sections. |
| |
| <br><dt><code>-mgp32</code><dt><code>-mfp32</code><dd>The register sizes are normally inferred from the ISA and ABI, but these |
| flags force a certain group of registers to be treated as 32 bits wide at |
| all times. ‘<samp><span class="samp">-mgp32</span></samp>’ controls the size of general-purpose registers |
| and ‘<samp><span class="samp">-mfp32</span></samp>’ controls the size of floating-point registers. |
| |
| <br><dt><code>-mgp64</code><dt><code>-mfp64</code><dd>The register sizes are normally inferred from the ISA and ABI, but these |
| flags force a certain group of registers to be treated as 64 bits wide at |
| all times. ‘<samp><span class="samp">-mgp64</span></samp>’ controls the size of general-purpose registers |
| and ‘<samp><span class="samp">-mfp64</span></samp>’ controls the size of floating-point registers. |
| |
| <br><dt><code>-mfpxx</code><dd>The register sizes are normally inferred from the ISA and ABI, but using |
| this flag in combination with ‘<samp><span class="samp">-mabi=32</span></samp>’ enables an ABI variant |
| which will operate correctly with floating-point registers which are |
| 32 or 64 bits wide. |
| |
| <br><dt><code>-modd-spreg</code><dt><code>-mno-odd-spreg</code><dd>Enable use of floating-point operations on odd-numbered single-precision |
| registers when supported by the ISA. ‘<samp><span class="samp">-mfpxx</span></samp>’ implies |
| ‘<samp><span class="samp">-mno-odd-spreg</span></samp>’, otherwise the default is ‘<samp><span class="samp">-modd-spreg</span></samp>’. |
| |
| <br><dt><code>-mips16</code><dt><code>-no-mips16</code><dd>Generate code for the MIPS 16 processor. This is equivalent to putting |
| <code>.module mips16</code> at the start of the assembly file. ‘<samp><span class="samp">-no-mips16</span></samp>’ |
| turns off this option. |
| |
| <br><dt><code>-mmips16e2</code><dt><code>-mno-mips16e2</code><dd>Enable the use of MIPS16e2 instructions in MIPS16 mode. This is equivalent |
| to putting <code>.module mips16e2</code> at the start of the assembly file. |
| ‘<samp><span class="samp">-mno-mips16e2</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mmicromips</code><dt><code>-mno-micromips</code><dd>Generate code for the microMIPS processor. This is equivalent to putting |
| <code>.module micromips</code> at the start of the assembly file. |
| ‘<samp><span class="samp">-mno-micromips</span></samp>’ turns off this option. This is equivalent to putting |
| <code>.module nomicromips</code> at the start of the assembly file. |
| |
| <br><dt><code>-msmartmips</code><dt><code>-mno-smartmips</code><dd>Enables the SmartMIPS extension to the MIPS32 instruction set. This is |
| equivalent to putting <code>.module smartmips</code> at the start of the assembly |
| file. ‘<samp><span class="samp">-mno-smartmips</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mips3d</code><dt><code>-no-mips3d</code><dd>Generate code for the MIPS-3D Application Specific Extension. |
| This tells the assembler to accept MIPS-3D instructions. |
| ‘<samp><span class="samp">-no-mips3d</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mdmx</code><dt><code>-no-mdmx</code><dd>Generate code for the MDMX Application Specific Extension. |
| This tells the assembler to accept MDMX instructions. |
| ‘<samp><span class="samp">-no-mdmx</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mdsp</code><dt><code>-mno-dsp</code><dd>Generate code for the DSP Release 1 Application Specific Extension. |
| This tells the assembler to accept DSP Release 1 instructions. |
| ‘<samp><span class="samp">-mno-dsp</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mdspr2</code><dt><code>-mno-dspr2</code><dd>Generate code for the DSP Release 2 Application Specific Extension. |
| This option implies ‘<samp><span class="samp">-mdsp</span></samp>’. |
| This tells the assembler to accept DSP Release 2 instructions. |
| ‘<samp><span class="samp">-mno-dspr2</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mdspr3</code><dt><code>-mno-dspr3</code><dd>Generate code for the DSP Release 3 Application Specific Extension. |
| This option implies ‘<samp><span class="samp">-mdsp</span></samp>’ and ‘<samp><span class="samp">-mdspr2</span></samp>’. |
| This tells the assembler to accept DSP Release 3 instructions. |
| ‘<samp><span class="samp">-mno-dspr3</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mmsa</code><dt><code>-mno-msa</code><dd>Generate code for the MIPS SIMD Architecture Extension. |
| This tells the assembler to accept MSA instructions. |
| ‘<samp><span class="samp">-mno-msa</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mxpa</code><dt><code>-mno-xpa</code><dd>Generate code for the MIPS eXtended Physical Address (XPA) Extension. |
| This tells the assembler to accept XPA instructions. |
| ‘<samp><span class="samp">-mno-xpa</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mmt</code><dt><code>-mno-mt</code><dd>Generate code for the MT Application Specific Extension. |
| This tells the assembler to accept MT instructions. |
| ‘<samp><span class="samp">-mno-mt</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mmcu</code><dt><code>-mno-mcu</code><dd>Generate code for the MCU Application Specific Extension. |
| This tells the assembler to accept MCU instructions. |
| ‘<samp><span class="samp">-mno-mcu</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mcrc</code><dt><code>-mno-crc</code><dd>Generate code for the MIPS cyclic redundancy check (CRC) Application |
| Specific Extension. This tells the assembler to accept CRC instructions. |
| ‘<samp><span class="samp">-mno-crc</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mginv</code><dt><code>-mno-ginv</code><dd>Generate code for the Global INValidate (GINV) Application Specific |
| Extension. This tells the assembler to accept GINV instructions. |
| ‘<samp><span class="samp">-mno-ginv</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mloongson-mmi</code><dt><code>-mno-loongson-mmi</code><dd>Generate code for the Loongson MultiMedia extensions Instructions (MMI) |
| Application Specific Extension. This tells the assembler to accept MMI |
| instructions. |
| ‘<samp><span class="samp">-mno-loongson-mmi</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mloongson-cam</code><dt><code>-mno-loongson-cam</code><dd>Generate code for the Loongson Content Address Memory (CAM) instructions. |
| This tells the assembler to accept Loongson CAM instructions. |
| ‘<samp><span class="samp">-mno-loongson-cam</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mloongson-ext</code><dt><code>-mno-loongson-ext</code><dd>Generate code for the Loongson EXTensions (EXT) instructions. |
| This tells the assembler to accept Loongson EXT instructions. |
| ‘<samp><span class="samp">-mno-loongson-ext</span></samp>’ turns off this option. |
| |
| <br><dt><code>-mloongson-ext2</code><dt><code>-mno-loongson-ext2</code><dd>Generate code for the Loongson EXTensions R2 (EXT2) instructions. |
| This option implies ‘<samp><span class="samp">-mloongson-ext</span></samp>’. |
| This tells the assembler to accept Loongson EXT2 instructions. |
| ‘<samp><span class="samp">-mno-loongson-ext2</span></samp>’ turns off this option. |
| |
| <br><dt><code>-minsn32</code><dt><code>-mno-insn32</code><dd>Only use 32-bit instruction encodings when generating code for the |
| microMIPS processor. This option inhibits the use of any 16-bit |
| instructions. This is equivalent to putting <code>.set insn32</code> at |
| the start of the assembly file. ‘<samp><span class="samp">-mno-insn32</span></samp>’ turns off this |
| option. This is equivalent to putting <code>.set noinsn32</code> at the |
| start of the assembly file. By default ‘<samp><span class="samp">-mno-insn32</span></samp>’ is |
| selected, allowing all instructions to be used. |
| |
| <br><dt><code>--construct-floats</code><dt><code>--no-construct-floats</code><dd>The ‘<samp><span class="samp">--no-construct-floats</span></samp>’ option disables the construction of |
| double width floating point constants by loading the two halves of the |
| value into the two single width floating point registers that make up |
| the double width register. By default ‘<samp><span class="samp">--construct-floats</span></samp>’ is |
| selected, allowing construction of these floating point constants. |
| |
| <br><dt><code>--relax-branch</code><dt><code>--no-relax-branch</code><dd>The ‘<samp><span class="samp">--relax-branch</span></samp>’ option enables the relaxation of out-of-range |
| branches. By default ‘<samp><span class="samp">--no-relax-branch</span></samp>’ is selected, causing any |
| out-of-range branches to produce an error. |
| |
| <br><dt><code>-mignore-branch-isa</code><dt><code>-mno-ignore-branch-isa</code><dd>Ignore branch checks for invalid transitions between ISA modes. The |
| semantics of branches does not provide for an ISA mode switch, so in |
| most cases the ISA mode a branch has been encoded for has to be the |
| same as the ISA mode of the branch's target label. Therefore GAS has |
| checks implemented that verify in branch assembly that the two ISA |
| modes match. ‘<samp><span class="samp">-mignore-branch-isa</span></samp>’ disables these checks. By |
| default ‘<samp><span class="samp">-mno-ignore-branch-isa</span></samp>’ is selected, causing any invalid |
| branch requiring a transition between ISA modes to produce an error. |
| |
| <br><dt><code>-mnan=</code><var>encoding</var><dd>Select between the IEEE 754-2008 (<samp><span class="option">-mnan=2008</span></samp>) or the legacy |
| (<samp><span class="option">-mnan=legacy</span></samp>) NaN encoding format. The latter is the default. |
| |
| <p><a name="index-emulation-20"></a><br><dt><code>--emulation=</code><var>name</var><dd>This option was formerly used to switch between ELF and ECOFF output |
| on targets like IRIX 5 that supported both. MIPS ECOFF support was |
| removed in GAS 2.24, so the option now serves little purpose. |
| It is retained for backwards compatibility. |
| |
| <p>The available configuration names are: ‘<samp><span class="samp">mipself</span></samp>’, ‘<samp><span class="samp">mipslelf</span></samp>’ and |
| ‘<samp><span class="samp">mipsbelf</span></samp>’. Choosing ‘<samp><span class="samp">mipself</span></samp>’ now has no effect, since the output |
| is always ELF. ‘<samp><span class="samp">mipslelf</span></samp>’ and ‘<samp><span class="samp">mipsbelf</span></samp>’ select little- and |
| big-endian output respectively, but ‘<samp><span class="samp">-EL</span></samp>’ and ‘<samp><span class="samp">-EB</span></samp>’ are now the |
| preferred options instead. |
| |
| <br><dt><code>-nocpp</code><dd><samp><span class="command">as</span></samp> ignores this option. It is accepted for compatibility with |
| the native tools. |
| |
| <br><dt><code>--trap</code><dt><code>--no-trap</code><dt><code>--break</code><dt><code>--no-break</code><dd>Control how to deal with multiplication overflow and division by zero. |
| ‘<samp><span class="samp">--trap</span></samp>’ or ‘<samp><span class="samp">--no-break</span></samp>’ (which are synonyms) take a trap exception |
| (and only work for Instruction Set Architecture level 2 and higher); |
| ‘<samp><span class="samp">--break</span></samp>’ or ‘<samp><span class="samp">--no-trap</span></samp>’ (also synonyms, and the default) take a |
| break exception. |
| |
| <br><dt><code>-n</code><dd>When this option is used, <samp><span class="command">as</span></samp> will issue a warning every |
| time it generates a nop instruction from a macro. |
| </dl> |
| <!-- man end --> |
| |
| <p>The following options are available when as is configured for |
| an MCore processor. |
| |
| <dl> |
| <dt><code>-jsri2bsr</code><dt><code>-nojsri2bsr</code><dd>Enable or disable the JSRI to BSR transformation. By default this is enabled. |
| The command-line option ‘<samp><span class="samp">-nojsri2bsr</span></samp>’ can be used to disable it. |
| |
| <br><dt><code>-sifilter</code><dt><code>-nosifilter</code><dd>Enable or disable the silicon filter behaviour. By default this is disabled. |
| The default can be overridden by the ‘<samp><span class="samp">-sifilter</span></samp>’ command-line option. |
| |
| <br><dt><code>-relax</code><dd>Alter jump instructions for long displacements. |
| |
| <br><dt><code>-mcpu=[210|340]</code><dd>Select the cpu type on the target hardware. This controls which instructions |
| can be assembled. |
| |
| <br><dt><code>-EB</code><dd>Assemble for a big endian target. |
| |
| <br><dt><code>-EL</code><dd>Assemble for a little endian target. |
| |
| </dl> |
| <!-- man end --> |
| |
| <p>See <a href="Meta-Options.html#Meta-Options">Meta Options</a>, for the options available when as is configured |
| for a Meta processor. |
| |
| <!-- man begin OPTIONS --> |
| <p>See the info pages for documentation of the MMIX-specific options. |
| |
| <p>See <a href="NDS32-Options.html#NDS32-Options">NDS32 Options</a>, for the options available when as is configured |
| for a NDS32 processor. |
| <!-- ended inside the included file --> |
| |
| <!-- man end --> |
| <p>See <a href="PowerPC_002dOpts.html#PowerPC_002dOpts">PowerPC-Opts</a>, for the options available when as is configured |
| for a PowerPC processor. |
| |
| <p>See <a href="RISC_002dV_002dOptions.html#RISC_002dV_002dOptions">RISC-V-Options</a>, for the options available when as is configured |
| for a RISC-V processor. |
| |
| <!-- man begin OPTIONS --> |
| <p>See the info pages for documentation of the RX-specific options. |
| |
| <p>The following options are available when as is configured for the s390 |
| processor family. |
| |
| <dl> |
| <dt><code>-m31</code><dt><code>-m64</code><dd>Select the word size, either 31/32 bits or 64 bits. |
| <br><dt><code>-mesa</code><br><dt><code>-mzarch</code><dd>Select the architecture mode, either the Enterprise System |
| Architecture (esa) or the z/Architecture mode (zarch). |
| <br><dt><code>-march=</code><var>processor</var><dd>Specify which s390 processor variant is the target, ‘<samp><span class="samp">g5</span></samp>’ (or |
| ‘<samp><span class="samp">arch3</span></samp>’), ‘<samp><span class="samp">g6</span></samp>’, ‘<samp><span class="samp">z900</span></samp>’ (or ‘<samp><span class="samp">arch5</span></samp>’), ‘<samp><span class="samp">z990</span></samp>’ (or |
| ‘<samp><span class="samp">arch6</span></samp>’), ‘<samp><span class="samp">z9-109</span></samp>’, ‘<samp><span class="samp">z9-ec</span></samp>’ (or ‘<samp><span class="samp">arch7</span></samp>’), ‘<samp><span class="samp">z10</span></samp>’ (or |
| ‘<samp><span class="samp">arch8</span></samp>’), ‘<samp><span class="samp">z196</span></samp>’ (or ‘<samp><span class="samp">arch9</span></samp>’), ‘<samp><span class="samp">zEC12</span></samp>’ (or ‘<samp><span class="samp">arch10</span></samp>’), |
| ‘<samp><span class="samp">z13</span></samp>’ (or ‘<samp><span class="samp">arch11</span></samp>’), or ‘<samp><span class="samp">z14</span></samp>’ (or ‘<samp><span class="samp">arch12</span></samp>’). |
| <br><dt><code>-mregnames</code><dt><code>-mno-regnames</code><dd>Allow or disallow symbolic names for registers. |
| <br><dt><code>-mwarn-areg-zero</code><dd>Warn whenever the operand for a base or index register has been specified |
| but evaluates to zero. |
| </dl> |
| <!-- man end --> |
| |
| <p>See <a href="TIC6X-Options.html#TIC6X-Options">TIC6X Options</a>, for the options available when as is configured |
| for a TMS320C6000 processor. |
| |
| <p>See <a href="TILE_002dGx-Options.html#TILE_002dGx-Options">TILE-Gx Options</a>, for the options available when as is configured |
| for a TILE-Gx processor. |
| |
| <p>See <a href="Visium-Options.html#Visium-Options">Visium Options</a>, for the options available when as is configured |
| for a Visium processor. |
| |
| <p>See <a href="Xtensa-Options.html#Xtensa-Options">Xtensa Options</a>, for the options available when as is configured |
| for an Xtensa processor. |
| |
| <!-- man begin OPTIONS --> |
| <p>The following options are available when as is configured for |
| a Z80 family processor. |
| <dl> |
| <dt><code>-z80</code><dd>Assemble for Z80 processor. |
| <br><dt><code>-r800</code><dd>Assemble for R800 processor. |
| <br><dt><code>-ignore-undocumented-instructions</code><dt><code>-Wnud</code><dd>Assemble undocumented Z80 instructions that also work on R800 without warning. |
| <br><dt><code>-ignore-unportable-instructions</code><dt><code>-Wnup</code><dd>Assemble all undocumented Z80 instructions without warning. |
| <br><dt><code>-warn-undocumented-instructions</code><dt><code>-Wud</code><dd>Issue a warning for undocumented Z80 instructions that also work on R800. |
| <br><dt><code>-warn-unportable-instructions</code><dt><code>-Wup</code><dd>Issue a warning for undocumented Z80 instructions that do not work on R800. |
| <br><dt><code>-forbid-undocumented-instructions</code><dt><code>-Fud</code><dd>Treat all undocumented instructions as errors. |
| <br><dt><code>-forbid-unportable-instructions</code><dt><code>-Fup</code><dd>Treat undocumented Z80 instructions that do not work on R800 as errors. |
| </dl> |
| |
| <!-- man end --> |
| <ul class="menu"> |
| <li><a accesskey="1" href="Manual.html#Manual">Manual</a>: Structure of this Manual |
| <li><a accesskey="2" href="GNU-Assembler.html#GNU-Assembler">GNU Assembler</a>: The GNU Assembler |
| <li><a accesskey="3" href="Object-Formats.html#Object-Formats">Object Formats</a>: Object File Formats |
| <li><a accesskey="4" href="Command-Line.html#Command-Line">Command Line</a>: Command Line |
| <li><a accesskey="5" href="Input-Files.html#Input-Files">Input Files</a>: Input Files |
| <li><a accesskey="6" href="Object.html#Object">Object</a>: Output (Object) File |
| <li><a accesskey="7" href="Errors.html#Errors">Errors</a>: Error and Warning Messages |
| </ul> |
| |
| </body></html> |
| |
