aarch64-linux-gnu-9.2/share/doc/as.html/PDP_002d11_002dOptions.html - toolchains/linux-x86/gcc - Git at Google

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 <a name="PDP-11-Options"></a>
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 Next:&nbsp;<a rel="next" accesskey="n" href="PDP_002d11_002dPseudos.html#PDP_002d11_002dPseudos">PDP-11-Pseudos</a>,
 Up:&nbsp;<a rel="up" accesskey="u" href="PDP_002d11_002dDependent.html#PDP_002d11_002dDependent">PDP-11-Dependent</a>
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 </div>

 <h4 class="subsection">9.34.1 Options</h4>

 <p><a name="index-options-for-PDP_002d11-1856"></a>
 The PDP-11 version of <code>as</code> has a rich set of machine
 dependent options.

 <h5 class="subsubsection">9.34.1.1 Code Generation Options</h5>


 <a name="index-g_t_002dmpic-1857"></a>
 <a name="index-g_t_002dmno_002dpic-1858"></a>
 <dl><dt><code>-mpic | -mno-pic</code><dd>Generate position-independent (or position-dependent) code.

      <p>The default is to generate position-independent code.
 </dl>

 <h5 class="subsubsection">9.34.1.2 Instruction Set Extension Options</h5>

 <p>These options enables or disables the use of extensions over the base
 line instruction set as introduced by the first PDP-11 CPU: the KA11.
 Most options come in two variants: a <code>-m</code><var>extension</var> that
 enables <var>extension</var>, and a <code>-mno-</code><var>extension</var> that disables
 <var>extension</var>.

    <p>The default is to enable all extensions.


 <a name="index-g_t_002dmall-1859"></a>
 <a name="index-g_t_002dmall_002dextensions-1860"></a>
 <dl><dt><code>-mall | -mall-extensions</code><dd>Enable all instruction set extensions.

      <p><a name="index-g_t_002dmno_002dextensions-1861"></a><br><dt><code>-mno-extensions</code><dd>Disable all instruction set extensions.

      <p><a name="index-g_t_002dmcis-1862"></a><a name="index-g_t_002dmno_002dcis-1863"></a><br><dt><code>-mcis | -mno-cis</code><dd>Enable (or disable) the use of the commercial instruction set, which
 consists of these instructions: <code>ADDNI</code>, <code>ADDN</code>, <code>ADDPI</code>,
 <code>ADDP</code>, <code>ASHNI</code>, <code>ASHN</code>, <code>ASHPI</code>, <code>ASHP</code>,
 <code>CMPCI</code>, <code>CMPC</code>, <code>CMPNI</code>, <code>CMPN</code>, <code>CMPPI</code>,
 <code>CMPP</code>, <code>CVTLNI</code>, <code>CVTLN</code>, <code>CVTLPI</code>, <code>CVTLP</code>,
 <code>CVTNLI</code>, <code>CVTNL</code>, <code>CVTNPI</code>, <code>CVTNP</code>, <code>CVTPLI</code>,
 <code>CVTPL</code>, <code>CVTPNI</code>, <code>CVTPN</code>, <code>DIVPI</code>, <code>DIVP</code>,
 <code>L2DR</code>, <code>L3DR</code>, <code>LOCCI</code>, <code>LOCC</code>, <code>MATCI</code>,
 <code>MATC</code>, <code>MOVCI</code>, <code>MOVC</code>, <code>MOVRCI</code>, <code>MOVRC</code>,
 <code>MOVTCI</code>, <code>MOVTC</code>, <code>MULPI</code>, <code>MULP</code>, <code>SCANCI</code>,
 <code>SCANC</code>, <code>SKPCI</code>, <code>SKPC</code>, <code>SPANCI</code>, <code>SPANC</code>,
 <code>SUBNI</code>, <code>SUBN</code>, <code>SUBPI</code>, and <code>SUBP</code>.

      <p><a name="index-g_t_002dmcsm-1864"></a><a name="index-g_t_002dmno_002dcsm-1865"></a><br><dt><code>-mcsm | -mno-csm</code><dd>Enable (or disable) the use of the <code>CSM</code> instruction.

      <p><a name="index-g_t_002dmeis-1866"></a><a name="index-g_t_002dmno_002deis-1867"></a><br><dt><code>-meis | -mno-eis</code><dd>Enable (or disable) the use of the extended instruction set, which
 consists of these instructions: <code>ASHC</code>, <code>ASH</code>, <code>DIV</code>,
 <code>MARK</code>, <code>MUL</code>, <code>RTT</code>, <code>SOB</code> <code>SXT</code>, and
 <code>XOR</code>.

      <p><a name="index-g_t_002dmfis-1868"></a><a name="index-g_t_002dmno_002dfis-1869"></a><a name="index-g_t_002dmkev11-1870"></a><a name="index-g_t_002dmkev11-1871"></a><a name="index-g_t_002dmno_002dkev11-1872"></a><br><dt><code>-mfis | -mkev11</code><dt><code>-mno-fis | -mno-kev11</code><dd>Enable (or disable) the use of the KEV11 floating-point instructions:
 <code>FADD</code>, <code>FDIV</code>, <code>FMUL</code>, and <code>FSUB</code>.

      <p><a name="index-g_t_002dmfpp-1873"></a><a name="index-g_t_002dmno_002dfpp-1874"></a><a name="index-g_t_002dmfpu-1875"></a><a name="index-g_t_002dmno_002dfpu-1876"></a><a name="index-g_t_002dmfp_002d11-1877"></a><a name="index-g_t_002dmno_002dfp_002d11-1878"></a><br><dt><code>-mfpp | -mfpu | -mfp-11</code><dt><code>-mno-fpp | -mno-fpu | -mno-fp-11</code><dd>Enable (or disable) the use of FP-11 floating-point instructions:
 <code>ABSF</code>, <code>ADDF</code>, <code>CFCC</code>, <code>CLRF</code>, <code>CMPF</code>,
 <code>DIVF</code>, <code>LDCFF</code>, <code>LDCIF</code>, <code>LDEXP</code>, <code>LDF</code>,
 <code>LDFPS</code>, <code>MODF</code>, <code>MULF</code>, <code>NEGF</code>, <code>SETD</code>,
 <code>SETF</code>, <code>SETI</code>, <code>SETL</code>, <code>STCFF</code>, <code>STCFI</code>,
 <code>STEXP</code>, <code>STF</code>, <code>STFPS</code>, <code>STST</code>, <code>SUBF</code>, and
 <code>TSTF</code>.

      <p><a name="index-g_t_002dmlimited_002deis-1879"></a><a name="index-g_t_002dmno_002dlimited_002deis-1880"></a><br><dt><code>-mlimited-eis | -mno-limited-eis</code><dd>Enable (or disable) the use of the limited extended instruction set:
 <code>MARK</code>, <code>RTT</code>, <code>SOB</code>, <code>SXT</code>, and <code>XOR</code>.

      <p>The -mno-limited-eis options also implies -mno-eis.

      <p><a name="index-g_t_002dmmfpt-1881"></a><a name="index-g_t_002dmno_002dmfpt-1882"></a><br><dt><code>-mmfpt | -mno-mfpt</code><dd>Enable (or disable) the use of the <code>MFPT</code> instruction.

      <p><a name="index-g_t_002dmmutiproc-1883"></a><a name="index-g_t_002dmno_002dmutiproc-1884"></a><br><dt><code>-mmultiproc | -mno-multiproc</code><dd>Enable (or disable) the use of multiprocessor instructions: <code>TSTSET</code> and
 <code>WRTLCK</code>.

      <p><a name="index-g_t_002dmmxps-1885"></a><a name="index-g_t_002dmno_002dmxps-1886"></a><br><dt><code>-mmxps | -mno-mxps</code><dd>Enable (or disable) the use of the <code>MFPS</code> and <code>MTPS</code> instructions.

      <p><a name="index-g_t_002dmspl-1887"></a><a name="index-g_t_002dmno_002dspl-1888"></a><br><dt><code>-mspl | -mno-spl</code><dd>Enable (or disable) the use of the <code>SPL</code> instruction.

      <p><a name="index-g_t_002dmmicrocode-1889"></a><a name="index-g_t_002dmno_002dmicrocode-1890"></a>Enable (or disable) the use of the microcode instructions: <code>LDUB</code>,
 <code>MED</code>, and <code>XFC</code>.
 </dl>

 <h5 class="subsubsection">9.34.1.3 CPU Model Options</h5>

 <p>These options enable the instruction set extensions supported by a
 particular CPU, and disables all other extensions.


 <a name="index-g_t_002dmka11-1891"></a>
 <dl><dt><code>-mka11</code><dd>KA11 CPU.  Base line instruction set only.

      <p><a name="index-g_t_002dmkb11-1892"></a><br><dt><code>-mkb11</code><dd>KB11 CPU.  Enable extended instruction set and <code>SPL</code>.

      <p><a name="index-g_t_002dmkd11a-1893"></a><br><dt><code>-mkd11a</code><dd>KD11-A CPU.  Enable limited extended instruction set.

      <p><a name="index-g_t_002dmkd11b-1894"></a><br><dt><code>-mkd11b</code><dd>KD11-B CPU.  Base line instruction set only.

      <p><a name="index-g_t_002dmkd11d-1895"></a><br><dt><code>-mkd11d</code><dd>KD11-D CPU.  Base line instruction set only.

      <p><a name="index-g_t_002dmkd11e-1896"></a><br><dt><code>-mkd11e</code><dd>KD11-E CPU.  Enable extended instruction set, <code>MFPS</code>, and <code>MTPS</code>.

      <p><a name="index-g_t_002dmkd11f-1897"></a><a name="index-g_t_002dmkd11h-1898"></a><a name="index-g_t_002dmkd11q-1899"></a><br><dt><code>-mkd11f | -mkd11h | -mkd11q</code><dd>KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended instruction set,
 <code>MFPS</code>, and <code>MTPS</code>.

      <p><a name="index-g_t_002dmkd11k-1900"></a><br><dt><code>-mkd11k</code><dd>KD11-K CPU.  Enable extended instruction set, <code>LDUB</code>, <code>MED</code>,
 <code>MFPS</code>, <code>MFPT</code>, <code>MTPS</code>, and <code>XFC</code>.

      <p><a name="index-g_t_002dmkd11z-1901"></a><br><dt><code>-mkd11z</code><dd>KD11-Z CPU.  Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,
 <code>MFPT</code>, <code>MTPS</code>, and <code>SPL</code>.

      <p><a name="index-g_t_002dmf11-1902"></a><br><dt><code>-mf11</code><dd>F11 CPU.  Enable extended instruction set, <code>MFPS</code>, <code>MFPT</code>, and
 <code>MTPS</code>.

      <p><a name="index-g_t_002dmj11-1903"></a><br><dt><code>-mj11</code><dd>J11 CPU.  Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,
 <code>MFPT</code>, <code>MTPS</code>, <code>SPL</code>, <code>TSTSET</code>, and <code>WRTLCK</code>.

      <p><a name="index-g_t_002dmt11-1904"></a><br><dt><code>-mt11</code><dd>T11 CPU.  Enable limited extended instruction set, <code>MFPS</code>, and
 <code>MTPS</code>.
 </dl>

 <h5 class="subsubsection">9.34.1.4 Machine Model Options</h5>

 <p>These options enable the instruction set extensions supported by a
 particular machine model, and disables all other extensions.


 <a name="index-g_t_002dm11_002f03-1905"></a>
 <dl><dt><code>-m11/03</code><dd>Same as <code>-mkd11f</code>.

      <p><a name="index-g_t_002dm11_002f04-1906"></a><br><dt><code>-m11/04</code><dd>Same as <code>-mkd11d</code>.

      <p><a name="index-g_t_002dm11_002f05-1907"></a><a name="index-g_t_002dm11_002f10-1908"></a><br><dt><code>-m11/05 | -m11/10</code><dd>Same as <code>-mkd11b</code>.

      <p><a name="index-g_t_002dm11_002f15-1909"></a><a name="index-g_t_002dm11_002f20-1910"></a><br><dt><code>-m11/15 | -m11/20</code><dd>Same as <code>-mka11</code>.

      <p><a name="index-g_t_002dm11_002f21-1911"></a><br><dt><code>-m11/21</code><dd>Same as <code>-mt11</code>.

      <p><a name="index-g_t_002dm11_002f23-1912"></a><a name="index-g_t_002dm11_002f24-1913"></a><br><dt><code>-m11/23 | -m11/24</code><dd>Same as <code>-mf11</code>.

      <p><a name="index-g_t_002dm11_002f34-1914"></a><br><dt><code>-m11/34</code><dd>Same as <code>-mkd11e</code>.

      <p><a name="index-g_t_002dm11_002f34a-1915"></a><br><dt><code>-m11/34a</code><dd>Ame as <code>-mkd11e</code> <code>-mfpp</code>.

      <p><a name="index-g_t_002dm11_002f35-1916"></a><a name="index-g_t_002dm11_002f40-1917"></a><br><dt><code>-m11/35 | -m11/40</code><dd>Same as <code>-mkd11a</code>.

      <p><a name="index-g_t_002dm11_002f44-1918"></a><br><dt><code>-m11/44</code><dd>Same as <code>-mkd11z</code>.

      <p><a name="index-g_t_002dm11_002f45-1919"></a><a name="index-g_t_002dm11_002f50-1920"></a><a name="index-g_t_002dm11_002f55-1921"></a><a name="index-g_t_002dm11_002f70-1922"></a><br><dt><code>-m11/45 | -m11/50 | -m11/55 | -m11/70</code><dd>Same as <code>-mkb11</code>.

      <p><a name="index-g_t_002dm11_002f53-1923"></a><a name="index-g_t_002dm11_002f73-1924"></a><a name="index-g_t_002dm11_002f83-1925"></a><a name="index-g_t_002dm11_002f84-1926"></a><a name="index-g_t_002dm11_002f93-1927"></a><a name="index-g_t_002dm11_002f94-1928"></a><br><dt><code>-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94</code><dd>Same as <code>-mj11</code>.

      <p><a name="index-g_t_002dm11_002f60-1929"></a><br><dt><code>-m11/60</code><dd>Same as <code>-mkd11k</code>.
 </dl>

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	<h4 class="subsection">9.34.1 Options</h4>

	<p><a name="index-options-for-PDP_002d11-1856"></a>
	The PDP-11 version of <code>as</code> has a rich set of machine
	dependent options.

	<h5 class="subsubsection">9.34.1.1 Code Generation Options</h5>


	<a name="index-g_t_002dmpic-1857"></a>
	<a name="index-g_t_002dmno_002dpic-1858"></a>
	<dl><dt><code>-mpic \| -mno-pic</code><dd>Generate position-independent (or position-dependent) code.

	<p>The default is to generate position-independent code.
	</dl>

	<h5 class="subsubsection">9.34.1.2 Instruction Set Extension Options</h5>

	<p>These options enables or disables the use of extensions over the base
	line instruction set as introduced by the first PDP-11 CPU: the KA11.
	Most options come in two variants: a <code>-m</code><var>extension</var> that
	enables <var>extension</var>, and a <code>-mno-</code><var>extension</var> that disables
	<var>extension</var>.

	<p>The default is to enable all extensions.


	<a name="index-g_t_002dmall-1859"></a>
	<a name="index-g_t_002dmall_002dextensions-1860"></a>
	<dl><dt><code>-mall \| -mall-extensions</code><dd>Enable all instruction set extensions.

	<p><a name="index-g_t_002dmno_002dextensions-1861"></a><br><dt><code>-mno-extensions</code><dd>Disable all instruction set extensions.

	<p><a name="index-g_t_002dmcis-1862"></a><a name="index-g_t_002dmno_002dcis-1863"></a><br><dt><code>-mcis \| -mno-cis</code><dd>Enable (or disable) the use of the commercial instruction set, which
	consists of these instructions: <code>ADDNI</code>, <code>ADDN</code>, <code>ADDPI</code>,
	<code>ADDP</code>, <code>ASHNI</code>, <code>ASHN</code>, <code>ASHPI</code>, <code>ASHP</code>,
	<code>CMPCI</code>, <code>CMPC</code>, <code>CMPNI</code>, <code>CMPN</code>, <code>CMPPI</code>,
	<code>CMPP</code>, <code>CVTLNI</code>, <code>CVTLN</code>, <code>CVTLPI</code>, <code>CVTLP</code>,
	<code>CVTNLI</code>, <code>CVTNL</code>, <code>CVTNPI</code>, <code>CVTNP</code>, <code>CVTPLI</code>,
	<code>CVTPL</code>, <code>CVTPNI</code>, <code>CVTPN</code>, <code>DIVPI</code>, <code>DIVP</code>,
	<code>L2DR</code>, <code>L3DR</code>, <code>LOCCI</code>, <code>LOCC</code>, <code>MATCI</code>,
	<code>MATC</code>, <code>MOVCI</code>, <code>MOVC</code>, <code>MOVRCI</code>, <code>MOVRC</code>,
	<code>MOVTCI</code>, <code>MOVTC</code>, <code>MULPI</code>, <code>MULP</code>, <code>SCANCI</code>,
	<code>SCANC</code>, <code>SKPCI</code>, <code>SKPC</code>, <code>SPANCI</code>, <code>SPANC</code>,
	<code>SUBNI</code>, <code>SUBN</code>, <code>SUBPI</code>, and <code>SUBP</code>.

	<p><a name="index-g_t_002dmcsm-1864"></a><a name="index-g_t_002dmno_002dcsm-1865"></a><br><dt><code>-mcsm \| -mno-csm</code><dd>Enable (or disable) the use of the <code>CSM</code> instruction.

	<p><a name="index-g_t_002dmeis-1866"></a><a name="index-g_t_002dmno_002deis-1867"></a><br><dt><code>-meis \| -mno-eis</code><dd>Enable (or disable) the use of the extended instruction set, which
	consists of these instructions: <code>ASHC</code>, <code>ASH</code>, <code>DIV</code>,
	<code>MARK</code>, <code>MUL</code>, <code>RTT</code>, <code>SOB</code> <code>SXT</code>, and
	<code>XOR</code>.

	<p><a name="index-g_t_002dmfis-1868"></a><a name="index-g_t_002dmno_002dfis-1869"></a><a name="index-g_t_002dmkev11-1870"></a><a name="index-g_t_002dmkev11-1871"></a><a name="index-g_t_002dmno_002dkev11-1872"></a><br><dt><code>-mfis \| -mkev11</code><dt><code>-mno-fis \| -mno-kev11</code><dd>Enable (or disable) the use of the KEV11 floating-point instructions:
	<code>FADD</code>, <code>FDIV</code>, <code>FMUL</code>, and <code>FSUB</code>.

	<p><a name="index-g_t_002dmfpp-1873"></a><a name="index-g_t_002dmno_002dfpp-1874"></a><a name="index-g_t_002dmfpu-1875"></a><a name="index-g_t_002dmno_002dfpu-1876"></a><a name="index-g_t_002dmfp_002d11-1877"></a><a name="index-g_t_002dmno_002dfp_002d11-1878"></a><br><dt><code>-mfpp \| -mfpu \| -mfp-11</code><dt><code>-mno-fpp \| -mno-fpu \| -mno-fp-11</code><dd>Enable (or disable) the use of FP-11 floating-point instructions:
	<code>ABSF</code>, <code>ADDF</code>, <code>CFCC</code>, <code>CLRF</code>, <code>CMPF</code>,
	<code>DIVF</code>, <code>LDCFF</code>, <code>LDCIF</code>, <code>LDEXP</code>, <code>LDF</code>,
	<code>LDFPS</code>, <code>MODF</code>, <code>MULF</code>, <code>NEGF</code>, <code>SETD</code>,
	<code>SETF</code>, <code>SETI</code>, <code>SETL</code>, <code>STCFF</code>, <code>STCFI</code>,
	<code>STEXP</code>, <code>STF</code>, <code>STFPS</code>, <code>STST</code>, <code>SUBF</code>, and
	<code>TSTF</code>.

	<p><a name="index-g_t_002dmlimited_002deis-1879"></a><a name="index-g_t_002dmno_002dlimited_002deis-1880"></a><br><dt><code>-mlimited-eis \| -mno-limited-eis</code><dd>Enable (or disable) the use of the limited extended instruction set:
	<code>MARK</code>, <code>RTT</code>, <code>SOB</code>, <code>SXT</code>, and <code>XOR</code>.

	<p>The -mno-limited-eis options also implies -mno-eis.

	<p><a name="index-g_t_002dmmfpt-1881"></a><a name="index-g_t_002dmno_002dmfpt-1882"></a><br><dt><code>-mmfpt \| -mno-mfpt</code><dd>Enable (or disable) the use of the <code>MFPT</code> instruction.

	<p><a name="index-g_t_002dmmutiproc-1883"></a><a name="index-g_t_002dmno_002dmutiproc-1884"></a><br><dt><code>-mmultiproc \| -mno-multiproc</code><dd>Enable (or disable) the use of multiprocessor instructions: <code>TSTSET</code> and
	<code>WRTLCK</code>.

	<p><a name="index-g_t_002dmmxps-1885"></a><a name="index-g_t_002dmno_002dmxps-1886"></a><br><dt><code>-mmxps \| -mno-mxps</code><dd>Enable (or disable) the use of the <code>MFPS</code> and <code>MTPS</code> instructions.

	<p><a name="index-g_t_002dmspl-1887"></a><a name="index-g_t_002dmno_002dspl-1888"></a><br><dt><code>-mspl \| -mno-spl</code><dd>Enable (or disable) the use of the <code>SPL</code> instruction.

	<p><a name="index-g_t_002dmmicrocode-1889"></a><a name="index-g_t_002dmno_002dmicrocode-1890"></a>Enable (or disable) the use of the microcode instructions: <code>LDUB</code>,
	<code>MED</code>, and <code>XFC</code>.
	</dl>

	<h5 class="subsubsection">9.34.1.3 CPU Model Options</h5>

	<p>These options enable the instruction set extensions supported by a
	particular CPU, and disables all other extensions.


	<a name="index-g_t_002dmka11-1891"></a>
	<dl><dt><code>-mka11</code><dd>KA11 CPU. Base line instruction set only.

	<p><a name="index-g_t_002dmkb11-1892"></a><br><dt><code>-mkb11</code><dd>KB11 CPU. Enable extended instruction set and <code>SPL</code>.

	<p><a name="index-g_t_002dmkd11a-1893"></a><br><dt><code>-mkd11a</code><dd>KD11-A CPU. Enable limited extended instruction set.

	<p><a name="index-g_t_002dmkd11b-1894"></a><br><dt><code>-mkd11b</code><dd>KD11-B CPU. Base line instruction set only.

	<p><a name="index-g_t_002dmkd11d-1895"></a><br><dt><code>-mkd11d</code><dd>KD11-D CPU. Base line instruction set only.

	<p><a name="index-g_t_002dmkd11e-1896"></a><br><dt><code>-mkd11e</code><dd>KD11-E CPU. Enable extended instruction set, <code>MFPS</code>, and <code>MTPS</code>.

	<p><a name="index-g_t_002dmkd11f-1897"></a><a name="index-g_t_002dmkd11h-1898"></a><a name="index-g_t_002dmkd11q-1899"></a><br><dt><code>-mkd11f \| -mkd11h \| -mkd11q</code><dd>KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended instruction set,
	<code>MFPS</code>, and <code>MTPS</code>.

	<p><a name="index-g_t_002dmkd11k-1900"></a><br><dt><code>-mkd11k</code><dd>KD11-K CPU. Enable extended instruction set, <code>LDUB</code>, <code>MED</code>,
	<code>MFPS</code>, <code>MFPT</code>, <code>MTPS</code>, and <code>XFC</code>.

	<p><a name="index-g_t_002dmkd11z-1901"></a><br><dt><code>-mkd11z</code><dd>KD11-Z CPU. Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,
	<code>MFPT</code>, <code>MTPS</code>, and <code>SPL</code>.

	<p><a name="index-g_t_002dmf11-1902"></a><br><dt><code>-mf11</code><dd>F11 CPU. Enable extended instruction set, <code>MFPS</code>, <code>MFPT</code>, and
	<code>MTPS</code>.

	<p><a name="index-g_t_002dmj11-1903"></a><br><dt><code>-mj11</code><dd>J11 CPU. Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,
	<code>MFPT</code>, <code>MTPS</code>, <code>SPL</code>, <code>TSTSET</code>, and <code>WRTLCK</code>.

	<p><a name="index-g_t_002dmt11-1904"></a><br><dt><code>-mt11</code><dd>T11 CPU. Enable limited extended instruction set, <code>MFPS</code>, and
	<code>MTPS</code>.
	</dl>

	<h5 class="subsubsection">9.34.1.4 Machine Model Options</h5>

	<p>These options enable the instruction set extensions supported by a
	particular machine model, and disables all other extensions.


	<a name="index-g_t_002dm11_002f03-1905"></a>
	<dl><dt><code>-m11/03</code><dd>Same as <code>-mkd11f</code>.

	<p><a name="index-g_t_002dm11_002f04-1906"></a><br><dt><code>-m11/04</code><dd>Same as <code>-mkd11d</code>.

	<p><a name="index-g_t_002dm11_002f05-1907"></a><a name="index-g_t_002dm11_002f10-1908"></a><br><dt><code>-m11/05 \| -m11/10</code><dd>Same as <code>-mkd11b</code>.

	<p><a name="index-g_t_002dm11_002f15-1909"></a><a name="index-g_t_002dm11_002f20-1910"></a><br><dt><code>-m11/15 \| -m11/20</code><dd>Same as <code>-mka11</code>.

	<p><a name="index-g_t_002dm11_002f21-1911"></a><br><dt><code>-m11/21</code><dd>Same as <code>-mt11</code>.

	<p><a name="index-g_t_002dm11_002f23-1912"></a><a name="index-g_t_002dm11_002f24-1913"></a><br><dt><code>-m11/23 \| -m11/24</code><dd>Same as <code>-mf11</code>.

	<p><a name="index-g_t_002dm11_002f34-1914"></a><br><dt><code>-m11/34</code><dd>Same as <code>-mkd11e</code>.

	<p><a name="index-g_t_002dm11_002f34a-1915"></a><br><dt><code>-m11/34a</code><dd>Ame as <code>-mkd11e</code> <code>-mfpp</code>.

	<p><a name="index-g_t_002dm11_002f35-1916"></a><a name="index-g_t_002dm11_002f40-1917"></a><br><dt><code>-m11/35 \| -m11/40</code><dd>Same as <code>-mkd11a</code>.

	<p><a name="index-g_t_002dm11_002f44-1918"></a><br><dt><code>-m11/44</code><dd>Same as <code>-mkd11z</code>.

	<p><a name="index-g_t_002dm11_002f45-1919"></a><a name="index-g_t_002dm11_002f50-1920"></a><a name="index-g_t_002dm11_002f55-1921"></a><a name="index-g_t_002dm11_002f70-1922"></a><br><dt><code>-m11/45 \| -m11/50 \| -m11/55 \| -m11/70</code><dd>Same as <code>-mkb11</code>.

	<p><a name="index-g_t_002dm11_002f53-1923"></a><a name="index-g_t_002dm11_002f73-1924"></a><a name="index-g_t_002dm11_002f83-1925"></a><a name="index-g_t_002dm11_002f84-1926"></a><a name="index-g_t_002dm11_002f93-1927"></a><a name="index-g_t_002dm11_002f94-1928"></a><br><dt><code>-m11/53 \| -m11/73 \| -m11/83 \| -m11/84 \| -m11/93 \| -m11/94</code><dd>Same as <code>-mj11</code>.

	<p><a name="index-g_t_002dm11_002f60-1929"></a><br><dt><code>-m11/60</code><dd>Same as <code>-mkd11k</code>.
	</dl>

	</body></html>