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<h5 class="subsubsection">9.57.2.3 Addressing Modes</h5>
<p><a name="index-addressing-modes_002c-Z8000-2705"></a><a name="index-Z800-addressing-modes-2706"></a>as understands the following addressing modes for the Z8000:
<dl>
<dt><code>rl</code><var>n</var><dt><code>rh</code><var>n</var><dt><code>r</code><var>n</var><dt><code>rr</code><var>n</var><dt><code>rq</code><var>n</var><dd>Register direct: 8bit, 16bit, 32bit, and 64bit registers.
<br><dt><code>@r</code><var>n</var><dt><code>@rr</code><var>n</var><dd>Indirect register: @rr<var>n</var> in segmented mode, @r<var>n</var> in unsegmented
mode.
<br><dt><var>addr</var><dd>Direct: the 16 bit or 24 bit address (depending on whether the assembler
is in segmented or unsegmented mode) of the operand is in the instruction.
<br><dt><code>address(r</code><var>n</var><code>)</code><dd>Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
the final address in memory of the operand.
<br><dt><code>r</code><var>n</var><code>(#</code><var>imm</var><code>)</code><dt><code>rr</code><var>n</var><code>(#</code><var>imm</var><code>)</code><dd>Base Address: the 16 or 24 bit register is added to the 16 bit sign
extended immediate displacement to produce the final address in memory
of the operand.
<br><dt><code>r</code><var>n</var><code>(r</code><var>m</var><code>)</code><dt><code>rr</code><var>n</var><code>(r</code><var>m</var><code>)</code><dd>Base Index: the 16 or 24 bit register r<var>n</var> or rr<var>n</var> is added to
the sign extended 16 bit index register r<var>m</var> to produce the final
address in memory of the operand.
<br><dt><code>#</code><var>xx</var><dd>Immediate data <var>xx</var>.
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