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| <h4 class="subsection">9.16.4 i386-Mnemonics</h4> |
| |
| <h5 class="subsubsection">9.16.4.1 Instruction Naming</h5> |
| |
| <p><a name="index-i386-instruction-naming-1191"></a><a name="index-instruction-naming_002c-i386-1192"></a><a name="index-x86_002d64-instruction-naming-1193"></a><a name="index-instruction-naming_002c-x86_002d64-1194"></a> |
| Instruction mnemonics are suffixed with one character modifiers which |
| specify the size of operands. The letters ‘<samp><span class="samp">b</span></samp>’, ‘<samp><span class="samp">w</span></samp>’, ‘<samp><span class="samp">l</span></samp>’ |
| and ‘<samp><span class="samp">q</span></samp>’ specify byte, word, long and quadruple word operands. If |
| no suffix is specified by an instruction then <code>as</code> tries to |
| fill in the missing suffix based on the destination register operand |
| (the last one by convention). Thus, ‘<samp><span class="samp">mov %ax, %bx</span></samp>’ is equivalent |
| to ‘<samp><span class="samp">movw %ax, %bx</span></samp>’; also, ‘<samp><span class="samp">mov $1, %bx</span></samp>’ is equivalent to |
| ‘<samp><span class="samp">movw $1, bx</span></samp>’. Note that this is incompatible with the AT&T Unix |
| assembler which assumes that a missing mnemonic suffix implies long |
| operand size. (This incompatibility does not affect compiler output |
| since compilers always explicitly specify the mnemonic suffix.) |
| |
| <p>Almost all instructions have the same names in AT&T and Intel format. |
| There are a few exceptions. The sign extend and zero extend |
| instructions need two sizes to specify them. They need a size to |
| sign/zero extend <em>from</em> and a size to zero extend <em>to</em>. This |
| is accomplished by using two instruction mnemonic suffixes in AT&T |
| syntax. Base names for sign extend and zero extend are |
| ‘<samp><span class="samp">movs...</span></samp>’ and ‘<samp><span class="samp">movz...</span></samp>’ in AT&T syntax (‘<samp><span class="samp">movsx</span></samp>’ |
| and ‘<samp><span class="samp">movzx</span></samp>’ in Intel syntax). The instruction mnemonic suffixes |
| are tacked on to this base name, the <em>from</em> suffix before the |
| <em>to</em> suffix. Thus, ‘<samp><span class="samp">movsbl %al, %edx</span></samp>’ is AT&T syntax for |
| “move sign extend <em>from</em> %al <em>to</em> %edx.” Possible suffixes, |
| thus, are ‘<samp><span class="samp">bl</span></samp>’ (from byte to long), ‘<samp><span class="samp">bw</span></samp>’ (from byte to word), |
| ‘<samp><span class="samp">wl</span></samp>’ (from word to long), ‘<samp><span class="samp">bq</span></samp>’ (from byte to quadruple word), |
| ‘<samp><span class="samp">wq</span></samp>’ (from word to quadruple word), and ‘<samp><span class="samp">lq</span></samp>’ (from long to |
| quadruple word). |
| |
| <p><a name="index-encoding-options_002c-i386-1195"></a><a name="index-encoding-options_002c-x86_002d64-1196"></a> |
| Different encoding options can be specified via pseudo prefixes: |
| |
| <ul> |
| <li>‘<samp><span class="samp">{disp8}</span></samp>’ – prefer 8-bit displacement. |
| |
| <li>‘<samp><span class="samp">{disp32}</span></samp>’ – prefer 32-bit displacement. |
| |
| <li>‘<samp><span class="samp">{load}</span></samp>’ – prefer load-form instruction. |
| |
| <li>‘<samp><span class="samp">{store}</span></samp>’ – prefer store-form instruction. |
| |
| <li>‘<samp><span class="samp">{vex2}</span></samp>’ – prefer 2-byte VEX prefix for VEX instruction. |
| |
| <li>‘<samp><span class="samp">{vex3}</span></samp>’ – prefer 3-byte VEX prefix for VEX instruction. |
| |
| <li>‘<samp><span class="samp">{evex}</span></samp>’ – encode with EVEX prefix. |
| |
| <li>‘<samp><span class="samp">{rex}</span></samp>’ – prefer REX prefix for integer and legacy vector |
| instructions (x86-64 only). Note that this differs from the ‘<samp><span class="samp">rex</span></samp>’ |
| prefix which generates REX prefix unconditionally. |
| |
| <li>‘<samp><span class="samp">{nooptimize}</span></samp>’ – disable instruction size optimization. |
| </ul> |
| |
| <p><a name="index-conversion-instructions_002c-i386-1197"></a><a name="index-i386-conversion-instructions-1198"></a><a name="index-conversion-instructions_002c-x86_002d64-1199"></a><a name="index-x86_002d64-conversion-instructions-1200"></a>The Intel-syntax conversion instructions |
| |
| <ul> |
| <li>‘<samp><span class="samp">cbw</span></samp>’ — sign-extend byte in ‘<samp><span class="samp">%al</span></samp>’ to word in ‘<samp><span class="samp">%ax</span></samp>’, |
| |
| <li>‘<samp><span class="samp">cwde</span></samp>’ — sign-extend word in ‘<samp><span class="samp">%ax</span></samp>’ to long in ‘<samp><span class="samp">%eax</span></samp>’, |
| |
| <li>‘<samp><span class="samp">cwd</span></samp>’ — sign-extend word in ‘<samp><span class="samp">%ax</span></samp>’ to long in ‘<samp><span class="samp">%dx:%ax</span></samp>’, |
| |
| <li>‘<samp><span class="samp">cdq</span></samp>’ — sign-extend dword in ‘<samp><span class="samp">%eax</span></samp>’ to quad in ‘<samp><span class="samp">%edx:%eax</span></samp>’, |
| |
| <li>‘<samp><span class="samp">cdqe</span></samp>’ — sign-extend dword in ‘<samp><span class="samp">%eax</span></samp>’ to quad in ‘<samp><span class="samp">%rax</span></samp>’ |
| (x86-64 only), |
| |
| <li>‘<samp><span class="samp">cqo</span></samp>’ — sign-extend quad in ‘<samp><span class="samp">%rax</span></samp>’ to octuple in |
| ‘<samp><span class="samp">%rdx:%rax</span></samp>’ (x86-64 only), |
| </ul> |
| |
| <p class="noindent">are called ‘<samp><span class="samp">cbtw</span></samp>’, ‘<samp><span class="samp">cwtl</span></samp>’, ‘<samp><span class="samp">cwtd</span></samp>’, ‘<samp><span class="samp">cltd</span></samp>’, ‘<samp><span class="samp">cltq</span></samp>’, and |
| ‘<samp><span class="samp">cqto</span></samp>’ in AT&T naming. <code>as</code> accepts either naming for these |
| instructions. |
| |
| <p><a name="index-jump-instructions_002c-i386-1201"></a><a name="index-call-instructions_002c-i386-1202"></a><a name="index-jump-instructions_002c-x86_002d64-1203"></a><a name="index-call-instructions_002c-x86_002d64-1204"></a>Far call/jump instructions are ‘<samp><span class="samp">lcall</span></samp>’ and ‘<samp><span class="samp">ljmp</span></samp>’ in |
| AT&T syntax, but are ‘<samp><span class="samp">call far</span></samp>’ and ‘<samp><span class="samp">jump far</span></samp>’ in Intel |
| convention. |
| |
| <h5 class="subsubsection">9.16.4.2 AT&T Mnemonic versus Intel Mnemonic</h5> |
| |
| <p><a name="index-i386-mnemonic-compatibility-1205"></a><a name="index-mnemonic-compatibility_002c-i386-1206"></a> |
| <code>as</code> supports assembly using Intel mnemonic. |
| <code>.intel_mnemonic</code> selects Intel mnemonic with Intel syntax, and |
| <code>.att_mnemonic</code> switches back to the usual AT&T mnemonic with AT&T |
| syntax for compatibility with the output of <code>gcc</code>. |
| Several x87 instructions, ‘<samp><span class="samp">fadd</span></samp>’, ‘<samp><span class="samp">fdiv</span></samp>’, ‘<samp><span class="samp">fdivp</span></samp>’, |
| ‘<samp><span class="samp">fdivr</span></samp>’, ‘<samp><span class="samp">fdivrp</span></samp>’, ‘<samp><span class="samp">fmul</span></samp>’, ‘<samp><span class="samp">fsub</span></samp>’, ‘<samp><span class="samp">fsubp</span></samp>’, |
| ‘<samp><span class="samp">fsubr</span></samp>’ and ‘<samp><span class="samp">fsubrp</span></samp>’, are implemented in AT&T System V/386 |
| assembler with different mnemonics from those in Intel IA32 specification. |
| <code>gcc</code> generates those instructions with AT&T mnemonic. |
| |
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| |
