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| |
| <h4 class="subsection">G.5.4 i386 Features</h4> |
| |
| <p><a name="index-target-descriptions_002c-i386-features-3661"></a> |
| The ‘<samp><span class="samp">org.gnu.gdb.i386.core</span></samp>’ feature is required for i386/amd64 |
| targets. It should describe the following registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">eax</span></samp>’ through ‘<samp><span class="samp">edi</span></samp>’ plus ‘<samp><span class="samp">eip</span></samp>’ for i386 |
| <li>‘<samp><span class="samp">rax</span></samp>’ through ‘<samp><span class="samp">r15</span></samp>’ plus ‘<samp><span class="samp">rip</span></samp>’ for amd64 |
| <li>‘<samp><span class="samp">eflags</span></samp>’, ‘<samp><span class="samp">cs</span></samp>’, ‘<samp><span class="samp">ss</span></samp>’, ‘<samp><span class="samp">ds</span></samp>’, ‘<samp><span class="samp">es</span></samp>’, |
| ‘<samp><span class="samp">fs</span></samp>’, ‘<samp><span class="samp">gs</span></samp>’ |
| <li>‘<samp><span class="samp">st0</span></samp>’ through ‘<samp><span class="samp">st7</span></samp>’ |
| <li>‘<samp><span class="samp">fctrl</span></samp>’, ‘<samp><span class="samp">fstat</span></samp>’, ‘<samp><span class="samp">ftag</span></samp>’, ‘<samp><span class="samp">fiseg</span></samp>’, ‘<samp><span class="samp">fioff</span></samp>’, |
| ‘<samp><span class="samp">foseg</span></samp>’, ‘<samp><span class="samp">fooff</span></samp>’ and ‘<samp><span class="samp">fop</span></samp>’ |
| </ul> |
| |
| <p>The register sets may be different, depending on the target. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.sse</span></samp>’ feature is optional. It should |
| describe registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">xmm0</span></samp>’ through ‘<samp><span class="samp">xmm7</span></samp>’ for i386 |
| <li>‘<samp><span class="samp">xmm0</span></samp>’ through ‘<samp><span class="samp">xmm15</span></samp>’ for amd64 |
| <li>‘<samp><span class="samp">mxcsr</span></samp>’ |
| </ul> |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.avx</span></samp>’ feature is optional and requires the |
| ‘<samp><span class="samp">org.gnu.gdb.i386.sse</span></samp>’ feature. It should |
| describe the upper 128 bits of <span class="sc">ymm</span> registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">ymm0h</span></samp>’ through ‘<samp><span class="samp">ymm7h</span></samp>’ for i386 |
| <li>‘<samp><span class="samp">ymm0h</span></samp>’ through ‘<samp><span class="samp">ymm15h</span></samp>’ for amd64 |
| </ul> |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.mpx</span></samp>’ is an optional feature representing Intel |
| Memory Protection Extension (MPX). It should describe the following registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">bnd0raw</span></samp>’ through ‘<samp><span class="samp">bnd3raw</span></samp>’ for i386 and amd64. |
| <li>‘<samp><span class="samp">bndcfgu</span></samp>’ and ‘<samp><span class="samp">bndstatus</span></samp>’ for i386 and amd64. |
| </ul> |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.linux</span></samp>’ feature is optional. It should |
| describe a single register, ‘<samp><span class="samp">orig_eax</span></samp>’. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.segments</span></samp>’ feature is optional. It should |
| describe two system registers: ‘<samp><span class="samp">fs_base</span></samp>’ and ‘<samp><span class="samp">gs_base</span></samp>’. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.avx512</span></samp>’ feature is optional and requires the |
| ‘<samp><span class="samp">org.gnu.gdb.i386.avx</span></samp>’ feature. It should |
| describe additional <span class="sc">xmm</span> registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">xmm16h</span></samp>’ through ‘<samp><span class="samp">xmm31h</span></samp>’, only valid for amd64. |
| </ul> |
| |
| <p>It should describe the upper 128 bits of additional <span class="sc">ymm</span> registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">ymm16h</span></samp>’ through ‘<samp><span class="samp">ymm31h</span></samp>’, only valid for amd64. |
| </ul> |
| |
| <p>It should |
| describe the upper 256 bits of <span class="sc">zmm</span> registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">zmm0h</span></samp>’ through ‘<samp><span class="samp">zmm7h</span></samp>’ for i386. |
| <li>‘<samp><span class="samp">zmm0h</span></samp>’ through ‘<samp><span class="samp">zmm15h</span></samp>’ for amd64. |
| </ul> |
| |
| <p>It should |
| describe the additional <span class="sc">zmm</span> registers: |
| |
| <ul> |
| <li>‘<samp><span class="samp">zmm16h</span></samp>’ through ‘<samp><span class="samp">zmm31h</span></samp>’, only valid for amd64. |
| </ul> |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.i386.pkeys</span></samp>’ feature is optional. It should |
| describe a single register, ‘<samp><span class="samp">pkru</span></samp>’. It is a 32-bit register |
| valid for i386 and amd64. |
| |
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| |
