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| Next: <a href="Sparc_002dConstants.html#Sparc_002dConstants" accesskey="n" rel="next">Sparc-Constants</a>, Previous: <a href="Sparc_002dChars.html#Sparc_002dChars" accesskey="p" rel="prev">Sparc-Chars</a>, Up: <a href="Sparc_002dSyntax.html#Sparc_002dSyntax" accesskey="u" rel="up">Sparc-Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> |
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| <a name="Register-Names-15"></a> |
| <h4 class="subsubsection">9.42.3.2 Register Names</h4> |
| <a name="index-Sparc-registers"></a> |
| <a name="index-register-names_002c-Sparc"></a> |
| |
| <p>The Sparc integer register file is broken down into global, |
| outgoing, local, and incoming. |
| </p> |
| <ul> |
| <li> The 8 global registers are referred to as ‘<samp>%g<var>n</var></samp>’. |
| |
| </li><li> The 8 outgoing registers are referred to as ‘<samp>%o<var>n</var></samp>’. |
| |
| </li><li> The 8 local registers are referred to as ‘<samp>%l<var>n</var></samp>’. |
| |
| </li><li> The 8 incoming registers are referred to as ‘<samp>%i<var>n</var></samp>’. |
| |
| </li><li> The frame pointer register ‘<samp>%i6</samp>’ can be referenced using |
| the alias ‘<samp>%fp</samp>’. |
| |
| </li><li> The stack pointer register ‘<samp>%o6</samp>’ can be referenced using |
| the alias ‘<samp>%sp</samp>’. |
| </li></ul> |
| |
| <p>Floating point registers are simply referred to as ‘<samp>%f<var>n</var></samp>’. |
| When assembling for pre-V9, only 32 floating point registers |
| are available. For V9 and later there are 64, but there are |
| restrictions when referencing the upper 32 registers. They |
| can only be accessed as double or quad, and thus only even |
| or quad numbered accesses are allowed. For example, ‘<samp>%f34</samp>’ |
| is a legal floating point register, but ‘<samp>%f35</samp>’ is not. |
| </p> |
| <p>Certain V9 instructions allow access to ancillary state registers. |
| Most simply they can be referred to as ‘<samp>%asr<var>n</var></samp>’ where |
| <var>n</var> can be from 16 to 31. However, there are some aliases |
| defined to reference ASR registers defined for various UltraSPARC |
| processors: |
| </p> |
| <ul> |
| <li> The tick compare register is referred to as ‘<samp>%tick_cmpr</samp>’. |
| |
| </li><li> The system tick register is referred to as ‘<samp>%stick</samp>’. An alias, |
| ‘<samp>%sys_tick</samp>’, exists but is deprecated and should not be used |
| by new software. |
| |
| </li><li> The system tick compare register is referred to as ‘<samp>%stick_cmpr</samp>’. |
| An alias, ‘<samp>%sys_tick_cmpr</samp>’, exists but is deprecated and should |
| not be used by new software. |
| |
| </li><li> The software interrupt register is referred to as ‘<samp>%softint</samp>’. |
| |
| </li><li> The set software interrupt register is referred to as ‘<samp>%set_softint</samp>’. |
| The mnemonic ‘<samp>%softint_set</samp>’ is provided as an alias. |
| |
| </li><li> The clear software interrupt register is referred to as |
| ‘<samp>%clear_softint</samp>’. The mnemonic ‘<samp>%softint_clear</samp>’ is provided |
| as an alias. |
| |
| </li><li> The performance instrumentation counters register is referred to as |
| ‘<samp>%pic</samp>’. |
| |
| </li><li> The performance control register is referred to as ‘<samp>%pcr</samp>’. |
| |
| </li><li> The graphics status register is referred to as ‘<samp>%gsr</samp>’. |
| |
| </li><li> The V9 dispatch control register is referred to as ‘<samp>%dcr</samp>’. |
| </li></ul> |
| |
| <p>Various V9 branch and conditional move instructions allow |
| specification of which set of integer condition codes to |
| test. These are referred to as ‘<samp>%xcc</samp>’ and ‘<samp>%icc</samp>’. |
| </p> |
| <p>In V9, there are 4 sets of floating point condition codes |
| which are referred to as ‘<samp>%fcc<var>n</var></samp>’. |
| </p> |
| <p>Several special privileged and non-privileged registers |
| exist: |
| </p> |
| <ul> |
| <li> The V9 address space identifier register is referred to as ‘<samp>%asi</samp>’. |
| |
| </li><li> The V9 restorable windows register is referred to as ‘<samp>%canrestore</samp>’. |
| |
| </li><li> The V9 savable windows register is referred to as ‘<samp>%cansave</samp>’. |
| |
| </li><li> The V9 clean windows register is referred to as ‘<samp>%cleanwin</samp>’. |
| |
| </li><li> The V9 current window pointer register is referred to as ‘<samp>%cwp</samp>’. |
| |
| </li><li> The floating-point queue register is referred to as ‘<samp>%fq</samp>’. |
| |
| </li><li> The V8 co-processor queue register is referred to as ‘<samp>%cq</samp>’. |
| |
| </li><li> The floating point status register is referred to as ‘<samp>%fsr</samp>’. |
| |
| </li><li> The other windows register is referred to as ‘<samp>%otherwin</samp>’. |
| |
| </li><li> The V9 program counter register is referred to as ‘<samp>%pc</samp>’. |
| |
| </li><li> The V9 next program counter register is referred to as ‘<samp>%npc</samp>’. |
| |
| </li><li> The V9 processor interrupt level register is referred to as ‘<samp>%pil</samp>’. |
| |
| </li><li> The V9 processor state register is referred to as ‘<samp>%pstate</samp>’. |
| |
| </li><li> The trap base address register is referred to as ‘<samp>%tba</samp>’. |
| |
| </li><li> The V9 tick register is referred to as ‘<samp>%tick</samp>’. |
| |
| </li><li> The V9 trap level is referred to as ‘<samp>%tl</samp>’. |
| |
| </li><li> The V9 trap program counter is referred to as ‘<samp>%tpc</samp>’. |
| |
| </li><li> The V9 trap next program counter is referred to as ‘<samp>%tnpc</samp>’. |
| |
| </li><li> The V9 trap state is referred to as ‘<samp>%tstate</samp>’. |
| |
| </li><li> The V9 trap type is referred to as ‘<samp>%tt</samp>’. |
| |
| </li><li> The V9 condition codes is referred to as ‘<samp>%ccr</samp>’. |
| |
| </li><li> The V9 floating-point registers state is referred to as ‘<samp>%fprs</samp>’. |
| |
| </li><li> The V9 version register is referred to as ‘<samp>%ver</samp>’. |
| |
| </li><li> The V9 window state register is referred to as ‘<samp>%wstate</samp>’. |
| |
| </li><li> The Y register is referred to as ‘<samp>%y</samp>’. |
| |
| </li><li> The V8 window invalid mask register is referred to as ‘<samp>%wim</samp>’. |
| |
| </li><li> The V8 processor state register is referred to as ‘<samp>%psr</samp>’. |
| |
| </li><li> The V9 global register level register is referred to as ‘<samp>%gl</samp>’. |
| </li></ul> |
| |
| <p>Several special register names exist for hypervisor mode code: |
| </p> |
| <ul> |
| <li> The hyperprivileged processor state register is referred to as |
| ‘<samp>%hpstate</samp>’. |
| |
| </li><li> The hyperprivileged trap state register is referred to as ‘<samp>%htstate</samp>’. |
| |
| </li><li> The hyperprivileged interrupt pending register is referred to as |
| ‘<samp>%hintp</samp>’. |
| |
| </li><li> The hyperprivileged trap base address register is referred to as |
| ‘<samp>%htba</samp>’. |
| |
| </li><li> The hyperprivileged implementation version register is referred |
| to as ‘<samp>%hver</samp>’. |
| |
| </li><li> The hyperprivileged system tick offset register is referred to as |
| ‘<samp>%hstick_offset</samp>’. Note that there is no ‘<samp>%hstick</samp>’ register, |
| the normal ‘<samp>%stick</samp>’ is used. |
| |
| </li><li> The hyperprivileged system tick enable register is referred to as |
| ‘<samp>%hstick_enable</samp>’. |
| |
| </li><li> The hyperprivileged system tick compare register is referred |
| to as ‘<samp>%hstick_cmpr</samp>’. |
| </li></ul> |
| |
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| Next: <a href="Sparc_002dConstants.html#Sparc_002dConstants" accesskey="n" rel="next">Sparc-Constants</a>, Previous: <a href="Sparc_002dChars.html#Sparc_002dChars" accesskey="p" rel="prev">Sparc-Chars</a>, Up: <a href="Sparc_002dSyntax.html#Sparc_002dSyntax" accesskey="u" rel="up">Sparc-Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> |
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