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<title>Using as: Compare-and-branch-i960</title>
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<a name="Compare_002dand_002dBranch"></a>
<h4 class="subsubsection">9.17.4.2 Compare-and-Branch</h4>
<a name="index-i960-compare_002fbranch-instructions"></a>
<a name="index-compare_002fbranch-instructions_002c-i960"></a>
<p>The 960 architectures provide combined Compare-and-Branch instructions
that permit you to store the branch target in the lower 13 bits of the
instruction word itself. However, if you specify a branch target far
enough away that its address won&rsquo;t fit in 13 bits, the assembler can
either issue an error, or convert your Compare-and-Branch instruction
into separate instructions to do the compare and the branch.
</p>
<a name="index-compare-and-jump-expansions_002c-i960"></a>
<a name="index-i960-compare-and-jump-expansions"></a>
<p>Whether <code>as</code> gives an error or expands the instruction depends
on two choices you can make: whether you use the &lsquo;<samp>-no-relax</samp>&rsquo; option,
and whether you use a &ldquo;Compare and Branch&rdquo; instruction or a &ldquo;Compare
and Jump&rdquo; instruction. The &ldquo;Jump&rdquo; instructions are <em>always</em>
expanded if necessary; the &ldquo;Branch&rdquo; instructions are expanded when
necessary <em>unless</em> you specify <code>-no-relax</code>&mdash;in which case
<code>as</code> gives an error instead.
</p>
<p>These are the Compare-and-Branch instructions, their &ldquo;Jump&rdquo; variants,
and the instruction pairs they may expand into:
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