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<title>Using as: M68K-Branch</title>
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<a name="M68K_002dBranch"></a>
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<p>
Next: <a href="M68K_002dChars.html#M68K_002dChars" accesskey="n" rel="next">M68K-Chars</a>, Up: <a href="M68K_002dopcodes.html#M68K_002dopcodes" accesskey="u" rel="up">M68K-opcodes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="Branch-Improvement"></a>
<h4 class="subsubsection">9.23.6.1 Branch Improvement</h4>
<a name="index-pseudo_002dopcodes_002c-M680x0"></a>
<a name="index-M680x0-pseudo_002dopcodes"></a>
<a name="index-branch-improvement_002c-M680x0"></a>
<a name="index-M680x0-branch-improvement"></a>
<p>Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by substituting &lsquo;<samp>j</samp>&rsquo; for
&lsquo;<samp>b</samp>&rsquo; at the start of a Motorola mnemonic.
</p>
<p>The following table summarizes the pseudo-operations. A <code>*</code> flags
cases that are more fully described after the table:
</p>
<div class="smallexample">
<pre class="smallexample"> Displacement
+------------------------------------------------------------
| 68020 68000/10, not PC-relative OK
Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
+------------------------------------------------------------
jbsr |bsrs bsrw bsrl jsr
jra |bras braw bral jmp
* jXX |bXXs bXXw bXXl bNXs;jmp
* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
fjXX | N/A fbXXw fbXXl N/A
XX: condition
NX: negative of condition XX
</pre></div>
<div align="center"><code>*</code>&mdash;see full description below
</div><div align="center"><code>**</code>&mdash;this expansion mode is disallowed by &lsquo;<samp>--pcrel</samp>&rsquo;
</div>
<dl compact="compact">
<dt><code>jbsr</code></dt>
<dt><code>jra</code></dt>
<dd><p>These are the simplest jump pseudo-operations; they always map to one
particular machine instruction, depending on the displacement to the
branch target. This instruction will be a byte or word branch is that
is sufficient. Otherwise, a long branch will be emitted if available.
If no long branches are available and the &lsquo;<samp>--pcrel</samp>&rsquo; option is not
given, an absolute long jump will be emitted instead. If no long
branches are available, the &lsquo;<samp>--pcrel</samp>&rsquo; option is given, and a word
branch cannot reach the target, an error message is generated.
</p>
<p>In addition to standard branch operands, <code>as</code> allows these
pseudo-operations to have all operands that are allowed for jsr and jmp,
substituting these instructions if the operand given is not valid for a
branch instruction.
</p>
</dd>
<dt><code>j<var>XX</var></code></dt>
<dd><p>Here, &lsquo;<samp>j<var>XX</var></samp>&rsquo; stands for an entire family of pseudo-operations,
where <var>XX</var> is a conditional branch or condition-code test. The full
list of pseudo-ops in this family is:
</p><div class="smallexample">
<pre class="smallexample"> jhi jls jcc jcs jne jeq jvc
jvs jpl jmi jge jlt jgt jle
</pre></div>
<p>Usually, each of these pseudo-operations expands to a single branch
instruction. However, if a word branch is not sufficient, no long branches
are available, and the &lsquo;<samp>--pcrel</samp>&rsquo; option is not given, <code>as</code>
issues a longer code fragment in terms of <var>NX</var>, the opposite condition
to <var>XX</var>. For example, under these conditions:
</p><div class="smallexample">
<pre class="smallexample"> j<var>XX</var> foo
</pre></div>
<p>gives
</p><div class="smallexample">
<pre class="smallexample"> b<var>NX</var>s oof
jmp foo
oof:
</pre></div>
</dd>
<dt><code>db<var>XX</var></code></dt>
<dd><p>The full family of pseudo-operations covered here is
</p><div class="smallexample">
<pre class="smallexample"> dbhi dbls dbcc dbcs dbne dbeq dbvc
dbvs dbpl dbmi dbge dblt dbgt dble
dbf dbra dbt
</pre></div>
<p>Motorola &lsquo;<samp>db<var>XX</var></samp>&rsquo; instructions allow word displacements only. When
a word displacement is sufficient, each of these pseudo-operations expands
to the corresponding Motorola instruction. When a word displacement is not
sufficient and long branches are available, when the source reads
&lsquo;<samp>db<var>XX</var> foo</samp>&rsquo;, <code>as</code> emits
</p><div class="smallexample">
<pre class="smallexample"> db<var>XX</var> oo1
bras oo2
oo1:bral foo
oo2:
</pre></div>
<p>If, however, long branches are not available and the &lsquo;<samp>--pcrel</samp>&rsquo; option is
not given, <code>as</code> emits
</p><div class="smallexample">
<pre class="smallexample"> db<var>XX</var> oo1
bras oo2
oo1:jmp foo
oo2:
</pre></div>
</dd>
<dt><code>fj<var>XX</var></code></dt>
<dd><p>This family includes
</p><div class="smallexample">
<pre class="smallexample"> fjne fjeq fjge fjlt fjgt fjle fjf
fjt fjgl fjgle fjnge fjngl fjngle fjngt
fjnle fjnlt fjoge fjogl fjogt fjole fjolt
fjor fjseq fjsf fjsne fjst fjueq fjuge
fjugt fjule fjult fjun
</pre></div>
<p>Each of these pseudo-operations always expands to a single Motorola
coprocessor branch instruction, word or long. All Motorola coprocessor
branch instructions allow both word and long displacements.
</p>
</dd>
</dl>
<hr>
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Next: <a href="M68K_002dChars.html#M68K_002dChars" accesskey="n" rel="next">M68K-Chars</a>, Up: <a href="M68K_002dopcodes.html#M68K_002dopcodes" accesskey="u" rel="up">M68K-opcodes</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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