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| <title>Using as: Z8000-Addressing</title> |
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| Previous: <a href="Z8000_002dRegs.html#Z8000_002dRegs" accesskey="p" rel="prev">Z8000-Regs</a>, Up: <a href="Z8000-Syntax.html#Z8000-Syntax" accesskey="u" rel="up">Z8000 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> |
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| <a name="Addressing-Modes-5"></a> |
| <h4 class="subsubsection">9.47.2.3 Addressing Modes</h4> |
| |
| <a name="index-addressing-modes_002c-Z8000"></a> |
| <a name="index-Z800-addressing-modes"></a> |
| <p>as understands the following addressing modes for the Z8000: |
| </p> |
| <dl compact="compact"> |
| <dt><code>rl<var>n</var></code></dt> |
| <dt><code>rh<var>n</var></code></dt> |
| <dt><code>r<var>n</var></code></dt> |
| <dt><code>rr<var>n</var></code></dt> |
| <dt><code>rq<var>n</var></code></dt> |
| <dd><p>Register direct: 8bit, 16bit, 32bit, and 64bit registers. |
| </p> |
| </dd> |
| <dt><code>@r<var>n</var></code></dt> |
| <dt><code>@rr<var>n</var></code></dt> |
| <dd><p>Indirect register: @rr<var>n</var> in segmented mode, @r<var>n</var> in unsegmented |
| mode. |
| </p> |
| </dd> |
| <dt><code><var>addr</var></code></dt> |
| <dd><p>Direct: the 16 bit or 24 bit address (depending on whether the assembler |
| is in segmented or unsegmented mode) of the operand is in the instruction. |
| </p> |
| </dd> |
| <dt><code>address(r<var>n</var>)</code></dt> |
| <dd><p>Indexed: the 16 or 24 bit address is added to the 16 bit register to produce |
| the final address in memory of the operand. |
| </p> |
| </dd> |
| <dt><code>r<var>n</var>(#<var>imm</var>)</code></dt> |
| <dt><code>rr<var>n</var>(#<var>imm</var>)</code></dt> |
| <dd><p>Base Address: the 16 or 24 bit register is added to the 16 bit sign |
| extended immediate displacement to produce the final address in memory |
| of the operand. |
| </p> |
| </dd> |
| <dt><code>r<var>n</var>(r<var>m</var>)</code></dt> |
| <dt><code>rr<var>n</var>(r<var>m</var>)</code></dt> |
| <dd><p>Base Index: the 16 or 24 bit register r<var>n</var> or rr<var>n</var> is added to |
| the sign extended 16 bit index register r<var>m</var> to produce the final |
| address in memory of the operand. |
| </p> |
| </dd> |
| <dt><code>#<var>xx</var></code></dt> |
| <dd><p>Immediate data <var>xx</var>. |
| </p></dd> |
| </dl> |
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