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| <a name="s390-Formats"></a> |
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| Next: <a href="s390-Aliases.html#s390-Aliases" accesskey="n" rel="next">s390 Aliases</a>, Previous: <a href="s390-Operands.html#s390-Operands" accesskey="p" rel="prev">s390 Operands</a>, Up: <a href="s390-Syntax.html#s390-Syntax" accesskey="u" rel="up">s390 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> |
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| <hr> |
| <a name="Instruction-Formats"></a> |
| <h4 class="subsubsection">9.37.3.4 Instruction Formats</h4> |
| <a name="index-instruction-formats_002c-s390"></a> |
| <a name="index-s390-instruction-formats"></a> |
| |
| <p>The Principles of Operation manuals lists 26 instruction formats where |
| some of the formats have multiple variants. For the ‘<samp>.insn</samp>’ |
| pseudo directive the assembler recognizes some of the formats. |
| Typically, the most general variant of the instruction format is used |
| by the ‘<samp>.insn</samp>’ directive. |
| </p> |
| <p>The following table lists the abbreviations used in the table of |
| instruction formats: |
| </p> |
| <div class="display"> |
| <table> |
| <tr><td><pre class="display">OpCode / OpCd</pre></td><td><pre class="display">Part of the op code.</pre></td></tr> |
| <tr><td><pre class="display">Bx</pre></td><td><pre class="display">Base register number for operand x.</pre></td></tr> |
| <tr><td><pre class="display">Dx</pre></td><td><pre class="display">Displacement for operand x.</pre></td></tr> |
| <tr><td><pre class="display">DLx</pre></td><td><pre class="display">Displacement lower 12 bits for operand x.</pre></td></tr> |
| <tr><td><pre class="display">DHx</pre></td><td><pre class="display">Displacement higher 8-bits for operand x.</pre></td></tr> |
| <tr><td><pre class="display">Rx</pre></td><td><pre class="display">Register number for operand x.</pre></td></tr> |
| <tr><td><pre class="display">Xx</pre></td><td><pre class="display">Index register number for operand x.</pre></td></tr> |
| <tr><td><pre class="display">Ix</pre></td><td><pre class="display">Signed immediate for operand x.</pre></td></tr> |
| <tr><td><pre class="display">Ux</pre></td><td><pre class="display">Unsigned immediate for operand x.</pre></td></tr> |
| </table> |
| </div> |
| |
| <p>An instruction is two, four, or six bytes in length and must be aligned |
| on a 2 byte boundary. The first two bits of the instruction specify the |
| length of the instruction, 00 indicates a two byte instruction, 01 and 10 |
| indicates a four byte instruction, and 11 indicates a six byte instruction. |
| </p> |
| <p>The following table lists the s390 instruction formats that are available |
| with the ‘<samp>.insn</samp>’ pseudo directive: |
| </p> |
| <dl compact="compact"> |
| <dt><code>E format</code></dt> |
| <dd><pre class="verbatim">+-------------+ |
| | OpCode | |
| +-------------+ |
| 0 15 |
| </pre> |
| </dd> |
| <dt><code>RI format: <insn> R1,I2</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+------------------+ |
| | OpCode | R1 |OpCd| I2 | |
| +--------+----+----+------------------+ |
| 0 8 12 16 31 |
| </pre> |
| </dd> |
| <dt><code>RIE format: <insn> R1,R3,I2</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+------------------+--------+--------+ |
| | OpCode | R1 | R3 | I2 |////////| OpCode | |
| +--------+----+----+------------------+--------+--------+ |
| 0 8 12 16 32 40 47 |
| </pre> |
| </dd> |
| <dt><code>RIL format: <insn> R1,I2</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+------------------------------------+ |
| | OpCode | R1 |OpCd| I2 | |
| +--------+----+----+------------------------------------+ |
| 0 8 12 16 47 |
| </pre> |
| </dd> |
| <dt><code>RILU format: <insn> R1,U2</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+------------------------------------+ |
| | OpCode | R1 |OpCd| U2 | |
| +--------+----+----+------------------------------------+ |
| 0 8 12 16 47 |
| </pre> |
| </dd> |
| <dt><code>RIS format: <insn> R1,I2,M3,D4(B4)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+--------+--------+ |
| | OpCode | R1 | M3 | B4 | D4 | I2 | Opcode | |
| +--------+----+----+----+-------------+--------+--------+ |
| 0 8 12 16 20 32 36 47 |
| </pre> |
| </dd> |
| <dt><code>RR format: <insn> R1,R2</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+ |
| | OpCode | R1 | R2 | |
| +--------+----+----+ |
| 0 8 12 15 |
| </pre> |
| </dd> |
| <dt><code>RRE format: <insn> R1,R2</code></dt> |
| <dd><pre class="verbatim">+------------------+--------+----+----+ |
| | OpCode |////////| R1 | R2 | |
| +------------------+--------+----+----+ |
| 0 16 24 28 31 |
| </pre> |
| </dd> |
| <dt><code>RRF format: <insn> R1,R2,R3,M4</code></dt> |
| <dd><pre class="verbatim">+------------------+----+----+----+----+ |
| | OpCode | R3 | M4 | R1 | R2 | |
| +------------------+----+----+----+----+ |
| 0 16 20 24 28 31 |
| </pre> |
| </dd> |
| <dt><code>RRS format: <insn> R1,R2,M3,D4(B4)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+----+----+--------+ |
| | OpCode | R1 | R3 | B4 | D4 | M3 |////| OpCode | |
| +--------+----+----+----+-------------+----+----+--------+ |
| 0 8 12 16 20 32 36 40 47 |
| </pre> |
| </dd> |
| <dt><code>RS format: <insn> R1,R3,D2(B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+ |
| | OpCode | R1 | R3 | B2 | D2 | |
| +--------+----+----+----+-------------+ |
| 0 8 12 16 20 31 |
| </pre> |
| </dd> |
| <dt><code>RSE format: <insn> R1,R3,D2(B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+--------+--------+ |
| | OpCode | R1 | R3 | B2 | D2 |////////| OpCode | |
| +--------+----+----+----+-------------+--------+--------+ |
| 0 8 12 16 20 32 40 47 |
| </pre> |
| </dd> |
| <dt><code>RSI format: <insn> R1,R3,I2</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+------------------------------------+ |
| | OpCode | R1 | R3 | I2 | |
| +--------+----+----+------------------------------------+ |
| 0 8 12 16 47 |
| </pre> |
| </dd> |
| <dt><code>RSY format: <insn> R1,R3,D2(B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+--------+--------+ |
| | OpCode | R1 | R3 | B2 | DL2 | DH2 | OpCode | |
| +--------+----+----+----+-------------+--------+--------+ |
| 0 8 12 16 20 32 40 47 |
| </pre> |
| </dd> |
| <dt><code>RX format: <insn> R1,D2(X2,B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+ |
| | OpCode | R1 | X2 | B2 | D2 | |
| +--------+----+----+----+-------------+ |
| 0 8 12 16 20 31 |
| </pre> |
| </dd> |
| <dt><code>RXE format: <insn> R1,D2(X2,B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+--------+--------+ |
| | OpCode | R1 | X2 | B2 | D2 |////////| OpCode | |
| +--------+----+----+----+-------------+--------+--------+ |
| 0 8 12 16 20 32 40 47 |
| </pre> |
| </dd> |
| <dt><code>RXF format: <insn> R1,R3,D2(X2,B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+----+---+--------+ |
| | OpCode | R3 | X2 | B2 | D2 | R1 |///| OpCode | |
| +--------+----+----+----+-------------+----+---+--------+ |
| 0 8 12 16 20 32 36 40 47 |
| </pre> |
| </dd> |
| <dt><code>RXY format: <insn> R1,D2(X2,B2)</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+--------+--------+ |
| | OpCode | R1 | X2 | B2 | DL2 | DH2 | OpCode | |
| +--------+----+----+----+-------------+--------+--------+ |
| 0 8 12 16 20 32 36 40 47 |
| </pre> |
| </dd> |
| <dt><code>S format: <insn> D2(B2)</code></dt> |
| <dd><pre class="verbatim">+------------------+----+-------------+ |
| | OpCode | B2 | D2 | |
| +------------------+----+-------------+ |
| 0 16 20 31 |
| </pre> |
| </dd> |
| <dt><code>SI format: <insn> D1(B1),I2</code></dt> |
| <dd><pre class="verbatim">+--------+---------+----+-------------+ |
| | OpCode | I2 | B1 | D1 | |
| +--------+---------+----+-------------+ |
| 0 8 16 20 31 |
| </pre> |
| </dd> |
| <dt><code>SIY format: <insn> D1(B1),U2</code></dt> |
| <dd><pre class="verbatim">+--------+---------+----+-------------+--------+--------+ |
| | OpCode | I2 | B1 | DL1 | DH1 | OpCode | |
| +--------+---------+----+-------------+--------+--------+ |
| 0 8 16 20 32 36 40 47 |
| </pre> |
| </dd> |
| <dt><code>SIL format: <insn> D1(B1),I2</code></dt> |
| <dd><pre class="verbatim">+------------------+----+-------------+-----------------+ |
| | OpCode | B1 | D1 | I2 | |
| +------------------+----+-------------+-----------------+ |
| 0 16 20 32 47 |
| </pre> |
| </dd> |
| <dt><code>SS format: <insn> D1(R1,B1),D2(B3),R3</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+----+------------+ |
| | OpCode | R1 | R3 | B1 | D1 | B2 | D2 | |
| +--------+----+----+----+-------------+----+------------+ |
| 0 8 12 16 20 32 36 47 |
| </pre> |
| </dd> |
| <dt><code>SSE format: <insn> D1(B1),D2(B2)</code></dt> |
| <dd><pre class="verbatim">+------------------+----+-------------+----+------------+ |
| | OpCode | B1 | D1 | B2 | D2 | |
| +------------------+----+-------------+----+------------+ |
| 0 8 12 16 20 32 36 47 |
| </pre> |
| </dd> |
| <dt><code>SSF format: <insn> D1(B1),D2(B2),R3</code></dt> |
| <dd><pre class="verbatim">+--------+----+----+----+-------------+----+------------+ |
| | OpCode | R3 |OpCd| B1 | D1 | B2 | D2 | |
| +--------+----+----+----+-------------+----+------------+ |
| 0 8 12 16 20 32 36 47 |
| </pre> |
| </dd> |
| </dl> |
| |
| <p>For the complete list of all instruction format variants see the |
| Principles of Operation manuals. |
| </p> |
| <hr> |
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