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<title>Using the GNU Compiler Collection (GCC): TILE-Gx Built-in Functions</title>
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Next: <a href="TILEPro-Built_002din-Functions.html#TILEPro-Built_002din-Functions" accesskey="n" rel="next">TILEPro Built-in Functions</a>, Previous: <a href="TI-C6X-Built_002din-Functions.html#TI-C6X-Built_002din-Functions" accesskey="p" rel="prev">TI C6X Built-in Functions</a>, Up: <a href="Target-Builtins.html#Target-Builtins" accesskey="u" rel="up">Target Builtins</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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<a name="TILE_002dGx-Built_002din-Functions-1"></a>
<h4 class="subsection">6.57.30 TILE-Gx Built-in Functions</h4>
<p>GCC provides intrinsics to access every instruction of the TILE-Gx
processor. The intrinsics are of the form:
</p>
<div class="smallexample">
<pre class="smallexample">
unsigned long long __insn_<var>op</var> (...)
</pre></div>
<p>Where <var>op</var> is the name of the instruction. Refer to the ISA manual
for the complete list of instructions.
</p>
<p>GCC also provides intrinsics to directly access the network registers.
The intrinsics are:
</p>
<div class="smallexample">
<pre class="smallexample">
unsigned long long __tile_idn0_receive (void)
unsigned long long __tile_idn1_receive (void)
unsigned long long __tile_udn0_receive (void)
unsigned long long __tile_udn1_receive (void)
unsigned long long __tile_udn2_receive (void)
unsigned long long __tile_udn3_receive (void)
void __tile_idn_send (unsigned long long)
void __tile_udn_send (unsigned long long)
</pre></div>
<p>The intrinsic <code>void __tile_network_barrier (void)</code> is used to
guarantee that no network operations before it are reordered with
those after it.
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