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| <h3 class="section">6.53 x86 specific memory model extensions for transactional memory</h3> |
| |
| <p>The i386 architecture supports additional memory ordering flags |
| to mark lock critical sections for hardware lock elision. |
| These must be specified in addition to an existing memory model to |
| atomic intrinsics. |
| </p> |
| <dl compact="compact"> |
| <dt><code>__ATOMIC_HLE_ACQUIRE</code></dt> |
| <dd><p>Start lock elision on a lock variable. |
| Memory model must be <code>__ATOMIC_ACQUIRE</code> or stronger. |
| </p></dd> |
| <dt><code>__ATOMIC_HLE_RELEASE</code></dt> |
| <dd><p>End lock elision on a lock variable. |
| Memory model must be <code>__ATOMIC_RELEASE</code> or stronger. |
| </p></dd> |
| </dl> |
| |
| <p>When a lock acquire fails it is required for good performance to abort |
| the transaction quickly. This can be done with a <code>_mm_pause</code> |
| </p> |
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| <pre class="smallexample">#include <immintrin.h> // For _mm_pause |
| |
| int lockvar; |
| |
| /* Acquire lock with lock elision */ |
| while (__atomic_exchange_n(&lockvar, 1, __ATOMIC_ACQUIRE|__ATOMIC_HLE_ACQUIRE)) |
| _mm_pause(); /* Abort failed transaction */ |
| ... |
| /* Free lock with lock elision */ |
| __atomic_store_n(&lockvar, 0, __ATOMIC_RELEASE|__ATOMIC_HLE_RELEASE); |
| </pre></div> |
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