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| <title>Debugging with GDB: PowerPC Features</title> |
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| Next: <a href="S_002f390-and-System-z-Features.html#S_002f390-and-System-z-Features" accesskey="n" rel="next">S/390 and System z Features</a>, Previous: <a href="Nios-II-Features.html#Nios-II-Features" accesskey="p" rel="prev">Nios II Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p> |
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| <a name="PowerPC-Features-1"></a> |
| <h4 class="subsection">G.4.8 PowerPC Features</h4> |
| <a name="index-target-descriptions_002c-PowerPC-features"></a> |
| |
| <p>The ‘<samp>org.gnu.gdb.power.core</samp>’ feature is required for PowerPC |
| targets. It should contain registers ‘<samp>r0</samp>’ through ‘<samp>r31</samp>’, |
| ‘<samp>pc</samp>’, ‘<samp>msr</samp>’, ‘<samp>cr</samp>’, ‘<samp>lr</samp>’, ‘<samp>ctr</samp>’, and |
| ‘<samp>xer</samp>’. They may be 32-bit or 64-bit depending on the target. |
| </p> |
| <p>The ‘<samp>org.gnu.gdb.power.fpu</samp>’ feature is optional. It should |
| contain registers ‘<samp>f0</samp>’ through ‘<samp>f31</samp>’ and ‘<samp>fpscr</samp>’. |
| </p> |
| <p>The ‘<samp>org.gnu.gdb.power.altivec</samp>’ feature is optional. It should |
| contain registers ‘<samp>vr0</samp>’ through ‘<samp>vr31</samp>’, ‘<samp>vscr</samp>’, |
| and ‘<samp>vrsave</samp>’. |
| </p> |
| <p>The ‘<samp>org.gnu.gdb.power.vsx</samp>’ feature is optional. It should |
| contain registers ‘<samp>vs0h</samp>’ through ‘<samp>vs31h</samp>’. <small>GDB</small> |
| will combine these registers with the floating point registers |
| (‘<samp>f0</samp>’ through ‘<samp>f31</samp>’) and the altivec registers (‘<samp>vr0</samp>’ |
| through ‘<samp>vr31</samp>’) to present the 128-bit wide registers ‘<samp>vs0</samp>’ |
| through ‘<samp>vs63</samp>’, the set of vector registers for POWER7. |
| </p> |
| <p>The ‘<samp>org.gnu.gdb.power.spe</samp>’ feature is optional. It should |
| contain registers ‘<samp>ev0h</samp>’ through ‘<samp>ev31h</samp>’, ‘<samp>acc</samp>’, and |
| ‘<samp>spefscr</samp>’. SPE targets should provide 32-bit registers in |
| ‘<samp>org.gnu.gdb.power.core</samp>’ and provide the upper halves in |
| ‘<samp>ev0h</samp>’ through ‘<samp>ev31h</samp>’. <small>GDB</small> will combine |
| these to present registers ‘<samp>ev0</samp>’ through ‘<samp>ev31</samp>’ to the |
| user. |
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