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 <body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
 <a name="ARC-Directives"></a>
 <div class="header">
 <p>
 Next: <a href="ARC-Opcodes.html#ARC-Opcodes" accesskey="n" rel="next">ARC Opcodes</a>, Previous: <a href="ARC-Floating-Point.html#ARC-Floating-Point" accesskey="p" rel="prev">ARC Floating Point</a>, Up: <a href="ARC_002dDependent.html#ARC_002dDependent" accesskey="u" rel="up">ARC-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
 </div>
 <hr>
 <a name="ARC-Machine-Directives"></a>
 <h4 class="subsection">9.3.4 ARC Machine Directives</h4>

 <a name="index-machine-directives_002c-ARC"></a>
 <a name="index-ARC-machine-directives"></a>
 <p>The ARC version of <code>as</code> supports the following additional
 machine directives:
 </p>
 <dl compact="compact">
 <dd>
 <a name="index-2byte-directive_002c-ARC"></a>
 </dd>
 <dt><code>.2byte <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 <a name="index-3byte-directive_002c-ARC"></a>
 </dd>
 <dt><code>.3byte <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 <a name="index-4byte-directive_002c-ARC"></a>
 </dd>
 <dt><code>.4byte <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 <a name="index-extAuxRegister-directive_002c-ARC"></a>
 </dd>
 <dt><code>.extAuxRegister <var>name</var>,<var>address</var>,<var>mode</var></code></dt>
 <dd><p>The ARCtangent A4 has extensible auxiliary register space.  The
 auxiliary registers can be defined in the assembler source code by
 using this directive.  The first parameter is the <var>name</var> of the
 new auxiallry register.  The second parameter is the <var>address</var> of
 the register in the auxiliary register memory map for the variant of
 the ARC.  The third parameter specifies the <var>mode</var> in which the
 register can be operated is and it can be one of:
 </p>
 <dl compact="compact">
 <dt><code>r          (readonly)</code></dt>
 <dt><code>w          (write only)</code></dt>
 <dt><code>r|w        (read or write)</code></dt>
 </dl>

 <p>For example:
 </p>
 <div class="smallexample">
 <pre class="smallexample">  .extAuxRegister mulhi,0x12,w
 </pre></div>

 <p>This specifies an extension auxiliary register called <em>mulhi</em>
 which is at address 0x12 in the memory space and which is only
 writable.
 </p>
 <a name="index-extCondCode-directive_002c-ARC"></a>
 </dd>
 <dt><code>.extCondCode <var>suffix</var>,<var>value</var></code></dt>
 <dd><p>The condition codes on the ARCtangent A4 are extensible and can be
 specified by means of this assembler directive.  They are specified
 by the suffix and the value for the condition code.  They can be used to
 specify extra condition codes with any values.  For example:
 </p>
 <div class="smallexample">
 <pre class="smallexample">  .extCondCode is_busy,0x14

    add.is_busy  r1,r2,r3
    bis_busy     _main
 </pre></div>

 <a name="index-extCoreRegister-directive_002c-ARC"></a>
 </dd>
 <dt><code>.extCoreRegister <var>name</var>,<var>regnum</var>,<var>mode</var>,<var>shortcut</var></code></dt>
 <dd><p>Specifies an extension core register <var>name</var> for the application.
 This allows a register <var>name</var> with a valid <var>regnum</var> between 0
 and 60, with the following as valid values for <var>mode</var>
 </p>
 <dl compact="compact">
 <dt>&lsquo;<samp><em>r</em>   (readonly)</samp>&rsquo;</dt>
 <dt>&lsquo;<samp><em>w</em>   (write only)</samp>&rsquo;</dt>
 <dt>&lsquo;<samp><em>r|w</em> (read or write)</samp>&rsquo;</dt>
 </dl>


 <p>The other parameter gives a description of the register having a
 <var>shortcut</var> in the pipeline.  The valid values are:
 </p>
 <dl compact="compact">
 <dt><code>can_shortcut</code></dt>
 <dt><code>cannot_shortcut</code></dt>
 </dl>

 <p>For example:
 </p>
 <div class="smallexample">
 <pre class="smallexample">  .extCoreRegister mlo,57,r,can_shortcut
 </pre></div>

 <p>This defines an extension core register mlo with the value 57 which
 can shortcut the pipeline.
 </p>
 <a name="index-extInstruction-directive_002c-ARC"></a>
 </dd>
 <dt><code>.extInstruction <var>name</var>,<var>opcode</var>,<var>subopcode</var>,<var>suffixclass</var>,<var>syntaxclass</var></code></dt>
 <dd><p>The ARCtangent A4 allows the user to specify extension instructions.
 The extension instructions are not macros.  The assembler creates
 encodings for use of these instructions according to the specification
 by the user.  The parameters are:
 </p>
 <ul>
 <li> <var>name</var>
 Name of the extension instruction

 </li><li> <var>opcode</var>
 Opcode to be used. (Bits 27:31 in the encoding).  Valid values
 0x10-0x1f or 0x03

 </li><li> <var>subopcode</var>
 Subopcode to be used.  Valid values are from 0x09-0x3f.  However the
 correct value also depends on <var>syntaxclass</var>

 </li><li> <var>suffixclass</var>
 Determines the kinds of suffixes to be allowed.  Valid values are
 <code>SUFFIX_NONE</code>, <code>SUFFIX_COND</code>,
 <code>SUFFIX_FLAG</code> which indicates the absence or presence of
 conditional suffixes and flag setting by the extension instruction.
 It is also possible to specify that an instruction sets the flags and
 is conditional by using <code>SUFFIX_CODE</code> | <code>SUFFIX_FLAG</code>.

 </li><li> <var>syntaxclass</var>
 Determines the syntax class for the instruction.  It can have the
 following values:

 <dl compact="compact">
 <dt><code><code>SYNTAX_2OP</code>:</code></dt>
 <dd><p>2 Operand Instruction
 </p></dd>
 <dt><code><code>SYNTAX_3OP</code>:</code></dt>
 <dd><p>3 Operand Instruction
 </p></dd>
 </dl>

 <p>In addition there could be modifiers for the syntax class as described
 below:
 </p>
 <ul class="no-bullet">
 <li>Syntax Class Modifiers are:

 </li><li>- <code>OP1_MUST_BE_IMM</code>:
 Modifies syntax class SYNTAX_3OP,  specifying that the first operand
 of a three-operand instruction must be an immediate (i.e., the result
 is discarded).  OP1_MUST_BE_IMM is used by bitwise ORing it with
 SYNTAX_3OP as given in the example below.  This could usually be used
 to set the flags using specific instructions and not retain results.

 </li><li>- <code>OP1_IMM_IMPLIED</code>:
 Modifies syntax class SYNTAX_20P, it specifies that there is an
 implied immediate destination operand which does not appear in the
 syntax.  For example, if the source code contains an instruction like:

 <div class="smallexample">
 <pre class="smallexample">inst r1,r2
 </pre></div>

 <p>it really means that the first argument is an implied immediate (that
 is, the result is discarded).  This is the same as though the source
 code were: inst 0,r1,r2.  You use OP1_IMM_IMPLIED by bitwise ORing it
 with SYNTAX_20P.
 </p>
 </li></ul>
 </li></ul>

 <p>For example, defining 64-bit multiplier with immediate operands:
 </p>
 <div class="smallexample">
 <pre class="smallexample">.extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
                 SYNTAX_3OP|OP1_MUST_BE_IMM
 </pre></div>

 <p>The above specifies an extension instruction called mp64 which has 3 operands,
 sets the flags, can be used with a condition code, for which the
 first operand is an immediate.  (Equivalent to discarding the result
 of the operation).
 </p>
 <div class="smallexample">
 <pre class="smallexample"> .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
 </pre></div>

 <p>This describes a 2 operand instruction with an implicit first
 immediate operand.  The result of this operation would be discarded.
 </p>
 <a name="index-half-directive_002c-ARC"></a>
 </dd>
 <dt><code>.half <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 <a name="index-long-directive_002c-ARC"></a>
 </dd>
 <dt><code>.long <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 <a name="index-option-directive_002c-ARC"></a>
 </dd>
 <dt><code>.option <var>arc|arc5|arc6|arc7|arc8</var></code></dt>
 <dd><p>The <code>.option</code> directive must be followed by the desired core
 version. Again <code>arc</code> is an alias for
 <code>arc6</code>.
 </p>
 <p>Note: the <code>.option</code> directive overrides the command line option
 <code>-marc</code>; a warning is emitted when the version is not consistent
 between the two - even for the implicit default core version
 (arc6).
 </p>
 <a name="index-short-directive_002c-ARC"></a>
 </dd>
 <dt><code>.short <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 <a name="index-word-directive_002c-ARC"></a>
 </dd>
 <dt><code>.word <var>expressions</var></code></dt>
 <dd><p>*TODO*
 </p>
 </dd>
 </dl>


 <hr>
 <div class="header">
 <p>
 Next: <a href="ARC-Opcodes.html#ARC-Opcodes" accesskey="n" rel="next">ARC Opcodes</a>, Previous: <a href="ARC-Floating-Point.html#ARC-Floating-Point" accesskey="p" rel="prev">ARC Floating Point</a>, Up: <a href="ARC_002dDependent.html#ARC_002dDependent" accesskey="u" rel="up">ARC-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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	<a name="ARC-Directives"></a>
	<div class="header">
	<p>
	Next: <a href="ARC-Opcodes.html#ARC-Opcodes" accesskey="n" rel="next">ARC Opcodes</a>, Previous: <a href="ARC-Floating-Point.html#ARC-Floating-Point" accesskey="p" rel="prev">ARC Floating Point</a>, Up: <a href="ARC_002dDependent.html#ARC_002dDependent" accesskey="u" rel="up">ARC-Dependent</a>   [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
	</div>
	<hr>
	<a name="ARC-Machine-Directives"></a>
	<h4 class="subsection">9.3.4 ARC Machine Directives</h4>

	<a name="index-machine-directives_002c-ARC"></a>
	<a name="index-ARC-machine-directives"></a>
	<p>The ARC version of <code>as</code> supports the following additional
	machine directives:
	</p>
	<dl compact="compact">
	<dd>
	<a name="index-2byte-directive_002c-ARC"></a>
	</dd>
	<dt><code>.2byte <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	<a name="index-3byte-directive_002c-ARC"></a>
	</dd>
	<dt><code>.3byte <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	<a name="index-4byte-directive_002c-ARC"></a>
	</dd>
	<dt><code>.4byte <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	<a name="index-extAuxRegister-directive_002c-ARC"></a>
	</dd>
	<dt><code>.extAuxRegister <var>name</var>,<var>address</var>,<var>mode</var></code></dt>
	<dd><p>The ARCtangent A4 has extensible auxiliary register space. The
	auxiliary registers can be defined in the assembler source code by
	using this directive. The first parameter is the <var>name</var> of the
	new auxiallry register. The second parameter is the <var>address</var> of
	the register in the auxiliary register memory map for the variant of
	the ARC. The third parameter specifies the <var>mode</var> in which the
	register can be operated is and it can be one of:
	</p>
	<dl compact="compact">
	<dt><code>r (readonly)</code></dt>
	<dt><code>w (write only)</code></dt>
	<dt><code>r\|w (read or write)</code></dt>
	</dl>

	<p>For example:
	</p>
	<div class="smallexample">
	<pre class="smallexample"> .extAuxRegister mulhi,0x12,w
	</pre></div>

	<p>This specifies an extension auxiliary register called <em>mulhi</em>
	which is at address 0x12 in the memory space and which is only
	writable.
	</p>
	<a name="index-extCondCode-directive_002c-ARC"></a>
	</dd>
	<dt><code>.extCondCode <var>suffix</var>,<var>value</var></code></dt>
	<dd><p>The condition codes on the ARCtangent A4 are extensible and can be
	specified by means of this assembler directive. They are specified
	by the suffix and the value for the condition code. They can be used to
	specify extra condition codes with any values. For example:
	</p>
	<div class="smallexample">
	<pre class="smallexample"> .extCondCode is_busy,0x14

	add.is_busy r1,r2,r3
	bis_busy _main
	</pre></div>

	<a name="index-extCoreRegister-directive_002c-ARC"></a>
	</dd>
	<dt><code>.extCoreRegister <var>name</var>,<var>regnum</var>,<var>mode</var>,<var>shortcut</var></code></dt>
	<dd><p>Specifies an extension core register <var>name</var> for the application.
	This allows a register <var>name</var> with a valid <var>regnum</var> between 0
	and 60, with the following as valid values for <var>mode</var>
	</p>
	<dl compact="compact">
	<dt>‘<samp><em>r</em> (readonly)</samp>’</dt>
	<dt>‘<samp><em>w</em> (write only)</samp>’</dt>
	<dt>‘<samp><em>r\|w</em> (read or write)</samp>’</dt>
	</dl>


	<p>The other parameter gives a description of the register having a
	<var>shortcut</var> in the pipeline. The valid values are:
	</p>
	<dl compact="compact">
	<dt><code>can_shortcut</code></dt>
	<dt><code>cannot_shortcut</code></dt>
	</dl>

	<p>For example:
	</p>
	<div class="smallexample">
	<pre class="smallexample"> .extCoreRegister mlo,57,r,can_shortcut
	</pre></div>

	<p>This defines an extension core register mlo with the value 57 which
	can shortcut the pipeline.
	</p>
	<a name="index-extInstruction-directive_002c-ARC"></a>
	</dd>
	<dt><code>.extInstruction <var>name</var>,<var>opcode</var>,<var>subopcode</var>,<var>suffixclass</var>,<var>syntaxclass</var></code></dt>
	<dd><p>The ARCtangent A4 allows the user to specify extension instructions.
	The extension instructions are not macros. The assembler creates
	encodings for use of these instructions according to the specification
	by the user. The parameters are:
	</p>
	<ul>
	<li> <var>name</var>
	Name of the extension instruction

	</li><li> <var>opcode</var>
	Opcode to be used. (Bits 27:31 in the encoding). Valid values
	0x10-0x1f or 0x03

	</li><li> <var>subopcode</var>
	Subopcode to be used. Valid values are from 0x09-0x3f. However the
	correct value also depends on <var>syntaxclass</var>

	</li><li> <var>suffixclass</var>
	Determines the kinds of suffixes to be allowed. Valid values are
	<code>SUFFIX_NONE</code>, <code>SUFFIX_COND</code>,
	<code>SUFFIX_FLAG</code> which indicates the absence or presence of
	conditional suffixes and flag setting by the extension instruction.
	It is also possible to specify that an instruction sets the flags and
	is conditional by using <code>SUFFIX_CODE</code> \| <code>SUFFIX_FLAG</code>.

	</li><li> <var>syntaxclass</var>
	Determines the syntax class for the instruction. It can have the
	following values:

	<dl compact="compact">
	<dt><code><code>SYNTAX_2OP</code>:</code></dt>
	<dd><p>2 Operand Instruction
	</p></dd>
	<dt><code><code>SYNTAX_3OP</code>:</code></dt>
	<dd><p>3 Operand Instruction
	</p></dd>
	</dl>

	<p>In addition there could be modifiers for the syntax class as described
	below:
	</p>
	<ul class="no-bullet">
	<li>Syntax Class Modifiers are:

	</li><li>- <code>OP1_MUST_BE_IMM</code>:
	Modifies syntax class SYNTAX_3OP, specifying that the first operand
	of a three-operand instruction must be an immediate (i.e., the result
	is discarded). OP1_MUST_BE_IMM is used by bitwise ORing it with
	SYNTAX_3OP as given in the example below. This could usually be used
	to set the flags using specific instructions and not retain results.

	</li><li>- <code>OP1_IMM_IMPLIED</code>:
	Modifies syntax class SYNTAX_20P, it specifies that there is an
	implied immediate destination operand which does not appear in the
	syntax. For example, if the source code contains an instruction like:

	<div class="smallexample">
	<pre class="smallexample">inst r1,r2
	</pre></div>

	<p>it really means that the first argument is an implied immediate (that
	is, the result is discarded). This is the same as though the source
	code were: inst 0,r1,r2. You use OP1_IMM_IMPLIED by bitwise ORing it
	with SYNTAX_20P.
	</p>
	</li></ul>
	</li></ul>

	<p>For example, defining 64-bit multiplier with immediate operands:
	</p>
	<div class="smallexample">
	<pre class="smallexample">.extInstruction mp64,0x14,0x0,SUFFIX_COND \| SUFFIX_FLAG ,
	SYNTAX_3OP\|OP1_MUST_BE_IMM
	</pre></div>

	<p>The above specifies an extension instruction called mp64 which has 3 operands,
	sets the flags, can be used with a condition code, for which the
	first operand is an immediate. (Equivalent to discarding the result
	of the operation).
	</p>
	<div class="smallexample">
	<pre class="smallexample"> .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP\|OP1_IMM_IMPLIED
	</pre></div>

	<p>This describes a 2 operand instruction with an implicit first
	immediate operand. The result of this operation would be discarded.
	</p>
	<a name="index-half-directive_002c-ARC"></a>
	</dd>
	<dt><code>.half <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	<a name="index-long-directive_002c-ARC"></a>
	</dd>
	<dt><code>.long <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	<a name="index-option-directive_002c-ARC"></a>
	</dd>
	<dt><code>.option <var>arc\|arc5\|arc6\|arc7\|arc8</var></code></dt>
	<dd><p>The <code>.option</code> directive must be followed by the desired core
	version. Again <code>arc</code> is an alias for
	<code>arc6</code>.
	</p>
	<p>Note: the <code>.option</code> directive overrides the command line option
	<code>-marc</code>; a warning is emitted when the version is not consistent
	between the two - even for the implicit default core version
	(arc6).
	</p>
	<a name="index-short-directive_002c-ARC"></a>
	</dd>
	<dt><code>.short <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	<a name="index-word-directive_002c-ARC"></a>
	</dd>
	<dt><code>.word <var>expressions</var></code></dt>
	<dd><p>TODO
	</p>
	</dd>
	</dl>


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