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| <a name="Visium-Options-1"></a> |
| <h4 class="subsection">3.17.50 Visium Options</h4> |
| <a name="index-Visium-options"></a> |
| |
| <dl compact="compact"> |
| <dt><code>-mdebug</code></dt> |
| <dd><a name="index-mdebug-2"></a> |
| <p>A program which performs file I/O and is destined to run on an MCM target |
| should be linked with this option. It causes the libraries libc.a and |
| libdebug.a to be linked. The program should be run on the target under |
| the control of the GDB remote debugging stub. |
| </p> |
| </dd> |
| <dt><code>-msim</code></dt> |
| <dd><a name="index-msim-9"></a> |
| <p>A program which performs file I/O and is destined to run on the simulator |
| should be linked with option. This causes libraries libc.a and libsim.a to |
| be linked. |
| </p> |
| </dd> |
| <dt><code>-mfpu</code></dt> |
| <dt><code>-mhard-float</code></dt> |
| <dd><a name="index-mfpu-4"></a> |
| <a name="index-mhard_002dfloat-8"></a> |
| <p>Generate code containing floating-point instructions. This is the |
| default. |
| </p> |
| </dd> |
| <dt><code>-mno-fpu</code></dt> |
| <dt><code>-msoft-float</code></dt> |
| <dd><a name="index-mno_002dfpu-1"></a> |
| <a name="index-msoft_002dfloat-12"></a> |
| <p>Generate code containing library calls for floating-point. |
| </p> |
| <p><samp>-msoft-float</samp> changes the calling convention in the output file; |
| therefore, it is only useful if you compile <em>all</em> of a program with |
| this option. In particular, you need to compile <samp>libgcc.a</samp>, the |
| library that comes with GCC, with <samp>-msoft-float</samp> in order for |
| this to work. |
| </p> |
| </dd> |
| <dt><code>-mcpu=<var>cpu_type</var></code></dt> |
| <dd><a name="index-mcpu-13"></a> |
| <p>Set the instruction set, register set, and instruction scheduling parameters |
| for machine type <var>cpu_type</var>. Supported values for <var>cpu_type</var> are |
| ‘<samp>mcm</samp>’, ‘<samp>gr5</samp>’ and ‘<samp>gr6</samp>’. |
| </p> |
| <p>‘<samp>mcm</samp>’ is a synonym of ‘<samp>gr5</samp>’ present for backward compatibility. |
| </p> |
| <p>By default (unless configured otherwise), GCC generates code for the GR5 |
| variant of the Visium architecture. |
| </p> |
| <p>With <samp>-mcpu=gr6</samp>, GCC generates code for the GR6 variant of the Visium |
| architecture. The only difference from GR5 code is that the compiler will |
| generate block move instructions. |
| </p> |
| </dd> |
| <dt><code>-mtune=<var>cpu_type</var></code></dt> |
| <dd><a name="index-mtune-13"></a> |
| <p>Set the instruction scheduling parameters for machine type <var>cpu_type</var>, |
| but do not set the instruction set or register set that the option |
| <samp>-mcpu=<var>cpu_type</var></samp> would. |
| </p> |
| </dd> |
| <dt><code>-msv-mode</code></dt> |
| <dd><a name="index-msv_002dmode"></a> |
| <p>Generate code for the supervisor mode, where there are no restrictions on |
| the access to general registers. This is the default. |
| </p> |
| </dd> |
| <dt><code>-muser-mode</code></dt> |
| <dd><a name="index-muser_002dmode-1"></a> |
| <p>Generate code for the user mode, where the access to some general registers |
| is forbidden: on the GR5, registers r24 to r31 cannot be accessed in this |
| mode; on the GR6, only registers r29 to r31 are affected. |
| </p></dd> |
| </dl> |
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