| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2020 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_ROT0_QM_AXUSER_NONSECURED_REGS_H_ |
| #define ASIC_REG_ROT0_QM_AXUSER_NONSECURED_REGS_H_ |
| |
| /* |
| ***************************************** |
| * ROT0_QM_AXUSER_NONSECURED |
| * (Prototype: AXUSER) |
| ***************************************** |
| */ |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_ASID 0x4E0AB80 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_MMU_BP 0x4E0AB84 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_STRONG_ORDER 0x4E0AB88 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_NO_SNOOP 0x4E0AB8C |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_WR_REDUCTION 0x4E0AB90 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_RD_ATOMIC 0x4E0AB94 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_QOS 0x4E0AB98 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_RSVD 0x4E0AB9C |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_EMEM_CPAGE 0x4E0ABA0 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_CORE 0x4E0ABA4 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_E2E_COORD 0x4E0ABA8 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_WR_OVRD_LO 0x4E0ABB0 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_WR_OVRD_HI 0x4E0ABB4 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_RD_OVRD_LO 0x4E0ABB8 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_HB_RD_OVRD_HI 0x4E0ABBC |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_LB_COORD 0x4E0ABC0 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_LB_LOCK 0x4E0ABC4 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_LB_RSVD 0x4E0ABC8 |
| |
| #define mmROT0_QM_AXUSER_NONSECURED_LB_OVRD 0x4E0ABCC |
| |
| #endif /* ASIC_REG_ROT0_QM_AXUSER_NONSECURED_REGS_H_ */ |
