Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Thomas Petazzoni | f6e916b | 2012-11-20 23:00:52 +0100 | [diff] [blame] | 2 | obj-$(CONFIG_IRQCHIP) += irqchip.o |
| 3 | |
Talel Shenhar | 1eb77c3 | 2019-06-10 11:34:43 +0300 | [diff] [blame] | 4 | obj-$(CONFIG_AL_FIC) += irq-al-fic.o |
Antoine Tenart | e6b78f2 | 2016-02-19 16:22:44 +0100 | [diff] [blame] | 5 | obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o |
Alban Bedel | 81ffb18 | 2016-01-23 13:57:47 +0100 | [diff] [blame] | 6 | obj-$(CONFIG_ATH79) += irq-ath79-cpu.o |
Alban Bedel | 07ba4b0 | 2016-01-23 13:57:46 +0100 | [diff] [blame] | 7 | obj-$(CONFIG_ATH79) += irq-ath79-misc.o |
Viresh Kumar | df1590d | 2012-11-12 22:56:03 +0530 | [diff] [blame] | 8 | obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o |
Eric Anholt | 1a15aaa | 2015-08-06 16:00:33 -0700 | [diff] [blame] | 9 | obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o |
Cristian Ciocaltea | 27e9e55 | 2020-09-14 23:27:18 +0300 | [diff] [blame] | 10 | obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o |
Bartosz Golaszewski | 0fc3d74 | 2019-02-14 15:52:30 +0100 | [diff] [blame] | 11 | obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o |
Hyunki Koo | b74416d | 2019-12-25 06:11:07 +0900 | [diff] [blame] | 12 | obj-$(CONFIG_EXYNOS_IRQ_COMBINER) += exynos-combiner.o |
Linus Walleij | 6ee532e | 2017-03-18 17:53:24 +0100 | [diff] [blame] | 13 | obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o |
Haojian Zhuang | 8e4bebe | 2014-08-07 18:51:34 +0800 | [diff] [blame] | 14 | obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o |
Vladimir Zapolskiy | 8cb17b5 | 2016-04-25 04:00:38 +0300 | [diff] [blame] | 15 | obj-$(CONFIG_ARCH_LPC32XX) += irq-lpc32xx.o |
Haojian Zhuang | c052d13 | 2013-04-21 13:21:48 +0800 | [diff] [blame] | 16 | obj-$(CONFIG_ARCH_MMP) += irq-mmp.o |
Oleksij Rempel | 7e4ac67 | 2015-10-12 21:15:34 +0200 | [diff] [blame] | 17 | obj-$(CONFIG_IRQ_MXS) += irq-mxs.o |
Marc Zyngier | de3ce08 | 2015-03-11 15:42:59 +0000 | [diff] [blame] | 18 | obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o |
Sebastian Hesselbarth | 350d71b9 | 2013-09-09 14:01:20 +0200 | [diff] [blame] | 19 | obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o |
Alexander Shiyan | afc98d9 | 2014-02-02 12:07:46 +0400 | [diff] [blame] | 20 | obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o |
Stafford Horne | 9b54470 | 2017-10-30 21:38:35 +0900 | [diff] [blame] | 21 | obj-$(CONFIG_OMPIC) += irq-ompic.o |
Stefan Kristiansson | 4db8e6d | 2014-05-26 23:31:42 +0300 | [diff] [blame] | 22 | obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o |
Sebastian Hesselbarth | 9dbd90f | 2013-06-06 18:27:09 +0200 | [diff] [blame] | 23 | obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o |
Felipe Balbi | 8598066c | 2014-09-15 16:15:02 -0500 | [diff] [blame] | 24 | obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o |
Samuel Holland | d421fd6 | 2022-05-08 22:49:41 -0500 | [diff] [blame] | 25 | obj-$(CONFIG_SUN4I_INTC) += irq-sun4i.o |
| 26 | obj-$(CONFIG_SUN6I_R_INTC) += irq-sun6i-r.o |
| 27 | obj-$(CONFIG_SUNXI_NMI_INTC) += irq-sunxi-nmi.o |
Viresh Kumar | df1590d | 2012-11-12 22:56:03 +0530 | [diff] [blame] | 28 | obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o |
Marc Zyngier | d51d0af | 2014-06-30 16:01:30 +0100 | [diff] [blame] | 29 | obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o |
Jon Hunter | 9c8eddd | 2016-06-07 16:12:34 +0100 | [diff] [blame] | 30 | obj-$(CONFIG_ARM_GIC_PM) += irq-gic-pm.o |
Linus Walleij | 8f2c006 | 2016-08-10 14:30:35 +0200 | [diff] [blame] | 31 | obj-$(CONFIG_ARCH_REALVIEW) += irq-gic-realview.o |
Suravee Suthikulpanit | 853a33c | 2014-11-25 18:47:22 +0000 | [diff] [blame] | 32 | obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o |
Marc Zyngier | 5052875 | 2018-05-08 13:14:36 +0100 | [diff] [blame] | 33 | obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-v3-mbi.o irq-gic-common.o |
Marc Zyngier | 29f4113 | 2017-11-13 17:25:59 +0000 | [diff] [blame] | 34 | obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o |
| 35 | obj-$(CONFIG_ARM_GIC_V3_ITS_PCI) += irq-gic-v3-its-pci-msi.o |
Bogdan Purcareata | 7afe031 | 2018-02-05 08:07:43 -0600 | [diff] [blame] | 36 | obj-$(CONFIG_ARM_GIC_V3_ITS_FSL_MC) += irq-gic-v3-its-fsl-mc-msi.o |
Marc Zyngier | 9e2c986 | 2016-04-11 09:57:53 +0100 | [diff] [blame] | 37 | obj-$(CONFIG_PARTITION_PERCPU) += irq-partition-percpu.o |
Ma Jun | 717c3db | 2015-12-17 19:56:35 +0800 | [diff] [blame] | 38 | obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o |
Uwe Kleine-König | 292ec08 | 2013-06-26 09:18:48 +0200 | [diff] [blame] | 39 | obj-$(CONFIG_ARM_NVIC) += irq-nvic.o |
Rob Herring | 44430ec | 2012-10-27 17:25:26 -0500 | [diff] [blame] | 40 | obj-$(CONFIG_ARM_VIC) += irq-vic.o |
Thomas Petazzoni | fed6d33 | 2016-02-10 15:46:56 +0100 | [diff] [blame] | 41 | obj-$(CONFIG_ARMADA_370_XP_IRQ) += irq-armada-370-xp.o |
Boris BREZILLON | b1479eb | 2014-07-10 19:14:18 +0200 | [diff] [blame] | 42 | obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o |
| 43 | obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o |
Ralf Baechle | 0509cfd | 2015-07-08 14:46:08 +0200 | [diff] [blame] | 44 | obj-$(CONFIG_I8259) += irq-i8259.o |
James Hogan | b6ef916 | 2013-04-22 15:43:50 +0100 | [diff] [blame] | 45 | obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o |
Ralf Baechle | 67e38cf | 2015-05-26 18:20:06 +0200 | [diff] [blame] | 46 | obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o |
Linus Walleij | 5b978c1 | 2019-01-25 16:41:25 +0100 | [diff] [blame] | 47 | obj-$(CONFIG_IXP4XX_IRQ) += irq-ixp4xx.o |
Rich Felker | 981b58f | 2016-08-04 04:30:37 +0000 | [diff] [blame] | 48 | obj-$(CONFIG_JCORE_AIC) += irq-jcore-aic.o |
Manivannan Sadhasivam | d852e62 | 2018-12-10 23:05:43 +0530 | [diff] [blame] | 49 | obj-$(CONFIG_RDA_INTC) += irq-rda-intc.o |
Magnus Damm | 4435804 | 2013-02-18 23:28:34 +0900 | [diff] [blame] | 50 | obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o |
Magnus Damm | fbc83b7 | 2013-02-27 17:15:01 +0900 | [diff] [blame] | 51 | obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o |
Geert Uytterhoeven | a644ccb | 2019-05-27 14:17:11 +0200 | [diff] [blame] | 52 | obj-$(CONFIG_RENESAS_RZA1_IRQC) += irq-renesas-rza1.o |
Lad Prabhakar | 3fed095 | 2022-07-07 19:23:11 +0100 | [diff] [blame] | 53 | obj-$(CONFIG_RENESAS_RZG2L_IRQC) += irq-renesas-rzg2l.o |
Rob Herring | 81243e4 | 2012-11-20 21:21:40 -0600 | [diff] [blame] | 54 | obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o |
Daniel Tang | 397e7b5 | 2013-12-05 17:12:17 +1100 | [diff] [blame] | 55 | obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o |
Tony Prisk | 06ff14c | 2013-03-24 01:12:25 +0000 | [diff] [blame] | 56 | obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o |
Lee Jones | 0708848 | 2015-02-18 15:13:58 +0000 | [diff] [blame] | 57 | obj-$(CONFIG_ST_IRQCHIP) += irq-st.o |
Christian Ruppert | b06eb01 | 2013-06-25 18:29:57 +0200 | [diff] [blame] | 58 | obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o |
Damien Riegel | d01f863 | 2015-12-21 15:11:23 -0500 | [diff] [blame] | 59 | obj-$(CONFIG_TS4800_IRQ) += irq-ts4800.o |
Max Filippov | cbd1de2 | 2013-12-01 12:59:49 +0400 | [diff] [blame] | 60 | obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o |
Max Filippov | 26a8e96 | 2013-12-01 12:04:57 +0400 | [diff] [blame] | 61 | obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o |
Zubair Lutfullah Kakakhel | 0547dc7 | 2016-11-14 12:13:45 +0000 | [diff] [blame] | 62 | obj-$(CONFIG_XILINX_INTC) += irq-xilinx-intc.o |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 63 | obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o |
Stefan Agner | 0494e11 | 2015-03-01 23:41:27 +0100 | [diff] [blame] | 64 | obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o |
Simon Arlott | c7c42ec | 2015-11-22 14:30:14 +0000 | [diff] [blame] | 65 | obj-$(CONFIG_BCM6345_L1_IRQ) += irq-bcm6345-l1.o |
Kevin Cernekee | 5f7f031 | 2014-12-25 09:49:06 -0800 | [diff] [blame] | 66 | obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o |
Kevin Cernekee | a4fcbb8 | 2014-11-06 22:44:27 -0800 | [diff] [blame] | 67 | obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o |
| 68 | obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o |
Grygorii Strashko | 89323f8 | 2014-07-23 17:40:30 +0300 | [diff] [blame] | 69 | obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o |
Andrew Bresticker | 8a19b8f | 2014-09-18 14:47:19 -0700 | [diff] [blame] | 70 | obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o |
Youlin Pei | 9dbbbd3 | 2017-04-07 16:06:36 +0800 | [diff] [blame] | 71 | obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o irq-mtk-cirq.o |
Baruch Siach | 8041dfb | 2015-01-15 12:34:00 +0200 | [diff] [blame] | 72 | obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o |
Dmitry Eremin-Solenikov | 22b67ac | 2015-05-19 16:17:09 +0100 | [diff] [blame] | 73 | obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o |
Paul Burton | 44e08e7 | 2015-05-24 16:11:31 +0100 | [diff] [blame] | 74 | obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o |
Paul Cercueil | 9536eba | 2019-07-24 13:16:08 -0400 | [diff] [blame] | 75 | obj-$(CONFIG_INGENIC_TCU_IRQ) += irq-ingenic-tcu.o |
Shenwei Wang | e324c4d | 2015-08-24 14:04:15 -0500 | [diff] [blame] | 76 | obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o |
Cristian Birsan | aaa8666 | 2016-01-13 18:15:35 -0700 | [diff] [blame] | 77 | obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o |
Alexandre Belloni | 19d9916 | 2018-03-22 16:15:24 +0100 | [diff] [blame] | 78 | obj-$(CONFIG_MSCC_OCELOT_IRQ) += irq-mscc-ocelot.o |
Thomas Petazzoni | a68a63c | 2017-06-21 15:29:14 +0200 | [diff] [blame] | 79 | obj-$(CONFIG_MVEBU_GICP) += irq-mvebu-gicp.o |
Thomas Petazzoni | e0de91a | 2017-06-21 15:29:15 +0200 | [diff] [blame] | 80 | obj-$(CONFIG_MVEBU_ICU) += irq-mvebu-icu.o |
Thomas Petazzoni | c27f29b | 2016-02-19 14:34:43 +0100 | [diff] [blame] | 81 | obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o |
Thomas Petazzoni | a109893 | 2016-08-05 16:55:19 +0200 | [diff] [blame] | 82 | obj-$(CONFIG_MVEBU_PIC) += irq-mvebu-pic.o |
Miquel Raynal | 61ce8d8 | 2018-10-01 16:13:51 +0200 | [diff] [blame] | 83 | obj-$(CONFIG_MVEBU_SEI) += irq-mvebu-sei.o |
Rasmus Villemoes | 0dcd9f8 | 2019-11-07 13:21:15 +0100 | [diff] [blame] | 84 | obj-$(CONFIG_LS_EXTIRQ) += irq-ls-extirq.o |
Minghuan Lian | b8f3ebe | 2016-03-23 19:08:20 +0800 | [diff] [blame] | 85 | obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o |
Eddie James | 04f6059 | 2020-01-15 15:29:40 -0600 | [diff] [blame] | 86 | obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o irq-aspeed-scu-ic.o |
Alexandre TORGUE | e0720416 | 2016-09-20 18:00:57 +0200 | [diff] [blame] | 87 | obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o |
Agustin Vega-Frias | f20cc9b | 2017-02-02 18:23:59 -0500 | [diff] [blame] | 88 | obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o |
Masahiro Yamada | 5ed34d3a | 2017-08-23 10:31:47 +0900 | [diff] [blame] | 89 | obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o |
Ard Biesheuvel | 706cffc | 2017-11-06 18:34:37 +0000 | [diff] [blame] | 90 | obj-$(CONFIG_ARCH_SYNQUACER) += irq-sni-exiu.o |
Jerome Brunet | 215f4cc | 2017-09-18 15:46:10 +0200 | [diff] [blame] | 91 | obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o |
Miodrag Dinic | 4235ff5 | 2017-12-29 16:41:46 +0100 | [diff] [blame] | 92 | obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o |
Archana Sathyakumar | f55c73a | 2018-02-28 10:27:29 -0700 | [diff] [blame] | 93 | obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o |
Shawn Guo | a6199bb | 2022-03-08 16:05:34 +0800 | [diff] [blame] | 94 | obj-$(CONFIG_QCOM_MPM) += irq-qcom-mpm.o |
Guo Ren | d8a5f5f | 2018-09-16 15:57:14 +0800 | [diff] [blame] | 95 | obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o |
Guo Ren | edff1b4 | 2018-09-16 15:57:14 +0800 | [diff] [blame] | 96 | obj-$(CONFIG_CSKY_APB_INTC) += irq-csky-apb-intc.o |
Anup Patel | 6b7ce892 | 2020-06-01 14:45:40 +0530 | [diff] [blame] | 97 | obj-$(CONFIG_RISCV_INTC) += irq-riscv-intc.o |
Christoph Hellwig | 8237f8b | 2018-07-26 16:27:00 +0200 | [diff] [blame] | 98 | obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o |
Lucas Stach | 0136afa | 2018-12-17 15:01:20 +0100 | [diff] [blame] | 99 | obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o |
Joakim Zhang | 2fbb139 | 2020-01-17 06:10:10 +0000 | [diff] [blame] | 100 | obj-$(CONFIG_IMX_INTMUX) += irq-imx-intmux.o |
Frank Li | 70afdab | 2022-09-22 11:12:43 -0500 | [diff] [blame] | 101 | obj-$(CONFIG_IMX_MU_MSI) += irq-imx-mu-msi.o |
Richard Fitzgerald | da0abe1 | 2018-12-14 14:44:16 +0000 | [diff] [blame] | 102 | obj-$(CONFIG_MADERA_IRQ) += irq-madera.o |
Jiaxun Yang | 9e543e2 | 2019-02-01 14:22:35 +0800 | [diff] [blame] | 103 | obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o |
Lokesh Vutla | cd844b0 | 2019-04-30 15:42:25 +0530 | [diff] [blame] | 104 | obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o |
Lokesh Vutla | 9f1463b | 2019-04-30 15:42:27 +0530 | [diff] [blame] | 105 | obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o |
Grzegorz Jaszczyk | 04e2d1e | 2020-09-16 18:36:03 +0200 | [diff] [blame] | 106 | obj-$(CONFIG_TI_PRUSS_INTC) += irq-pruss-intc.o |
Huacai Chen | b2d3e335 | 2022-07-20 18:51:31 +0800 | [diff] [blame] | 107 | obj-$(CONFIG_IRQ_LOONGARCH_CPU) += irq-loongarch-cpu.o |
Jiaxun Yang | dbb1522 | 2020-03-25 11:54:54 +0800 | [diff] [blame] | 108 | obj-$(CONFIG_LOONGSON_LIOINTC) += irq-loongson-liointc.o |
Huacai Chen | dd281e1 | 2022-07-20 18:51:30 +0800 | [diff] [blame] | 109 | obj-$(CONFIG_LOONGSON_EIOINTC) += irq-loongson-eiointc.o |
Jiaxun Yang | a93f1d9 | 2020-03-25 11:54:57 +0800 | [diff] [blame] | 110 | obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o |
Jiaxun Yang | 818e915 | 2020-05-28 23:27:49 +0800 | [diff] [blame] | 111 | obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o |
Jiaxun Yang | ef8c01e | 2020-05-28 23:27:51 +0800 | [diff] [blame] | 112 | obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o |
Jiaxun Yang | 632dcc2 | 2020-05-28 23:27:53 +0800 | [diff] [blame] | 113 | obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o |
Huacai Chen | ee73f14 | 2022-07-20 18:51:26 +0800 | [diff] [blame] | 114 | obj-$(CONFIG_LOONGSON_PCH_LPC) += irq-loongson-pch-lpc.o |
Mark-PK Tsai | ad4c938 | 2020-09-02 14:33:43 +0800 | [diff] [blame] | 115 | obj-$(CONFIG_MST_IRQ) += irq-mst-intc.o |
Michael Walle | 03ac990 | 2020-09-14 23:43:32 +0200 | [diff] [blame] | 116 | obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o |
Bert Vermeulen | 9f3a0f3 | 2021-01-22 21:42:24 +0100 | [diff] [blame] | 117 | obj-$(CONFIG_MACH_REALTEK_RTL) += irq-realtek-rtl.o |
Jonathan Neuschäfer | fead4dd | 2021-04-06 14:09:17 +0200 | [diff] [blame] | 118 | obj-$(CONFIG_WPCM450_AIC) += irq-wpcm450-aic.o |
Thomas Bogendoerfer | 529ea36 | 2021-04-22 16:53:28 +0200 | [diff] [blame] | 119 | obj-$(CONFIG_IRQ_IDT3243X) += irq-idt3243x.o |
Hector Martin | 76cde26 | 2021-01-21 08:55:15 +0900 | [diff] [blame] | 120 | obj-$(CONFIG_APPLE_AIC) += irq-apple-aic.o |
Claudiu Beznea | 00fa346 | 2021-09-27 09:36:57 +0300 | [diff] [blame] | 121 | obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o |
Qin Jian | f7189d9 | 2022-06-28 14:26:48 +0800 | [diff] [blame] | 122 | obj-$(CONFIG_SUNPLUS_SP7021_INTC) += irq-sp7021-intc.o |