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Misael Lopez Cruzf19b2822011-04-27 02:14:07 -05001/*
2 * MFD driver for TWL6040 audio device
3 *
4 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
5 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
6 * Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * Copyright: (C) 2011 Texas Instruments, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/slab.h>
29#include <linux/kernel.h>
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030030#include <linux/err.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050031#include <linux/platform_device.h>
Peter Ujfalusi37e13ce2012-05-16 14:11:58 +030032#include <linux/of.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_platform.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050036#include <linux/gpio.h>
37#include <linux/delay.h>
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030038#include <linux/i2c.h>
39#include <linux/regmap.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050040#include <linux/mfd/core.h>
41#include <linux/mfd/twl6040.h>
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030042#include <linux/regulator/consumer.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050043
Peter Ujfalusi31b402e2011-10-12 11:57:54 +030044#define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030045#define TWL6040_NUM_SUPPLIES (2)
Peter Ujfalusi31b402e2011-10-12 11:57:54 +030046
Krzysztof Kozlowskide1e23f2015-01-05 10:01:33 +010047static const struct reg_default twl6040_defaults[] = {
Peter Ujfalusic7f91292013-11-29 16:03:45 +020048 { 0x01, 0x4B }, /* REG_ASICID (ro) */
49 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
50 { 0x03, 0x00 }, /* REG_INTID */
51 { 0x04, 0x00 }, /* REG_INTMR */
52 { 0x05, 0x00 }, /* REG_NCPCTRL */
53 { 0x06, 0x00 }, /* REG_LDOCTL */
54 { 0x07, 0x60 }, /* REG_HPPLLCTL */
55 { 0x08, 0x00 }, /* REG_LPPLLCTL */
56 { 0x09, 0x4A }, /* REG_LPPLLDIV */
57 { 0x0A, 0x00 }, /* REG_AMICBCTL */
58 { 0x0B, 0x00 }, /* REG_DMICBCTL */
59 { 0x0C, 0x00 }, /* REG_MICLCTL */
60 { 0x0D, 0x00 }, /* REG_MICRCTL */
61 { 0x0E, 0x00 }, /* REG_MICGAIN */
62 { 0x0F, 0x1B }, /* REG_LINEGAIN */
63 { 0x10, 0x00 }, /* REG_HSLCTL */
64 { 0x11, 0x00 }, /* REG_HSRCTL */
65 { 0x12, 0x00 }, /* REG_HSGAIN */
66 { 0x13, 0x00 }, /* REG_EARCTL */
67 { 0x14, 0x00 }, /* REG_HFLCTL */
68 { 0x15, 0x00 }, /* REG_HFLGAIN */
69 { 0x16, 0x00 }, /* REG_HFRCTL */
70 { 0x17, 0x00 }, /* REG_HFRGAIN */
71 { 0x18, 0x00 }, /* REG_VIBCTLL */
72 { 0x19, 0x00 }, /* REG_VIBDATL */
73 { 0x1A, 0x00 }, /* REG_VIBCTLR */
74 { 0x1B, 0x00 }, /* REG_VIBDATR */
75 { 0x1C, 0x00 }, /* REG_HKCTL1 */
76 { 0x1D, 0x00 }, /* REG_HKCTL2 */
77 { 0x1E, 0x00 }, /* REG_GPOCTL */
78 { 0x1F, 0x00 }, /* REG_ALB */
79 { 0x20, 0x00 }, /* REG_DLB */
80 /* 0x28, REG_TRIM1 */
81 /* 0x29, REG_TRIM2 */
82 /* 0x2A, REG_TRIM3 */
83 /* 0x2B, REG_HSOTRIM */
84 /* 0x2C, REG_HFOTRIM */
85 { 0x2D, 0x08 }, /* REG_ACCCTL */
86 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
87};
88
Nariman Poushin8019ff62015-07-16 16:36:21 +010089static struct reg_sequence twl6040_patch[] = {
Peter Ujfalusi11e38e12014-04-01 16:44:59 +030090 /*
91 * Select I2C bus access to dual access registers
92 * Interrupt register is cleared on read
93 * Select fast mode for i2c (400KHz)
94 */
95 { TWL6040_REG_ACCCTL,
96 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
Peter Ujfalusic7f91292013-11-29 16:03:45 +020097};
98
99
Johan Hovold85e9b132017-11-11 16:38:44 +0100100static bool twl6040_has_vibra(struct device_node *parent)
Samuel Ortizca2cad62012-05-23 16:23:21 +0200101{
Johan Hovold85e9b132017-11-11 16:38:44 +0100102 struct device_node *node;
103
104 node = of_get_child_by_name(parent, "vibra");
105 if (node) {
106 of_node_put(node);
Samuel Ortizca2cad62012-05-23 16:23:21 +0200107 return true;
Johan Hovold85e9b132017-11-11 16:38:44 +0100108 }
109
Samuel Ortizca2cad62012-05-23 16:23:21 +0200110 return false;
111}
112
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500113int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
114{
115 int ret;
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300116 unsigned int val;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500117
Mark Brownc6f39252013-08-31 17:48:19 +0100118 ret = regmap_read(twl6040->regmap, reg, &val);
119 if (ret < 0)
120 return ret;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500121
122 return val;
123}
124EXPORT_SYMBOL(twl6040_reg_read);
125
126int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
127{
128 int ret;
129
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300130 ret = regmap_write(twl6040->regmap, reg, val);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500131
132 return ret;
133}
134EXPORT_SYMBOL(twl6040_reg_write);
135
136int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
137{
Axel Linc6000402012-07-11 10:06:34 +0800138 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500139}
140EXPORT_SYMBOL(twl6040_set_bits);
141
142int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
143{
Axel Linc6000402012-07-11 10:06:34 +0800144 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500145}
146EXPORT_SYMBOL(twl6040_clear_bits);
147
148/* twl6040 codec manual power-up sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200149static int twl6040_power_up_manual(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500150{
151 u8 ldoctl, ncpctl, lppllctl;
152 int ret;
153
154 /* enable high-side LDO, reference system and internal oscillator */
155 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
156 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
157 if (ret)
158 return ret;
159 usleep_range(10000, 10500);
160
161 /* enable negative charge pump */
162 ncpctl = TWL6040_NCPENA;
163 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
164 if (ret)
165 goto ncp_err;
166 usleep_range(1000, 1500);
167
168 /* enable low-side LDO */
169 ldoctl |= TWL6040_LSLDOENA;
170 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
171 if (ret)
172 goto lsldo_err;
173 usleep_range(1000, 1500);
174
175 /* enable low-power PLL */
176 lppllctl = TWL6040_LPLLENA;
177 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
178 if (ret)
179 goto lppll_err;
180 usleep_range(5000, 5500);
181
182 /* disable internal oscillator */
183 ldoctl &= ~TWL6040_OSCENA;
184 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
185 if (ret)
186 goto osc_err;
187
188 return 0;
189
190osc_err:
191 lppllctl &= ~TWL6040_LPLLENA;
192 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
193lppll_err:
194 ldoctl &= ~TWL6040_LSLDOENA;
195 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
196lsldo_err:
197 ncpctl &= ~TWL6040_NCPENA;
198 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
199ncp_err:
200 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
201 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
202
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200203 dev_err(twl6040->dev, "manual power-up failed\n");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500204 return ret;
205}
206
207/* twl6040 manual power-down sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200208static void twl6040_power_down_manual(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500209{
210 u8 ncpctl, ldoctl, lppllctl;
211
212 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
213 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
214 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
215
216 /* enable internal oscillator */
217 ldoctl |= TWL6040_OSCENA;
218 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
219 usleep_range(1000, 1500);
220
221 /* disable low-power PLL */
222 lppllctl &= ~TWL6040_LPLLENA;
223 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
224
225 /* disable low-side LDO */
226 ldoctl &= ~TWL6040_LSLDOENA;
227 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
228
229 /* disable negative charge pump */
230 ncpctl &= ~TWL6040_NCPENA;
231 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
232
233 /* disable high-side LDO, reference system and internal oscillator */
234 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
235 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
236}
237
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200238static irqreturn_t twl6040_readyint_handler(int irq, void *data)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500239{
240 struct twl6040 *twl6040 = data;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500241
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200242 complete(&twl6040->ready);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500243
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200244 return IRQ_HANDLED;
245}
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500246
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200247static irqreturn_t twl6040_thint_handler(int irq, void *data)
248{
249 struct twl6040 *twl6040 = data;
250 u8 status;
251
252 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
253 if (status & TWL6040_TSHUTDET) {
254 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
255 twl6040_power(twl6040, 0);
256 } else {
257 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
258 twl6040_power(twl6040, 1);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500259 }
260
261 return IRQ_HANDLED;
262}
263
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200264static int twl6040_power_up_automatic(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500265{
266 int time_left;
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200267
268 gpio_set_value(twl6040->audpwron, 1);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500269
270 time_left = wait_for_completion_timeout(&twl6040->ready,
271 msecs_to_jiffies(144));
272 if (!time_left) {
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200273 u8 intid;
274
275 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500276 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
277 if (!(intid & TWL6040_READYINT)) {
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200278 dev_err(twl6040->dev, "automatic power-up failed\n");
279 gpio_set_value(twl6040->audpwron, 0);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500280 return -ETIMEDOUT;
281 }
282 }
283
284 return 0;
285}
286
287int twl6040_power(struct twl6040 *twl6040, int on)
288{
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500289 int ret = 0;
290
291 mutex_lock(&twl6040->mutex);
292
293 if (on) {
294 /* already powered-up */
295 if (twl6040->power_count++)
296 goto out;
297
Javier Martinez Canillas32852bc2016-04-20 11:16:38 -0400298 ret = clk_prepare_enable(twl6040->clk32k);
299 if (ret) {
300 twl6040->power_count = 0;
301 goto out;
302 }
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300303
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200304 /* Allow writes to the chip */
305 regcache_cache_only(twl6040->regmap, false);
306
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200307 if (gpio_is_valid(twl6040->audpwron)) {
308 /* use automatic power-up sequence */
309 ret = twl6040_power_up_automatic(twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500310 if (ret) {
Javier Martinez Canillasd6441dc2016-04-20 11:16:37 -0400311 clk_disable_unprepare(twl6040->clk32k);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500312 twl6040->power_count = 0;
313 goto out;
314 }
315 } else {
316 /* use manual power-up sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200317 ret = twl6040_power_up_manual(twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500318 if (ret) {
Javier Martinez Canillasd6441dc2016-04-20 11:16:37 -0400319 clk_disable_unprepare(twl6040->clk32k);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500320 twl6040->power_count = 0;
321 goto out;
322 }
323 }
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200324
325 /* Sync with the HW */
326 regcache_sync(twl6040->regmap);
327
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300328 /* Default PLL configuration after power up */
329 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300330 twl6040->sysclk_rate = 19200000;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500331 } else {
332 /* already powered-down */
333 if (!twl6040->power_count) {
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300334 dev_err(twl6040->dev,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500335 "device is already powered-off\n");
336 ret = -EPERM;
337 goto out;
338 }
339
340 if (--twl6040->power_count)
341 goto out;
342
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200343 if (gpio_is_valid(twl6040->audpwron)) {
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500344 /* use AUDPWRON line */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200345 gpio_set_value(twl6040->audpwron, 0);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500346
347 /* power-down sequence latency */
348 usleep_range(500, 700);
349 } else {
350 /* use manual power-down sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200351 twl6040_power_down_manual(twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500352 }
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200353
354 /* Set regmap to cache only and mark it as dirty */
355 regcache_cache_only(twl6040->regmap, true);
356 regcache_mark_dirty(twl6040->regmap);
357
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300358 twl6040->sysclk_rate = 0;
359
360 if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
361 clk_disable_unprepare(twl6040->mclk);
362 twl6040->mclk_rate = 0;
363 }
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300364
365 clk_disable_unprepare(twl6040->clk32k);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500366 }
367
368out:
369 mutex_unlock(&twl6040->mutex);
370 return ret;
371}
372EXPORT_SYMBOL(twl6040_power);
373
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300374int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500375 unsigned int freq_in, unsigned int freq_out)
376{
377 u8 hppllctl, lppllctl;
378 int ret = 0;
379
380 mutex_lock(&twl6040->mutex);
381
382 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
383 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
384
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100385 /* Force full reconfiguration when switching between PLL */
386 if (pll_id != twl6040->pll) {
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300387 twl6040->sysclk_rate = 0;
388 twl6040->mclk_rate = 0;
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100389 }
390
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300391 switch (pll_id) {
392 case TWL6040_SYSCLK_SEL_LPPLL:
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500393 /* low-power PLL divider */
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100394 /* Change the sysclk configuration only if it has been canged */
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300395 if (twl6040->sysclk_rate != freq_out) {
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100396 switch (freq_out) {
397 case 17640000:
398 lppllctl |= TWL6040_LPLLFIN;
399 break;
400 case 19200000:
401 lppllctl &= ~TWL6040_LPLLFIN;
402 break;
403 default:
404 dev_err(twl6040->dev,
405 "freq_out %d not supported\n",
406 freq_out);
407 ret = -EINVAL;
408 goto pll_out;
409 }
410 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
411 lppllctl);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500412 }
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100413
414 /* The PLL in use has not been change, we can exit */
415 if (twl6040->pll == pll_id)
416 break;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500417
418 switch (freq_in) {
419 case 32768:
420 lppllctl |= TWL6040_LPLLENA;
421 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
422 lppllctl);
423 mdelay(5);
424 lppllctl &= ~TWL6040_HPLLSEL;
425 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
426 lppllctl);
427 hppllctl &= ~TWL6040_HPLLENA;
428 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
429 hppllctl);
430 break;
431 default:
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300432 dev_err(twl6040->dev,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500433 "freq_in %d not supported\n", freq_in);
434 ret = -EINVAL;
435 goto pll_out;
436 }
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300437
438 clk_disable_unprepare(twl6040->mclk);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500439 break;
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300440 case TWL6040_SYSCLK_SEL_HPPLL:
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500441 /* high-performance PLL can provide only 19.2 MHz */
442 if (freq_out != 19200000) {
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300443 dev_err(twl6040->dev,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500444 "freq_out %d not supported\n", freq_out);
445 ret = -EINVAL;
446 goto pll_out;
447 }
448
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300449 if (twl6040->mclk_rate != freq_in) {
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100450 hppllctl &= ~TWL6040_MCLK_MSK;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500451
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100452 switch (freq_in) {
453 case 12000000:
454 /* PLL enabled, active mode */
455 hppllctl |= TWL6040_MCLK_12000KHZ |
456 TWL6040_HPLLENA;
457 break;
458 case 19200000:
Peter Ujfalusiac8320c2014-05-06 11:46:10 +0300459 /* PLL enabled, bypass mode */
460 hppllctl |= TWL6040_MCLK_19200KHZ |
461 TWL6040_HPLLBP | TWL6040_HPLLENA;
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100462 break;
463 case 26000000:
464 /* PLL enabled, active mode */
465 hppllctl |= TWL6040_MCLK_26000KHZ |
466 TWL6040_HPLLENA;
467 break;
468 case 38400000:
Peter Ujfalusiac8320c2014-05-06 11:46:10 +0300469 /* PLL enabled, bypass mode */
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100470 hppllctl |= TWL6040_MCLK_38400KHZ |
Peter Ujfalusiac8320c2014-05-06 11:46:10 +0300471 TWL6040_HPLLBP | TWL6040_HPLLENA;
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100472 break;
473 default:
474 dev_err(twl6040->dev,
475 "freq_in %d not supported\n", freq_in);
476 ret = -EINVAL;
477 goto pll_out;
478 }
479
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300480 /* When switching to HPPLL, enable the mclk first */
481 if (pll_id != twl6040->pll)
482 clk_prepare_enable(twl6040->mclk);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500483 /*
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100484 * enable clock slicer to ensure input waveform is
485 * square
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500486 */
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100487 hppllctl |= TWL6040_HPLLSQRENA;
488
489 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
490 hppllctl);
491 usleep_range(500, 700);
492 lppllctl |= TWL6040_HPLLSEL;
493 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
494 lppllctl);
495 lppllctl &= ~TWL6040_LPLLENA;
496 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
497 lppllctl);
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300498
499 twl6040->mclk_rate = freq_in;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500500 }
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500501 break;
502 default:
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300503 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500504 ret = -EINVAL;
505 goto pll_out;
506 }
507
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300508 twl6040->sysclk_rate = freq_out;
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300509 twl6040->pll = pll_id;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500510
511pll_out:
512 mutex_unlock(&twl6040->mutex);
513 return ret;
514}
515EXPORT_SYMBOL(twl6040_set_pll);
516
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300517int twl6040_get_pll(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500518{
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300519 if (twl6040->power_count)
520 return twl6040->pll;
521 else
522 return -ENODEV;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500523}
524EXPORT_SYMBOL(twl6040_get_pll);
525
526unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
527{
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300528 return twl6040->sysclk_rate;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500529}
530EXPORT_SYMBOL(twl6040_get_sysclk);
531
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300532/* Get the combined status of the vibra control register */
533int twl6040_get_vibralr_status(struct twl6040 *twl6040)
534{
Mark Brownc6f39252013-08-31 17:48:19 +0100535 unsigned int reg;
536 int ret;
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300537 u8 status;
538
Mark Brownc6f39252013-08-31 17:48:19 +0100539 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
540 if (ret != 0)
541 return ret;
542 status = reg;
543
544 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
545 if (ret != 0)
546 return ret;
547 status |= reg;
548
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300549 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
550
551 return status;
552}
553EXPORT_SYMBOL(twl6040_get_vibralr_status);
554
Peter Ujfalusi0f962ae2011-07-05 11:40:33 +0300555static struct resource twl6040_vibra_rsrc[] = {
556 {
557 .flags = IORESOURCE_IRQ,
558 },
559};
560
561static struct resource twl6040_codec_rsrc[] = {
562 {
563 .flags = IORESOURCE_IRQ,
564 },
565};
566
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300567static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500568{
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300569 /* Register 0 is not readable */
570 if (!reg)
571 return false;
572 return true;
573}
574
Mark Brownc6f39252013-08-31 17:48:19 +0100575static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
576{
577 switch (reg) {
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200578 case TWL6040_REG_ASICID:
579 case TWL6040_REG_ASICREV:
580 case TWL6040_REG_INTID:
581 case TWL6040_REG_LPPLLCTL:
582 case TWL6040_REG_HPPLLCTL:
583 case TWL6040_REG_STATUS:
584 return true;
585 default:
586 return false;
587 }
588}
589
590static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
591{
592 switch (reg) {
593 case TWL6040_REG_ASICID:
594 case TWL6040_REG_ASICREV:
595 case TWL6040_REG_STATUS:
Mark Brownc6f39252013-08-31 17:48:19 +0100596 return false;
597 default:
598 return true;
599 }
600}
601
Krzysztof Kozlowskide1e23f2015-01-05 10:01:33 +0100602static const struct regmap_config twl6040_regmap_config = {
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300603 .reg_bits = 8,
604 .val_bits = 8,
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200605
606 .reg_defaults = twl6040_defaults,
607 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
608
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300609 .max_register = TWL6040_REG_STATUS, /* 0x2e */
610
611 .readable_reg = twl6040_readable_reg,
Mark Brownc6f39252013-08-31 17:48:19 +0100612 .volatile_reg = twl6040_volatile_reg,
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200613 .writeable_reg = twl6040_writeable_reg,
Mark Brownc6f39252013-08-31 17:48:19 +0100614
615 .cache_type = REGCACHE_RBTREE,
David Frey1c96a2f2018-09-01 09:50:41 -0700616 .use_single_read = true,
617 .use_single_write = true,
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300618};
619
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200620static const struct regmap_irq twl6040_irqs[] = {
621 { .reg_offset = 0, .mask = TWL6040_THINT, },
622 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
623 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
624 { .reg_offset = 0, .mask = TWL6040_HFINT, },
625 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
626 { .reg_offset = 0, .mask = TWL6040_READYINT, },
627};
628
629static struct regmap_irq_chip twl6040_irq_chip = {
630 .name = "twl6040",
631 .irqs = twl6040_irqs,
632 .num_irqs = ARRAY_SIZE(twl6040_irqs),
633
634 .num_regs = 1,
635 .status_base = TWL6040_REG_INTID,
636 .mask_base = TWL6040_REG_INTMR,
637};
638
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800639static int twl6040_probe(struct i2c_client *client,
640 const struct i2c_device_id *id)
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300641{
Peter Ujfalusi37e13ce2012-05-16 14:11:58 +0300642 struct device_node *node = client->dev.of_node;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500643 struct twl6040 *twl6040;
644 struct mfd_cell *cell = NULL;
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300645 int irq, ret, children = 0;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500646
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200647 if (!node) {
648 dev_err(&client->dev, "of node is missing\n");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500649 return -EINVAL;
650 }
651
Peter Ujfalusid20e1d22011-07-04 20:15:19 +0300652 /* In order to operate correctly we need valid interrupt config */
Peter Ujfalusi67124192012-05-16 14:11:56 +0300653 if (!client->irq) {
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300654 dev_err(&client->dev, "Invalid IRQ configuration\n");
Peter Ujfalusid20e1d22011-07-04 20:15:19 +0300655 return -EINVAL;
656 }
657
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300658 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
659 GFP_KERNEL);
Peter Ujfalusiecc8fa12013-07-12 13:32:04 +0200660 if (!twl6040)
661 return -ENOMEM;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500662
Axel Linbbf6adc2012-04-25 10:09:46 +0800663 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
Peter Ujfalusiecc8fa12013-07-12 13:32:04 +0200664 if (IS_ERR(twl6040->regmap))
665 return PTR_ERR(twl6040->regmap);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500666
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300667 i2c_set_clientdata(client, twl6040);
668
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300669 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
670 if (IS_ERR(twl6040->clk32k)) {
Tony Lindgren75c08f12015-09-18 09:29:04 -0700671 if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
672 return -EPROBE_DEFER;
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300673 dev_dbg(&client->dev, "clk32k is not handled\n");
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300674 twl6040->clk32k = NULL;
675 }
676
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300677 twl6040->mclk = devm_clk_get(&client->dev, "mclk");
678 if (IS_ERR(twl6040->mclk)) {
679 if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
680 return -EPROBE_DEFER;
681 dev_dbg(&client->dev, "mclk is not handled\n");
682 twl6040->mclk = NULL;
683 }
684
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300685 twl6040->supplies[0].supply = "vio";
686 twl6040->supplies[1].supply = "v2v1";
Jingoo Han990810b2013-02-20 18:30:21 +0900687 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200688 twl6040->supplies);
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300689 if (ret != 0) {
690 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
Wolfram Sang501d6092013-10-13 18:06:12 +0200691 return ret;
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300692 }
693
694 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
695 if (ret != 0) {
696 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
Wolfram Sang501d6092013-10-13 18:06:12 +0200697 return ret;
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300698 }
699
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300700 twl6040->dev = &client->dev;
701 twl6040->irq = client->irq;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500702
703 mutex_init(&twl6040->mutex);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500704 init_completion(&twl6040->ready);
705
Peter Ujfalusi006cea32014-04-01 16:45:00 +0300706 regmap_register_patch(twl6040->regmap, twl6040_patch,
707 ARRAY_SIZE(twl6040_patch));
708
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500709 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
Florian Vaussard89d68992014-02-25 14:28:19 +0100710 if (twl6040->rev < 0) {
711 dev_err(&client->dev, "Failed to read revision register: %d\n",
712 twl6040->rev);
Julia Lawallf2b86782014-08-06 22:12:15 +0200713 ret = twl6040->rev;
Florian Vaussard89d68992014-02-25 14:28:19 +0100714 goto gpio_err;
715 }
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500716
Peter Ujfalusi77f63e02011-09-15 15:39:26 +0300717 /* ERRATA: Automatic power-up is not possible in ES1.0 */
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200718 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
719 twl6040->audpwron = of_get_named_gpio(node,
720 "ti,audpwron-gpio", 0);
721 else
Peter Ujfalusi77f63e02011-09-15 15:39:26 +0300722 twl6040->audpwron = -EINVAL;
723
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500724 if (gpio_is_valid(twl6040->audpwron)) {
Jingoo Han990810b2013-02-20 18:30:21 +0900725 ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200726 GPIOF_OUT_INIT_LOW, "audpwron");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500727 if (ret)
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300728 goto gpio_err;
Peter Ujfalusi02d02722014-04-01 16:45:01 +0300729
730 /* Clear any pending interrupt */
731 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500732 }
733
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200734 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
Lee Jonesc06f3082014-07-21 13:13:48 +0100735 0, &twl6040_irq_chip, &twl6040->irq_data);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200736 if (ret < 0)
Jingoo Han990810b2013-02-20 18:30:21 +0900737 goto gpio_err;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500738
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200739 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200740 TWL6040_IRQ_READY);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200741 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200742 TWL6040_IRQ_TH);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200743
Jingoo Han990810b2013-02-20 18:30:21 +0900744 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200745 twl6040_readyint_handler, IRQF_ONESHOT,
746 "twl6040_irq_ready", twl6040);
Peter Ujfalusid20e1d22011-07-04 20:15:19 +0300747 if (ret) {
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200748 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
749 goto readyirq_err;
750 }
751
Jingoo Han990810b2013-02-20 18:30:21 +0900752 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200753 twl6040_thint_handler, IRQF_ONESHOT,
754 "twl6040_irq_th", twl6040);
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200755 if (ret) {
756 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
Wei Yongjunfc5ee962013-09-25 15:37:15 +0800757 goto readyirq_err;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500758 }
759
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300760 /*
761 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
762 * We can add the ASoC codec child whenever this driver has been loaded.
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300763 */
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200764 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300765 cell = &twl6040->cells[children];
766 cell->name = "twl6040-codec";
767 twl6040_codec_rsrc[0].start = irq;
768 twl6040_codec_rsrc[0].end = irq;
769 cell->resources = twl6040_codec_rsrc;
770 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300771 children++;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500772
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200773 /* Vibra input driver support */
774 if (twl6040_has_vibra(node)) {
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200775 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
Peter Ujfalusi0f962ae2011-07-05 11:40:33 +0300776
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500777 cell = &twl6040->cells[children];
778 cell->name = "twl6040-vibra";
Peter Ujfalusi0f962ae2011-07-05 11:40:33 +0300779 twl6040_vibra_rsrc[0].start = irq;
780 twl6040_vibra_rsrc[0].end = irq;
781 cell->resources = twl6040_vibra_rsrc;
782 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500783 children++;
784 }
785
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200786 /* GPO support */
787 cell = &twl6040->cells[children];
788 cell->name = "twl6040-gpo";
789 children++;
Peter Ujfalusi5cbe7862012-08-16 15:13:14 +0300790
Peter Ujfalusi0133d322016-08-31 14:46:21 +0300791 /* PDM clock support */
792 cell = &twl6040->cells[children];
793 cell->name = "twl6040-pdmclk";
794 children++;
795
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200796 /* The chip is powered down so mark regmap to cache only and dirty */
797 regcache_cache_only(twl6040->regmap, true);
798 regcache_mark_dirty(twl6040->regmap);
799
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300800 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
Mark Brown55692af2012-09-11 15:16:36 +0800801 NULL, 0, NULL);
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300802 if (ret)
Wei Yongjunfc5ee962013-09-25 15:37:15 +0800803 goto readyirq_err;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500804
805 return 0;
806
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200807readyirq_err:
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200808 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300809gpio_err:
810 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500811 return ret;
812}
813
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800814static int twl6040_remove(struct i2c_client *client)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500815{
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300816 struct twl6040 *twl6040 = i2c_get_clientdata(client);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500817
818 if (twl6040->power_count)
819 twl6040_power(twl6040, 0);
820
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200821 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500822
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300823 mfd_remove_devices(&client->dev);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500824
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300825 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300826
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500827 return 0;
828}
829
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300830static const struct i2c_device_id twl6040_i2c_id[] = {
831 { "twl6040", 0, },
Peter Ujfalusi1fc74ae2012-07-16 11:49:44 +0200832 { "twl6041", 0, },
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300833 { },
834};
835MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
836
837static struct i2c_driver twl6040_driver = {
838 .driver = {
839 .name = "twl6040",
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300840 },
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500841 .probe = twl6040_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800842 .remove = twl6040_remove,
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300843 .id_table = twl6040_i2c_id,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500844};
845
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300846module_i2c_driver(twl6040_driver);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500847
848MODULE_DESCRIPTION("TWL6040 MFD");
849MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
850MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
851MODULE_LICENSE("GPL");