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Linus Walleijbd207cf2009-08-30 23:49:04 +02001/*
2 * Copyright (C) 2007-2009 ST-Ericsson AB
3 * License terms: GNU General Public License (GPL) version 2
4 * RTC clock driver for the AB3100 Analog Baseband Chip
5 * Author: Linus Walleij <linus.walleij@stericsson.com>
6 */
7#include <linux/module.h>
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/rtc.h>
Linus Walleij812f9e92010-05-01 18:26:07 +020012#include <linux/mfd/abx500.h>
Linus Walleijbd207cf2009-08-30 23:49:04 +020013
14/* Clock rate in Hz */
15#define AB3100_RTC_CLOCK_RATE 32768
16
17/*
18 * The AB3100 RTC registers. These are the same for
19 * AB3000 and AB3100.
20 * Control register:
21 * Bit 0: RTC Monitor cleared=0, active=1, if you set it
22 * to 1 it remains active until RTC power is lost.
23 * Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass
24 * Bit 2: Alarm on, 0 = off, 1 = on
25 * Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled
26 */
27#define AB3100_RTC 0x53
28/* default setting, buffer disabled, alarm on */
29#define RTC_SETTING 0x30
30/* Alarm when AL0-AL3 == TI0-TI3 */
31#define AB3100_AL0 0x56
32#define AB3100_AL1 0x57
33#define AB3100_AL2 0x58
34#define AB3100_AL3 0x59
35/* This 48-bit register that counts up at 32768 Hz */
36#define AB3100_TI0 0x5a
37#define AB3100_TI1 0x5b
38#define AB3100_TI2 0x5c
39#define AB3100_TI3 0x5d
40#define AB3100_TI4 0x5e
41#define AB3100_TI5 0x5f
42
43/*
44 * RTC clock functions and device struct declaration
45 */
Xunlei Pang5c7e11b2015-04-01 20:34:29 -070046static int ab3100_rtc_set_mmss(struct device *dev, time64_t secs)
Linus Walleijbd207cf2009-08-30 23:49:04 +020047{
Linus Walleijbd207cf2009-08-30 23:49:04 +020048 u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2,
49 AB3100_TI3, AB3100_TI4, AB3100_TI5};
50 unsigned char buf[6];
Xunlei Pang5c7e11b2015-04-01 20:34:29 -070051 u64 hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
Linus Walleijbd207cf2009-08-30 23:49:04 +020052 int err = 0;
53 int i;
54
Xunlei Pang5c7e11b2015-04-01 20:34:29 -070055 buf[0] = (hw_counter) & 0xFF;
56 buf[1] = (hw_counter >> 8) & 0xFF;
57 buf[2] = (hw_counter >> 16) & 0xFF;
58 buf[3] = (hw_counter >> 24) & 0xFF;
59 buf[4] = (hw_counter >> 32) & 0xFF;
60 buf[5] = (hw_counter >> 40) & 0xFF;
Linus Walleijbd207cf2009-08-30 23:49:04 +020061
62 for (i = 0; i < 6; i++) {
Mattias Wallinfa661252010-05-01 18:26:20 +020063 err = abx500_set_register_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +020064 regs[i], buf[i]);
65 if (err)
66 return err;
67 }
68
69 /* Set the flag to mark that the clock is now set */
Mattias Wallinfa661252010-05-01 18:26:20 +020070 return abx500_mask_and_set_register_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +020071 AB3100_RTC,
Mattias Wallinfa661252010-05-01 18:26:20 +020072 0x01, 0x01);
Linus Walleijbd207cf2009-08-30 23:49:04 +020073
74}
75
76static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm)
77{
Xunlei Pang5c7e11b2015-04-01 20:34:29 -070078 time64_t time;
Linus Walleijbd207cf2009-08-30 23:49:04 +020079 u8 rtcval;
80 int err;
81
Mattias Wallinfa661252010-05-01 18:26:20 +020082 err = abx500_get_register_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +020083 AB3100_RTC, &rtcval);
84 if (err)
85 return err;
86
87 if (!(rtcval & 0x01)) {
88 dev_info(dev, "clock not set (lost power)");
89 return -EINVAL;
90 } else {
Xunlei Pang5c7e11b2015-04-01 20:34:29 -070091 u64 hw_counter;
Linus Walleijbd207cf2009-08-30 23:49:04 +020092 u8 buf[6];
93
94 /* Read out time registers */
Mattias Wallinfa661252010-05-01 18:26:20 +020095 err = abx500_get_register_page_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +020096 AB3100_TI0,
97 buf, 6);
98 if (err != 0)
99 return err;
100
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700101 hw_counter = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
Linus Walleijbd207cf2009-08-30 23:49:04 +0200102 ((u64) buf[3] << 24) | ((u64) buf[2] << 16) |
103 ((u64) buf[1] << 8) | (u64) buf[0];
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700104 time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200105 }
106
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700107 rtc_time64_to_tm(time, tm);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200108
109 return rtc_valid_tm(tm);
110}
111
112static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
113{
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700114 time64_t time;
115 u64 hw_counter;
Linus Walleijbd207cf2009-08-30 23:49:04 +0200116 u8 buf[6];
117 u8 rtcval;
118 int err;
119
120 /* Figure out if alarm is enabled or not */
Mattias Wallinfa661252010-05-01 18:26:20 +0200121 err = abx500_get_register_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +0200122 AB3100_RTC, &rtcval);
123 if (err)
124 return err;
125 if (rtcval & 0x04)
126 alarm->enabled = 1;
127 else
128 alarm->enabled = 0;
129 /* No idea how this could be represented */
130 alarm->pending = 0;
131 /* Read out alarm registers, only 4 bytes */
Mattias Wallinfa661252010-05-01 18:26:20 +0200132 err = abx500_get_register_page_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +0200133 AB3100_AL0, buf, 4);
134 if (err)
135 return err;
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700136 hw_counter = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
Linus Walleijbd207cf2009-08-30 23:49:04 +0200137 ((u64) buf[1] << 24) | ((u64) buf[0] << 16);
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700138 time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200139
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700140 rtc_time64_to_tm(time, &alarm->time);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200141
142 return rtc_valid_tm(&alarm->time);
143}
144
145static int ab3100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
146{
Linus Walleijbd207cf2009-08-30 23:49:04 +0200147 u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3};
148 unsigned char buf[4];
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700149 time64_t secs;
150 u64 hw_counter;
Linus Walleijbd207cf2009-08-30 23:49:04 +0200151 int err;
152 int i;
153
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700154 secs = rtc_tm_to_time64(&alarm->time);
155 hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
156 buf[0] = (hw_counter >> 16) & 0xFF;
157 buf[1] = (hw_counter >> 24) & 0xFF;
158 buf[2] = (hw_counter >> 32) & 0xFF;
159 buf[3] = (hw_counter >> 40) & 0xFF;
Linus Walleijbd207cf2009-08-30 23:49:04 +0200160
161 /* Set the alarm */
162 for (i = 0; i < 4; i++) {
Mattias Wallinfa661252010-05-01 18:26:20 +0200163 err = abx500_set_register_interruptible(dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +0200164 regs[i], buf[i]);
165 if (err)
166 return err;
167 }
168 /* Then enable the alarm */
Mattias Wallinfa661252010-05-01 18:26:20 +0200169 return abx500_mask_and_set_register_interruptible(dev, 0,
170 AB3100_RTC, (1 << 2),
Linus Walleijbd207cf2009-08-30 23:49:04 +0200171 alarm->enabled << 2);
172}
173
174static int ab3100_rtc_irq_enable(struct device *dev, unsigned int enabled)
175{
Linus Walleijbd207cf2009-08-30 23:49:04 +0200176 /*
177 * It's not possible to enable/disable the alarm IRQ for this RTC.
178 * It does not actually trigger any IRQ: instead its only function is
179 * to power up the system, if it wasn't on. This will manifest as
180 * a "power up cause" in the AB3100 power driver (battery charging etc)
181 * and need to be handled there instead.
182 */
183 if (enabled)
Mattias Wallinfa661252010-05-01 18:26:20 +0200184 return abx500_mask_and_set_register_interruptible(dev, 0,
185 AB3100_RTC, (1 << 2),
Linus Walleijbd207cf2009-08-30 23:49:04 +0200186 1 << 2);
187 else
Mattias Wallinfa661252010-05-01 18:26:20 +0200188 return abx500_mask_and_set_register_interruptible(dev, 0,
189 AB3100_RTC, (1 << 2),
Linus Walleijbd207cf2009-08-30 23:49:04 +0200190 0);
191}
192
193static const struct rtc_class_ops ab3100_rtc_ops = {
194 .read_time = ab3100_rtc_read_time,
Xunlei Pang5c7e11b2015-04-01 20:34:29 -0700195 .set_mmss64 = ab3100_rtc_set_mmss,
Linus Walleijbd207cf2009-08-30 23:49:04 +0200196 .read_alarm = ab3100_rtc_read_alarm,
197 .set_alarm = ab3100_rtc_set_alarm,
198 .alarm_irq_enable = ab3100_rtc_irq_enable,
199};
200
201static int __init ab3100_rtc_probe(struct platform_device *pdev)
202{
203 int err;
204 u8 regval;
205 struct rtc_device *rtc;
Linus Walleijbd207cf2009-08-30 23:49:04 +0200206
207 /* The first RTC register needs special treatment */
Mattias Wallinfa661252010-05-01 18:26:20 +0200208 err = abx500_get_register_interruptible(&pdev->dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +0200209 AB3100_RTC, &regval);
210 if (err) {
211 dev_err(&pdev->dev, "unable to read RTC register\n");
212 return -ENODEV;
213 }
214
215 if ((regval & 0xFE) != RTC_SETTING) {
216 dev_warn(&pdev->dev, "not default value in RTC reg 0x%x\n",
217 regval);
218 }
219
220 if ((regval & 1) == 0) {
221 /*
222 * Set bit to detect power loss.
223 * This bit remains until RTC power is lost.
224 */
225 regval = 1 | RTC_SETTING;
Mattias Wallinfa661252010-05-01 18:26:20 +0200226 err = abx500_set_register_interruptible(&pdev->dev, 0,
Linus Walleijbd207cf2009-08-30 23:49:04 +0200227 AB3100_RTC, regval);
228 /* Ignore any error on this write */
229 }
230
Jingoo Hanef886c4d2013-04-29 16:19:30 -0700231 rtc = devm_rtc_device_register(&pdev->dev, "ab3100-rtc",
232 &ab3100_rtc_ops, THIS_MODULE);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200233 if (IS_ERR(rtc)) {
234 err = PTR_ERR(rtc);
235 return err;
236 }
Axel Lineba93fc2010-09-22 13:04:59 -0700237 platform_set_drvdata(pdev, rtc);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200238
239 return 0;
240}
241
Linus Walleijbd207cf2009-08-30 23:49:04 +0200242static struct platform_driver ab3100_rtc_driver = {
243 .driver = {
244 .name = "ab3100-rtc",
Linus Walleijbd207cf2009-08-30 23:49:04 +0200245 },
Linus Walleijbd207cf2009-08-30 23:49:04 +0200246};
247
Jingoo Hanfb34a812013-04-29 16:18:34 -0700248module_platform_driver_probe(ab3100_rtc_driver, ab3100_rtc_probe);
Linus Walleijbd207cf2009-08-30 23:49:04 +0200249
250MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
251MODULE_DESCRIPTION("AB3100 RTC Driver");
252MODULE_LICENSE("GPL");