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Laurent Pinchart4d8864c2013-12-11 15:05:13 +01001/*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11#define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13/* CPG */
14#define R8A7791_CLK_MAIN 0
15#define R8A7791_CLK_PLL0 1
16#define R8A7791_CLK_PLL1 2
17#define R8A7791_CLK_PLL3 3
18#define R8A7791_CLK_LB 4
19#define R8A7791_CLK_QSPI 5
20#define R8A7791_CLK_SDH 6
21#define R8A7791_CLK_SD0 7
22#define R8A7791_CLK_Z 8
Sergei Shtylyovb3242522015-01-06 01:24:08 +030023#define R8A7791_CLK_RCAN 9
Sergei Shtylyovae65a8a2014-12-30 23:20:34 +030024#define R8A7791_CLK_ADSP 10
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010025
Laurent Pinchartcded80f2013-12-19 16:51:02 +010026/* MSTP0 */
27#define R8A7791_CLK_MSIOF0 0
28
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010029/* MSTP1 */
Yoshifumi Hosoya74d89d22014-10-14 16:01:43 +090030#define R8A7791_CLK_VCP0 1
31#define R8A7791_CLK_VPC0 3
32#define R8A7791_CLK_JPU 6
33#define R8A7791_CLK_SSP1 9
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010034#define R8A7791_CLK_TMU1 11
Kouei Abee4d2fd92014-10-14 16:01:41 +090035#define R8A7791_CLK_3DG 12
Yoshifumi Hosoya74d89d22014-10-14 16:01:43 +090036#define R8A7791_CLK_2DDMAC 15
37#define R8A7791_CLK_FDP1_1 18
38#define R8A7791_CLK_FDP1_0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010039#define R8A7791_CLK_TMU3 21
40#define R8A7791_CLK_TMU2 22
41#define R8A7791_CLK_CMT0 24
42#define R8A7791_CLK_TMU0 25
43#define R8A7791_CLK_VSP1_DU1 27
44#define R8A7791_CLK_VSP1_DU0 28
Laurent Pinchart58ea1d52014-04-02 16:31:47 +020045#define R8A7791_CLK_VSP1_S 31
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010046
47/* MSTP2 */
48#define R8A7791_CLK_SCIFA2 2
49#define R8A7791_CLK_SCIFA1 3
50#define R8A7791_CLK_SCIFA0 4
Laurent Pinchartcded80f2013-12-19 16:51:02 +010051#define R8A7791_CLK_MSIOF2 5
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010052#define R8A7791_CLK_SCIFB0 6
53#define R8A7791_CLK_SCIFB1 7
Laurent Pinchartcded80f2013-12-19 16:51:02 +010054#define R8A7791_CLK_MSIOF1 8
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010055#define R8A7791_CLK_SCIFB2 16
Geert Uytterhoevena505daa2014-05-12 20:49:33 +020056#define R8A7791_CLK_SYS_DMAC1 18
57#define R8A7791_CLK_SYS_DMAC0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010058
59/* MSTP3 */
60#define R8A7791_CLK_TPU0 4
61#define R8A7791_CLK_SDHI2 11
62#define R8A7791_CLK_SDHI1 12
63#define R8A7791_CLK_SDHI0 14
64#define R8A7791_CLK_MMCIF0 15
Wolfram Sangc6e8f322014-03-10 12:26:56 +010065#define R8A7791_CLK_IIC0 18
Phil Edworthy4bfb3762014-06-13 10:37:18 +010066#define R8A7791_CLK_PCIEC 19
Wolfram Sangc6e8f322014-03-10 12:26:56 +010067#define R8A7791_CLK_IIC1 23
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010068#define R8A7791_CLK_SSUSB 28
69#define R8A7791_CLK_CMT1 29
70#define R8A7791_CLK_USBDMAC0 30
71#define R8A7791_CLK_USBDMAC1 31
72
Geert Uytterhoeven62d386c2015-03-18 19:56:00 +010073/* MSTP4 */
74#define R8A7791_CLK_IRQC 7
Geert Uytterhoevenc2f2e262017-03-06 17:58:08 +010075#define R8A7791_CLK_INTC_SYS 8
Geert Uytterhoeven62d386c2015-03-18 19:56:00 +010076
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010077/* MSTP5 */
Kuninori Morimoto8994fff2014-11-03 17:45:37 -080078#define R8A7791_CLK_AUDIO_DMAC1 1
79#define R8A7791_CLK_AUDIO_DMAC0 2
Sergei Shtylyovae65a8a2014-12-30 23:20:34 +030080#define R8A7791_CLK_ADSP_MOD 6
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010081#define R8A7791_CLK_THERMAL 22
82#define R8A7791_CLK_PWM 23
83
84/* MSTP7 */
Magnus Damm6225b992014-04-07 15:04:21 +090085#define R8A7791_CLK_EHCI 3
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010086#define R8A7791_CLK_HSUSB 4
87#define R8A7791_CLK_HSCIF2 13
88#define R8A7791_CLK_SCIF5 14
89#define R8A7791_CLK_SCIF4 15
90#define R8A7791_CLK_HSCIF1 16
91#define R8A7791_CLK_HSCIF0 17
92#define R8A7791_CLK_SCIF3 18
93#define R8A7791_CLK_SCIF2 19
94#define R8A7791_CLK_SCIF1 20
95#define R8A7791_CLK_SCIF0 21
96#define R8A7791_CLK_DU1 23
97#define R8A7791_CLK_DU0 24
98#define R8A7791_CLK_LVDS0 26
99
100/* MSTP8 */
Ryo Kataokace85ad42014-12-09 13:21:22 +0900101#define R8A7791_CLK_IPMMU_SGX 0
Andrey Gusakov7408d302014-12-18 23:43:03 +0300102#define R8A7791_CLK_MLB 2
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100103#define R8A7791_CLK_VIN2 9
104#define R8A7791_CLK_VIN1 10
105#define R8A7791_CLK_VIN0 11
Sergei Shtylyoveaa870b2015-12-03 01:21:49 +0300106#define R8A7791_CLK_ETHERAVB 12
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100107#define R8A7791_CLK_ETHER 13
108#define R8A7791_CLK_SATA1 14
109#define R8A7791_CLK_SATA0 15
110
111/* MSTP9 */
Marek Vasuta56a2fe2017-04-16 18:57:08 +0200112#define R8A7791_CLK_GYROADC 1
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100113#define R8A7791_CLK_GPIO7 4
114#define R8A7791_CLK_GPIO6 5
115#define R8A7791_CLK_GPIO5 7
116#define R8A7791_CLK_GPIO4 8
117#define R8A7791_CLK_GPIO3 9
118#define R8A7791_CLK_GPIO2 10
119#define R8A7791_CLK_GPIO1 11
120#define R8A7791_CLK_GPIO0 12
121#define R8A7791_CLK_RCAN1 15
122#define R8A7791_CLK_RCAN0 16
Laurent Pinchartec71f552013-12-19 16:51:04 +0100123#define R8A7791_CLK_QSPI_MOD 17
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100124#define R8A7791_CLK_I2C5 25
125#define R8A7791_CLK_IICDVFS 26
126#define R8A7791_CLK_I2C4 27
127#define R8A7791_CLK_I2C3 28
128#define R8A7791_CLK_I2C2 29
129#define R8A7791_CLK_I2C1 30
130#define R8A7791_CLK_I2C0 31
131
Kuninori Morimotoee914152014-06-11 21:44:16 -0700132/* MSTP10 */
133#define R8A7791_CLK_SSI_ALL 5
134#define R8A7791_CLK_SSI9 6
135#define R8A7791_CLK_SSI8 7
136#define R8A7791_CLK_SSI7 8
137#define R8A7791_CLK_SSI6 9
138#define R8A7791_CLK_SSI5 10
139#define R8A7791_CLK_SSI4 11
140#define R8A7791_CLK_SSI3 12
141#define R8A7791_CLK_SSI2 13
142#define R8A7791_CLK_SSI1 14
143#define R8A7791_CLK_SSI0 15
144#define R8A7791_CLK_SCU_ALL 17
145#define R8A7791_CLK_SCU_DVC1 18
146#define R8A7791_CLK_SCU_DVC0 19
Kuninori Morimoto88401702015-07-21 00:27:03 +0000147#define R8A7791_CLK_SCU_CTU1_MIX1 20
148#define R8A7791_CLK_SCU_CTU0_MIX0 21
Kuninori Morimotoee914152014-06-11 21:44:16 -0700149#define R8A7791_CLK_SCU_SRC9 22
150#define R8A7791_CLK_SCU_SRC8 23
151#define R8A7791_CLK_SCU_SRC7 24
152#define R8A7791_CLK_SCU_SRC6 25
153#define R8A7791_CLK_SCU_SRC5 26
154#define R8A7791_CLK_SCU_SRC4 27
155#define R8A7791_CLK_SCU_SRC3 28
156#define R8A7791_CLK_SCU_SRC2 29
157#define R8A7791_CLK_SCU_SRC1 30
158#define R8A7791_CLK_SCU_SRC0 31
159
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100160/* MSTP11 */
161#define R8A7791_CLK_SCIFA3 6
162#define R8A7791_CLK_SCIFA4 7
163#define R8A7791_CLK_SCIFA5 8
164
165#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */