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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002config MIPS
3 bool
4 default y
Yury Norov942fa982018-05-16 11:18:49 +03005 select ARCH_32BIT_OFF_T if !64BIT
Paul Burtonea6a3732018-11-07 23:14:09 +00006 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
Alexander Lobakin34c01e42020-01-22 13:58:51 +03007 select ARCH_HAS_FORTIFY_SOURCE
8 select ARCH_HAS_KCOV
9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
Matt Redfearn12597982017-05-15 10:46:35 +010010 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Hassan Naveed1e359182018-11-19 16:49:37 -080011 select ARCH_HAS_UBSAN_SANITIZE_ALL
Matt Redfearn12597982017-05-15 10:46:35 +010012 select ARCH_SUPPORTS_UPROBES
Ralf Baechle1ee36302015-09-29 12:19:48 +020013 select ARCH_USE_BUILTIN_BSWAP
Matt Redfearn12597982017-05-15 10:46:35 +010014 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
Paul Burton25da4e92017-06-09 17:26:42 -070015 select ARCH_USE_QUEUED_RWLOCKS
Paul Burton0b17c962017-06-09 17:26:43 -070016 select ARCH_USE_QUEUED_SPINLOCKS
Alexandre Ghiti9035bd22019-09-23 15:39:18 -070017 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
Matt Redfearn12597982017-05-15 10:46:35 +010018 select ARCH_WANT_IPC_PARSE_VERSION
Shile Zhang10916702019-12-04 08:46:31 +080019 select BUILDTIME_TABLE_SORT
Matt Redfearn12597982017-05-15 10:46:35 +010020 select CLONE_BACKWARDS
Paul Burton57eeaced2018-11-08 23:44:55 +000021 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
Matt Redfearn12597982017-05-15 10:46:35 +010022 select CPU_PM if CPU_IDLE
23 select GENERIC_ATOMIC64 if !64BIT
24 select GENERIC_CLOCKEVENTS
25 select GENERIC_CMOS_UPDATE
26 select GENERIC_CPU_AUTOPROBE
Vincenzo Frascino24640f22019-06-21 10:52:46 +010027 select GENERIC_GETTIMEOFDAY
Paul Burtonb962aeb2018-08-29 14:54:00 -070028 select GENERIC_IOMAP
Matt Redfearn12597982017-05-15 10:46:35 +010029 select GENERIC_IRQ_PROBE
30 select GENERIC_IRQ_SHOW
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010031 select GENERIC_ISA_DMA if EISA
Antony Pavlov740129b2018-04-11 08:50:19 +010032 select GENERIC_LIB_ASHLDI3
33 select GENERIC_LIB_ASHRDI3
34 select GENERIC_LIB_CMPDI2
35 select GENERIC_LIB_LSHRDI3
36 select GENERIC_LIB_UCMPDI2
Matt Redfearn12597982017-05-15 10:46:35 +010037 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
38 select GENERIC_SMP_IDLE_THREAD
39 select GENERIC_TIME_VSYSCALL
Christoph Hellwig446f0622019-07-11 20:56:52 -070040 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
Matt Redfearn12597982017-05-15 10:46:35 +010041 select HANDLE_DOMAIN_IRQ
Paul Burton906d4412018-08-20 15:36:18 -070042 select HAVE_ARCH_COMPILER_H
Matt Redfearn12597982017-05-15 10:46:35 +010043 select HAVE_ARCH_JUMP_LABEL
Jason Wessel88547002008-07-29 15:58:53 -050044 select HAVE_ARCH_KGDB
Matt Redfearn109c32f2016-11-24 17:32:45 +000045 select HAVE_ARCH_MMAP_RND_BITS if MMU
46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
Markos Chandras490b0042014-01-22 14:40:04 +000047 select HAVE_ARCH_SECCOMP_FILTER
Ralf Baechlec0ff3c52012-08-17 08:22:04 +020048 select HAVE_ARCH_TRACEHOOK
Daniel Silsby45e03e62019-07-15 17:40:01 -040049 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
Masahiro Yamada2ff2b7e2019-08-19 14:54:20 +090050 select HAVE_ASM_MODVERSIONS
Paul Burton36366e32019-12-05 10:23:18 -080051 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
Matt Redfearn12597982017-05-15 10:46:35 +010052 select HAVE_CONTEXT_TRACKING
Frederic Weisbecker490f5612020-01-27 16:41:52 +010053 select HAVE_TIF_NOHZ
Matt Redfearn12597982017-05-15 10:46:35 +010054 select HAVE_COPY_THREAD_TLS
Wu Zhangjin64575f92010-10-27 18:59:09 +080055 select HAVE_C_RECORDMCOUNT
Matt Redfearn12597982017-05-15 10:46:35 +010056 select HAVE_DEBUG_KMEMLEAK
57 select HAVE_DEBUG_STACKOVERFLOW
Matt Redfearn12597982017-05-15 10:46:35 +010058 select HAVE_DMA_CONTIGUOUS
59 select HAVE_DYNAMIC_FTRACE
Alexander Lobakin34c01e42020-01-22 13:58:51 +030060 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
Matt Redfearn12597982017-05-15 10:46:35 +010061 select HAVE_EXIT_THREAD
Christoph Hellwig67a929e2019-07-11 20:57:14 -070062 select HAVE_FAST_GUP
Matt Redfearn12597982017-05-15 10:46:35 +010063 select HAVE_FTRACE_MCOUNT_RECORD
Wu Zhangjin29c5d342009-11-20 20:34:34 +080064 select HAVE_FUNCTION_GRAPH_TRACER
Matt Redfearn12597982017-05-15 10:46:35 +010065 select HAVE_FUNCTION_TRACER
Alexander Lobakin34c01e42020-01-22 13:58:51 +030066 select HAVE_GCC_PLUGINS
67 select HAVE_GENERIC_VDSO
Matt Redfearn12597982017-05-15 10:46:35 +010068 select HAVE_IDE
Hassan Naveedb3a428b2018-10-29 18:27:41 -070069 select HAVE_IOREMAP_PROT
Matt Redfearn12597982017-05-15 10:46:35 +010070 select HAVE_IRQ_EXIT_ON_IRQ_STACK
71 select HAVE_IRQ_TIME_ACCOUNTING
David Daneyc1bf2072010-08-03 11:22:20 -070072 select HAVE_KPROBES
73 select HAVE_KRETPROBES
Paul Burtonc0436b52018-11-21 21:56:36 +000074 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
Tejun Heo9d15ffc2011-12-08 10:22:09 -080075 select HAVE_MEMBLOCK_NODE_MAP
David Howells786d35d2012-09-28 14:31:03 +093076 select HAVE_MOD_ARCH_SPECIFIC
Petr Mladek42a0bb32016-05-20 17:00:33 -070077 select HAVE_NMI
Matt Redfearn12597982017-05-15 10:46:35 +010078 select HAVE_OPROFILE
79 select HAVE_PERF_EVENTS
Marcin Nowakowski08bccf42016-09-02 10:13:21 +020080 select HAVE_REGS_AND_STACK_ACCESS_API
Paul Burton9ea141a2018-06-14 10:13:53 -070081 select HAVE_RSEQ
Hassan Naveed16c0f032019-11-15 23:44:49 +000082 select HAVE_SPARSE_SYSCALL_NR
Masahiro Yamadad148eac2018-06-14 19:36:45 +090083 select HAVE_STACKPROTECTOR
Matt Redfearn12597982017-05-15 10:46:35 +010084 select HAVE_SYSCALL_TRACEPOINTS
Ben Hutchingsa3f14312017-10-04 03:46:14 +010085 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
Matt Redfearn12597982017-05-15 10:46:35 +010086 select IRQ_FORCED_THREADING
Christoph Hellwig6630a8e2018-11-15 20:05:37 +010087 select ISA if EISA
Matt Redfearn12597982017-05-15 10:46:35 +010088 select MODULES_USE_ELF_REL if MODULES
Alexander Lobakin34c01e42020-01-22 13:58:51 +030089 select MODULES_USE_ELF_RELA if MODULES && 64BIT
Matt Redfearn12597982017-05-15 10:46:35 +010090 select PERF_USE_VMALLOC
Arnd Bergmann05a0a342018-08-28 16:26:30 +020091 select RTC_LIB
Matt Redfearn12597982017-05-15 10:46:35 +010092 select SYSCTL_EXCEPTION_TRACE
93 select VIRT_TO_BUS
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Christoph Hellwigd3991572020-04-16 17:00:07 +020095config MIPS_FIXUP_BIGPHYS_ADDR
96 bool
97
Linus Torvalds1da177e2005-04-16 15:20:36 -070098menu "Machine selection"
99
Ralf Baechle5e83d432005-10-29 19:32:41 +0100100choice
101 prompt "System type"
Matt Redfearnd41e6852016-12-14 15:09:42 +0000102 default MIPS_GENERIC
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
Paul Burtoneed0eab2016-10-05 18:18:20 +0100104config MIPS_GENERIC
105 bool "Generic board-agnostic MIPS kernel"
106 select BOOT_RAW
107 select BUILTIN_DTB
108 select CEVT_R4K
109 select CLKSRC_MIPS_GIC
110 select COMMON_CLK
Paul Burtoneed0eab2016-10-05 18:18:20 +0100111 select CPU_MIPSR2_IRQ_EI
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300112 select CPU_MIPSR2_IRQ_VI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100113 select CSRC_R4K
114 select DMA_PERDEV_COHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100115 select HAVE_PCI
Paul Burtoneed0eab2016-10-05 18:18:20 +0100116 select IRQ_MIPS_CPU
Paul Burton0211d492018-07-27 18:23:21 -0700117 select MIPS_AUTO_PFN_OFFSET
Paul Burtoneed0eab2016-10-05 18:18:20 +0100118 select MIPS_CPU_SCACHE
119 select MIPS_GIC
120 select MIPS_L1_CACHE_SHIFT_7
121 select NO_EXCEPT_FILL
122 select PCI_DRIVERS_GENERIC
Paul Burtoneed0eab2016-10-05 18:18:20 +0100123 select SMP_UP if SMP
Matt Redfearna3078e52017-01-23 14:08:13 +0000124 select SWAP_IO_SPACE
Paul Burtoneed0eab2016-10-05 18:18:20 +0100125 select SYS_HAS_CPU_MIPS32_R1
126 select SYS_HAS_CPU_MIPS32_R2
127 select SYS_HAS_CPU_MIPS32_R6
128 select SYS_HAS_CPU_MIPS64_R1
129 select SYS_HAS_CPU_MIPS64_R2
130 select SYS_HAS_CPU_MIPS64_R6
131 select SYS_SUPPORTS_32BIT_KERNEL
132 select SYS_SUPPORTS_64BIT_KERNEL
133 select SYS_SUPPORTS_BIG_ENDIAN
134 select SYS_SUPPORTS_HIGHMEM
135 select SYS_SUPPORTS_LITTLE_ENDIAN
136 select SYS_SUPPORTS_MICROMIPS
Paul Burtoneed0eab2016-10-05 18:18:20 +0100137 select SYS_SUPPORTS_MIPS16
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300138 select SYS_SUPPORTS_MIPS_CPS
Paul Burtoneed0eab2016-10-05 18:18:20 +0100139 select SYS_SUPPORTS_MULTITHREADING
140 select SYS_SUPPORTS_RELOCATABLE
141 select SYS_SUPPORTS_SMARTMIPS
Alexander Lobakin34c01e42020-01-22 13:58:51 +0300142 select UHI_BOOT
Corentin Labbe2e6522c2018-01-17 19:56:38 +0100143 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
144 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
145 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
146 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
147 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
148 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Paul Burtoneed0eab2016-10-05 18:18:20 +0100149 select USE_OF
150 help
151 Select this to build a kernel which aims to support multiple boards,
152 generally using a flattened device tree passed from the bootloader
153 using the boot protocol defined in the UHI (Unified Hosting
154 Interface) specification.
155
Manuel Lauss42a4f172010-07-15 21:45:04 +0200156config MIPS_ALCHEMY
Yoichi Yuasac3543e22007-05-11 20:44:30 +0900157 bool "Alchemy processor based machines"
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200158 select PHYS_ADDR_T_64BIT
Ralf Baechlef772cdb2012-11-30 17:27:27 +0100159 select CEVT_R4K
Steven J. Hilld7ea3352012-11-14 23:34:17 -0600160 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200161 select IRQ_MIPS_CPU
Manuel Lauss88e9a932014-02-20 14:59:23 +0100162 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
Christoph Hellwigd3991572020-04-16 17:00:07 +0200163 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
Manuel Lauss42a4f172010-07-15 21:45:04 +0200164 select SYS_HAS_CPU_MIPS32_R1
165 select SYS_SUPPORTS_32BIT_KERNEL
166 select SYS_SUPPORTS_APM_EMULATION
Linus Walleijd30a2b42016-04-19 11:23:22 +0200167 select GPIOLIB
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800168 select SYS_SUPPORTS_ZBOOT
Manuel Lauss47440222014-07-23 16:36:48 +0200169 select COMMON_CLK
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200171config AR7
172 bool "Texas Instruments AR7"
173 select BOOT_ELF32
174 select DMA_NONCOHERENT
175 select CEVT_R4K
176 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200177 select IRQ_MIPS_CPU
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200178 select NO_EXCEPT_FILL
179 select SWAP_IO_SPACE
180 select SYS_HAS_CPU_MIPS32_R1
181 select SYS_HAS_EARLY_PRINTK
182 select SYS_SUPPORTS_32BIT_KERNEL
183 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200184 select SYS_SUPPORTS_MIPS16
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800185 select SYS_SUPPORTS_ZBOOT_UART16550
Linus Walleijd30a2b42016-04-19 11:23:22 +0200186 select GPIOLIB
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200187 select VLYNQ
Yoichi Yuasa8551fb62012-08-01 15:38:00 +0900188 select HAVE_CLK
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200189 help
190 Support for the Texas Instruments AR7 System-on-a-Chip
191 family: TNETD7100, 7200 and 7300.
192
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400193config ATH25
194 bool "Atheros AR231x/AR531x SoC support"
195 select CEVT_R4K
196 select CSRC_R4K
197 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200198 select IRQ_MIPS_CPU
Sergey Ryazanov1753e742014-10-29 03:18:41 +0400199 select IRQ_DOMAIN
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400200 select SYS_HAS_CPU_MIPS32_R1
201 select SYS_SUPPORTS_BIG_ENDIAN
202 select SYS_SUPPORTS_32BIT_KERNEL
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +0400203 select SYS_HAS_EARLY_PRINTK
Sergey Ryazanov43cc7392014-10-29 03:18:38 +0400204 help
205 Support for Atheros AR231x and Atheros AR531x based boards
206
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100207config ATH79
208 bool "Atheros AR71XX/AR724X/AR913X based boards"
Alban Bedelff591a92015-08-03 19:23:52 +0200209 select ARCH_HAS_RESET_CONTROLLER
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100210 select BOOT_RAW
211 select CEVT_R4K
212 select CSRC_R4K
213 select DMA_NONCOHERENT
Linus Walleijd30a2b42016-04-19 11:23:22 +0200214 select GPIOLIB
John Crispina08227a2018-07-20 13:58:20 +0200215 select PINCTRL
Gabor Juhos94638062012-08-04 18:01:26 +0200216 select HAVE_CLK
Alban Bedel411520a2015-04-19 14:30:04 +0200217 select COMMON_CLK
Gabor Juhos2c4f1ac2013-08-28 10:41:47 +0200218 select CLKDEV_LOOKUP
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200219 select IRQ_MIPS_CPU
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100220 select SYS_HAS_CPU_MIPS32_R2
221 select SYS_HAS_EARLY_PRINTK
222 select SYS_SUPPORTS_32BIT_KERNEL
223 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200224 select SYS_SUPPORTS_MIPS16
Alban Bedelb3f0a252016-01-26 09:38:29 +0100225 select SYS_SUPPORTS_ZBOOT_UART_PROM
Alban Bedel03c8c402015-05-31 01:52:25 +0200226 select USE_OF
Alban Bedel53d473f2018-03-24 23:47:22 +0100227 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100228 help
229 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
230
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800231config BMIPS_GENERIC
232 bool "Broadcom Generic BMIPS kernel"
Christoph Hellwigd59098a2018-06-15 13:08:52 +0200233 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
234 select ARCH_HAS_PHYS_TO_DMA
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700235 select BOOT_RAW
236 select NO_EXCEPT_FILL
237 select USE_OF
238 select CEVT_R4K
239 select CSRC_R4K
240 select SYNC_R4K
241 select COMMON_CLK
Simon Arlottc7c42ec2015-11-22 14:30:14 +0000242 select BCM6345_L1_IRQ
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800243 select BCM7038_L1_IRQ
244 select BCM7120_L2_IRQ
245 select BRCMSTB_L2_IRQ
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200246 select IRQ_MIPS_CPU
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800247 select DMA_NONCOHERENT
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700248 select SYS_SUPPORTS_32BIT_KERNEL
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800249 select SYS_SUPPORTS_LITTLE_ENDIAN
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700250 select SYS_SUPPORTS_BIG_ENDIAN
251 select SYS_SUPPORTS_HIGHMEM
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800252 select SYS_HAS_CPU_BMIPS32_3300
253 select SYS_HAS_CPU_BMIPS4350
254 select SYS_HAS_CPU_BMIPS4380
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700255 select SYS_HAS_CPU_BMIPS5000
256 select SWAP_IO_SPACE
Kevin Cernekee60b858f2014-12-25 09:49:17 -0800257 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
258 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
259 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
260 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Justin Chen4dc47042017-05-24 10:55:16 -0700261 select HARDIRQS_SW_RESEND
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700262 help
Kevin Cernekee5f2d4452014-12-25 09:49:00 -0800263 Build a generic DT-based kernel image that boots on select
264 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
265 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
266 must be set appropriately for your board.
Kevin Cernekeed666cd02014-10-20 21:28:05 -0700267
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200268config BCM47XX
Florian Fainellic6193662010-03-25 11:42:41 +0100269 bool "Broadcom BCM47XX based boards"
Hauke Mehrtensfe08f8c2012-12-26 20:06:17 +0000270 select BOOT_RAW
Ralf Baechle42f77542007-10-18 17:48:11 +0100271 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000272 select CSRC_R4K
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200273 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100274 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200275 select IRQ_MIPS_CPU
Markos Chandras314878d2013-07-23 15:40:37 +0100276 select SYS_HAS_CPU_MIPS32_R1
Hauke Mehrtensdd54ded2012-12-26 20:06:18 +0000277 select NO_EXCEPT_FILL
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200278 select SYS_SUPPORTS_32BIT_KERNEL
279 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200280 select SYS_SUPPORTS_MIPS16
Aaro Koskinen65078312018-01-17 00:21:44 +0200281 select SYS_SUPPORTS_ZBOOT
Aurelien Jarno25e5fb92007-09-25 15:41:24 +0200282 select SYS_HAS_EARLY_PRINTK
Ralf Baechlee6086552014-03-26 21:40:25 +0100283 select USE_GENERIC_EARLY_PRINTK_8250
Rafał Miłeckic949c0b2014-06-17 16:36:50 +0200284 select GPIOLIB
285 select LEDS_GPIO_REGISTER
Rafał Miłeckif6e734a2015-06-10 23:05:08 +0200286 select BCM47XX_NVRAM
Rafał Miłecki2ab71a02016-01-25 09:50:29 +0100287 select BCM47XX_SPROM
Matt Redfearndfe00492017-11-14 17:16:27 +0000288 select BCM47XX_SSB if !BCM47XX_BCMA
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200289 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100290 Support for BCM47XX based boards
Aurelien Jarno1c0c13e2007-09-25 15:40:12 +0200291
Maxime Bizone7300d02009-08-18 13:23:37 +0100292config BCM63XX
293 bool "Broadcom BCM63XX based boards"
Florian Fainelliae8de612013-06-18 16:55:39 +0000294 select BOOT_RAW
Maxime Bizone7300d02009-08-18 13:23:37 +0100295 select CEVT_R4K
296 select CSRC_R4K
Jonas Gorskifc264022014-07-08 16:26:13 +0200297 select SYNC_R4K
Maxime Bizone7300d02009-08-18 13:23:37 +0100298 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200299 select IRQ_MIPS_CPU
Maxime Bizone7300d02009-08-18 13:23:37 +0100300 select SYS_SUPPORTS_32BIT_KERNEL
301 select SYS_SUPPORTS_BIG_ENDIAN
302 select SYS_HAS_EARLY_PRINTK
303 select SWAP_IO_SPACE
Linus Walleijd30a2b42016-04-19 11:23:22 +0200304 select GPIOLIB
Yoichi Yuasa3e82eee2012-08-01 15:39:52 +0900305 select HAVE_CLK
Florian Fainelliaf2418b2014-01-14 09:54:40 -0800306 select MIPS_L1_CACHE_SHIFT_4
Jonas Gorskic5af3c22017-09-20 13:14:01 +0200307 select CLKDEV_LOOKUP
Maxime Bizone7300d02009-08-18 13:23:37 +0100308 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100309 Support for BCM63XX based boards
Maxime Bizone7300d02009-08-18 13:23:37 +0100310
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311config MIPS_COBALT
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200312 bool "Cobalt Server"
Ralf Baechle42f77542007-10-18 17:48:11 +0100313 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000314 select CSRC_R4K
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +0900315 select CEVT_GT641XX
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100317 select FORCE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100318 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 select I8259
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200320 select IRQ_MIPS_CPU
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +0900321 select IRQ_GT641XX
Yoichi Yuasa252161e2007-03-14 21:51:26 +0900322 select PCI_GT64XXX_PCI0
Ralf Baechle7cf80532005-10-20 22:33:09 +0100323 select SYS_HAS_CPU_NEVADA
Yoichi Yuasa0a22e0d2007-03-02 12:42:33 +0900324 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700325 select SYS_SUPPORTS_32BIT_KERNEL
Florian Fainelli0e8774b2008-01-15 19:42:57 +0100326 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100327 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlee6086552014-03-26 21:40:25 +0100328 select USE_GENERIC_EARLY_PRINTK_8250
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329
330config MACH_DECSTATION
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200331 bool "DECstations"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 select BOOT_ELF32
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +0900333 select CEVT_DS1287
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100334 select CEVT_R4K if CPU_R4X00
Yoichi Yuasa42474172008-04-24 09:48:40 +0900335 select CSRC_IOASIC
Maciej W. Rozycki81d10ba2014-04-06 21:46:05 +0100336 select CSRC_R4K if CPU_R4X00
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +0100337 select CPU_DADDI_WORKAROUNDS if 64BIT
338 select CPU_R4000_WORKAROUNDS if 64BIT
339 select CPU_R4400_WORKAROUNDS if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340 select DMA_NONCOHERENT
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700341 select NO_IOPORT_MAP
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200342 select IRQ_MIPS_CPU
Ralf Baechle7cf80532005-10-20 22:33:09 +0100343 select SYS_HAS_CPU_R3000
344 select SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700345 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800346 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100347 select SYS_SUPPORTS_LITTLE_ENDIAN
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900348 select SYS_SUPPORTS_128HZ
349 select SYS_SUPPORTS_256HZ
350 select SYS_SUPPORTS_1024HZ
Florian Fainelli930beb52014-01-14 09:54:38 -0800351 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle5e83d432005-10-29 19:32:41 +0100352 help
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 This enables support for DEC's MIPS based workstations. For details
354 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
355 DECstation porting pages on <http://decstation.unix-ag.org/>.
356
357 If you have one of the following DECstation Models you definitely
358 want to choose R4xx0 for the CPU Type:
359
Ralf Baechle93088162007-08-29 14:21:45 +0100360 DECstation 5000/50
361 DECstation 5000/150
362 DECstation 5000/260
363 DECsystem 5900/260
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364
365 otherwise choose R3000.
366
Ralf Baechle5e83d432005-10-29 19:32:41 +0100367config MACH_JAZZ
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200368 bool "Jazz family of machines"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200369 select ARC_MEMORY
370 select ARC_PROMLIB
Ralf Baechlea211a0822018-02-05 15:37:43 +0100371 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100372 select ARCH_MIGHT_HAVE_PC_SERIO
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100373 select FW_ARC
374 select FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100375 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechle42f77542007-10-18 17:48:11 +0100376 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000377 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100378 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100379 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100380 select HAVE_PCSPKR_PLATFORM
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200381 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100382 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100383 select I8259
384 select ISA
Ralf Baechle7cf80532005-10-20 22:33:09 +0100385 select SYS_HAS_CPU_R4X00
Ralf Baechle5e83d432005-10-29 19:32:41 +0100386 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800387 select SYS_SUPPORTS_64BIT_KERNEL
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +0900388 select SYS_SUPPORTS_100HZ
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100390 This a family of machines based on the MIPS R4030 chipset which was
391 used by several vendors to build RISC/os and Windows NT workstations.
392 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
393 Olivetti M700-10 workstations.
Ralf Baechle5e83d432005-10-29 19:32:41 +0100394
Paul Burtonde361e82015-05-24 16:11:13 +0100395config MACH_INGENIC
396 bool "Ingenic SoC based machines"
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000397 select SYS_SUPPORTS_32BIT_KERNEL
398 select SYS_SUPPORTS_LITTLE_ENDIAN
Lluís Batlle i Rossellf9c9aff2012-03-30 16:48:05 +0200399 select SYS_SUPPORTS_ZBOOT_UART16550
Daniel Silsbyb35d2652019-07-15 17:40:02 -0400400 select CPU_SUPPORTS_HUGEPAGES
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000401 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200402 select IRQ_MIPS_CPU
Paul Cercueil37b4c3c2017-05-12 18:52:58 +0200403 select PINCTRL
Linus Walleijd30a2b42016-04-19 11:23:22 +0200404 select GPIOLIB
Paul Burtonff1930c2015-05-24 16:11:36 +0100405 select COMMON_CLK
Lars-Peter Clausen83bc7692011-09-24 02:29:46 +0200406 select GENERIC_IRQ_CHIP
Paul Cercueil15205fc2019-02-21 19:43:10 -0300407 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
Paul Burtonffb1843d052015-05-24 16:11:15 +0100408 select USE_OF
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +0000409
John Crispin171bb2f2011-03-30 09:27:47 +0200410config LANTIQ
411 bool "Lantiq based platforms"
412 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200413 select IRQ_MIPS_CPU
John Crispin171bb2f2011-03-30 09:27:47 +0200414 select CEVT_R4K
415 select CSRC_R4K
416 select SYS_HAS_CPU_MIPS32_R1
417 select SYS_HAS_CPU_MIPS32_R2
418 select SYS_SUPPORTS_BIG_ENDIAN
419 select SYS_SUPPORTS_32BIT_KERNEL
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200420 select SYS_SUPPORTS_MIPS16
John Crispin171bb2f2011-03-30 09:27:47 +0200421 select SYS_SUPPORTS_MULTITHREADING
James Hoganf35764e2018-01-15 20:54:35 +0000422 select SYS_SUPPORTS_VPE_LOADER
John Crispin171bb2f2011-03-30 09:27:47 +0200423 select SYS_HAS_EARLY_PRINTK
Linus Walleijd30a2b42016-04-19 11:23:22 +0200424 select GPIOLIB
John Crispin171bb2f2011-03-30 09:27:47 +0200425 select SWAP_IO_SPACE
426 select BOOT_RAW
John Crispin287e3f32012-04-17 15:53:19 +0200427 select CLKDEV_LOOKUP
John Crispina0392222012-04-13 20:56:13 +0200428 select USE_OF
John Crispin3f8c50c2012-08-28 12:44:59 +0200429 select PINCTRL
430 select PINCTRL_LANTIQ
John Crispinc5307812013-09-03 13:18:12 +0200431 select ARCH_HAS_RESET_CONTROLLER
432 select RESET_CONTROLLER
John Crispin171bb2f2011-03-30 09:27:47 +0200433
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200434config LASAT
435 bool "LASAT Networks platforms"
Ralf Baechle42f77542007-10-18 17:48:11 +0100436 select CEVT_R4K
Ralf Baechle16f0bbb2014-06-26 14:43:01 +0100437 select CRC32
Ralf Baechle940f6b42007-11-24 22:33:28 +0000438 select CSRC_R4K
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200439 select DMA_NONCOHERENT
440 select SYS_HAS_EARLY_PRINTK
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100441 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200442 select IRQ_MIPS_CPU
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200443 select PCI_GT64XXX_PCI0
444 select MIPS_NILE4
445 select R5000_CPU_SCACHE
446 select SYS_HAS_CPU_R5000
447 select SYS_SUPPORTS_32BIT_KERNEL
448 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
449 select SYS_SUPPORTS_LITTLE_ENDIAN
Brian Murphy1f21d2b2007-08-21 22:34:16 +0200450
Huacai Chen30ad29b2015-04-21 10:00:35 +0800451config MACH_LOONGSON32
Huacai Chencaed1d12019-11-04 14:11:21 +0800452 bool "Loongson 32-bit family of machines"
Wu Zhangjinc7e8c662010-01-04 17:16:46 +0800453 select SYS_SUPPORTS_ZBOOT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900454 help
Huacai Chen30ad29b2015-04-21 10:00:35 +0800455 This enables support for the Loongson-1 family of machines.
Wu Zhangjin85749d22009-07-02 23:26:45 +0800456
Huacai Chen30ad29b2015-04-21 10:00:35 +0800457 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
458 the Institute of Computing Technology (ICT), Chinese Academy of
459 Sciences (CAS).
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900460
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800461config MACH_LOONGSON2EF
462 bool "Loongson-2E/F family of machines"
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200463 select SYS_SUPPORTS_ZBOOT
464 help
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800465 This enables the support of early Loongson-2E/F family of machines.
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200466
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800467config MACH_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +0800468 bool "Loongson 64-bit family of machines"
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800469 select ARCH_SPARSEMEM_ENABLE
470 select ARCH_MIGHT_HAVE_PC_PARPORT
471 select ARCH_MIGHT_HAVE_PC_SERIO
472 select GENERIC_ISA_DMA_SUPPORT_BROKEN
473 select BOOT_ELF32
474 select BOARD_SCACHE
475 select CSRC_R4K
476 select CEVT_R4K
477 select CPU_HAS_WB
478 select FORCE_PCI
479 select ISA
480 select I8259
481 select IRQ_MIPS_CPU
Tiezhu Yang5125bfe2020-03-31 15:00:06 +0800482 select NR_CPUS_DEFAULT_64
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800483 select USE_GENERIC_EARLY_PRINTK_8250
484 select SYS_HAS_CPU_LOONGSON64
485 select SYS_HAS_EARLY_PRINTK
486 select SYS_SUPPORTS_SMP
487 select SYS_SUPPORTS_HOTPLUG_CPU
488 select SYS_SUPPORTS_NUMA
489 select SYS_SUPPORTS_64BIT_KERNEL
490 select SYS_SUPPORTS_HIGHMEM
491 select SYS_SUPPORTS_LITTLE_ENDIAN
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800492 select SYS_SUPPORTS_ZBOOT
Jiaxun Yang6fbde6b2019-10-20 23:01:36 +0800493 select ZONE_DMA32
494 select NUMA
Jiaxun Yang87fcfa72020-03-25 11:55:02 +0800495 select COMMON_CLK
496 select USE_OF
497 select BUILTIN_DTB
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +0800498 help
Huacai Chencaed1d12019-11-04 14:11:21 +0800499 This enables the support of Loongson-2/3 family of machines.
500
501 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
502 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
503 and Loongson-2F which will be removed), developed by the Institute
504 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
Kelvin Cheungca585cf2012-07-25 16:17:24 +0200505
Andrew Bresticker6a438302015-03-16 14:43:10 -0700506config MACH_PISTACHIO
507 bool "IMG Pistachio SoC based boards"
Andrew Bresticker6a438302015-03-16 14:43:10 -0700508 select BOOT_ELF32
509 select BOOT_RAW
510 select CEVT_R4K
511 select CLKSRC_MIPS_GIC
512 select COMMON_CLK
513 select CSRC_R4K
Zubair Lutfullah Kakakhel645c7822016-06-03 09:35:00 +0100514 select DMA_NONCOHERENT
Linus Walleijd30a2b42016-04-19 11:23:22 +0200515 select GPIOLIB
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200516 select IRQ_MIPS_CPU
Andrew Bresticker6a438302015-03-16 14:43:10 -0700517 select MFD_SYSCON
518 select MIPS_CPU_SCACHE
519 select MIPS_GIC
520 select PINCTRL
521 select REGULATOR
522 select SYS_HAS_CPU_MIPS32_R2
523 select SYS_SUPPORTS_32BIT_KERNEL
524 select SYS_SUPPORTS_LITTLE_ENDIAN
525 select SYS_SUPPORTS_MIPS_CPS
526 select SYS_SUPPORTS_MULTITHREADING
Matt Redfearn41cc07b2016-05-25 12:58:40 +0100527 select SYS_SUPPORTS_RELOCATABLE
Andrew Bresticker6a438302015-03-16 14:43:10 -0700528 select SYS_SUPPORTS_ZBOOT
Ezequiel Garcia018f62e2015-04-28 19:08:35 -0300529 select SYS_HAS_EARLY_PRINTK
530 select USE_GENERIC_EARLY_PRINTK_8250
Andrew Bresticker6a438302015-03-16 14:43:10 -0700531 select USE_OF
532 help
533 This enables support for the IMG Pistachio SoC platform.
534
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535config MIPS_MALTA
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200536 bool "MIPS Malta board"
Ralf Baechle61ed2422005-09-15 08:52:34 +0000537 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100538 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100539 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 select BOOT_ELF32
Ralf Baechlefa71c962008-01-29 10:15:00 +0000541 select BOOT_RAW
Paul Burtone8823d22015-05-22 16:51:02 +0100542 select BUILTIN_DTB
Ralf Baechle42f77542007-10-18 17:48:11 +0100543 select CEVT_R4K
Andrew Brestickerfa5635a2014-10-20 12:03:58 -0700544 select CLKSRC_MIPS_GIC
Guenter Roeck42b002a2015-08-22 02:40:41 -0700545 select COMMON_CLK
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200546 select CSRC_R4K
Felix Fietkau885014b2013-09-27 14:41:44 +0200547 select DMA_MAYBE_COHERENT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548 select GENERIC_ISA_DMA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100549 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100550 select HAVE_PCI
Ralf Baechled865bea2007-10-11 23:46:10 +0100551 select I8253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552 select I8259
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200553 select IRQ_MIPS_CPU
Ralf Baechle5e83d432005-10-29 19:32:41 +0100554 select MIPS_BONITO64
Chris Dearman9318c512006-06-20 17:15:20 +0100555 select MIPS_CPU_SCACHE
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200556 select MIPS_GIC
Kevin Cernekeea7ef1ea2014-10-20 21:27:57 -0700557 select MIPS_L1_CACHE_SHIFT_6
Ralf Baechle5e83d432005-10-29 19:32:41 +0100558 select MIPS_MSC
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200559 select PCI_GT64XXX_PCI0
Paul Burtonecafe3e2015-09-22 11:58:43 -0700560 select SMP_UP if SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100562 select SYS_HAS_CPU_MIPS32_R1
563 select SYS_HAS_CPU_MIPS32_R2
Markos Chandrasbfc3c5a2014-01-16 13:12:36 +0000564 select SYS_HAS_CPU_MIPS32_R3_5
Steven J. Hillc5b36782015-02-26 18:16:38 -0600565 select SYS_HAS_CPU_MIPS32_R5
Markos Chandras575509b2014-11-19 11:31:56 +0000566 select SYS_HAS_CPU_MIPS32_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100567 select SYS_HAS_CPU_MIPS64_R1
Leonid Yegoshin5d9fbed2012-07-19 09:11:15 +0200568 select SYS_HAS_CPU_MIPS64_R2
Markos Chandras575509b2014-11-19 11:31:56 +0000569 select SYS_HAS_CPU_MIPS64_R6
Ralf Baechle7cf80532005-10-20 22:33:09 +0100570 select SYS_HAS_CPU_NEVADA
571 select SYS_HAS_CPU_RM7000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700572 select SYS_SUPPORTS_32BIT_KERNEL
573 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100574 select SYS_SUPPORTS_BIG_ENDIAN
Steven J. Hillc5b36782015-02-26 18:16:38 -0600575 select SYS_SUPPORTS_HIGHMEM
Ralf Baechle5e83d432005-10-29 19:32:41 +0100576 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki424ebcd2014-11-15 22:07:07 +0000577 select SYS_SUPPORTS_MICROMIPS
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200578 select SYS_SUPPORTS_MIPS16
Tim Anderson03650702009-06-17 16:22:53 -0700579 select SYS_SUPPORTS_MIPS_CMP
Paul Burtone56b6aa2014-01-15 10:31:56 +0000580 select SYS_SUPPORTS_MIPS_CPS
Ralf Baechlef41ae0b2006-06-05 17:24:46 +0100581 select SYS_SUPPORTS_MULTITHREADING
Maksym Kokhan47bf2b02018-11-12 19:00:59 +0200582 select SYS_SUPPORTS_RELOCATABLE
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100583 select SYS_SUPPORTS_SMARTMIPS
James Hoganf35764e2018-01-15 20:54:35 +0000584 select SYS_SUPPORTS_VPE_LOADER
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +0800585 select SYS_SUPPORTS_ZBOOT
Paul Burtone8823d22015-05-22 16:51:02 +0100586 select USE_OF
James Hoganabcc82b2015-04-27 15:07:19 +0100587 select ZONE_DMA32 if 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 help
Maciej W. Rozyckif638d192005-02-02 22:23:46 +0000589 This enables support for the MIPS Technologies Malta evaluation
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590 board.
591
Joshua Henderson2572f002016-01-13 18:15:39 -0700592config MACH_PIC32
593 bool "Microchip PIC32 Family"
594 help
595 This enables support for the Microchip PIC32 family of platforms.
596
597 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
598 microcontrollers.
599
Ralf Baechlea83860c2009-03-13 21:17:57 +0100600config NEC_MARKEINS
601 bool "NEC EMMA2RH Mark-eins board"
602 select SOC_EMMA2RH
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100603 select HAVE_PCI
Ralf Baechlea83860c2009-03-13 21:17:57 +0100604 help
605 This enables support for the NEC Electronics Mark-eins boards.
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900606
Ralf Baechle5e83d432005-10-29 19:32:41 +0100607config MACH_VR41XX
Yoichi Yuasa74142d62007-04-26 19:45:09 +0900608 bool "NEC VR4100 series based machines"
Ralf Baechle42f77542007-10-18 17:48:11 +0100609 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000610 select CSRC_R4K
Ralf Baechle7cf80532005-10-20 22:33:09 +0100611 select SYS_HAS_CPU_VR41XX
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200612 select SYS_SUPPORTS_MIPS16
Linus Walleijd30a2b42016-04-19 11:23:22 +0200613 select GPIOLIB
Ralf Baechle5e83d432005-10-29 19:32:41 +0100614
Daniel Lairdedb63102008-06-16 15:49:21 +0100615config NXP_STB220
616 bool "NXP STB220 board"
617 select SOC_PNX833X
618 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100619 Support for NXP Semiconductors STB220 Development Board.
Daniel Lairdedb63102008-06-16 15:49:21 +0100620
621config NXP_STB225
622 bool "NXP 225 board"
623 select SOC_PNX833X
624 select SOC_PNX8335
625 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100626 Support for NXP Semiconductors STB225 Development Board.
Daniel Lairdedb63102008-06-16 15:49:21 +0100627
Marc St-Jean9267a302007-06-14 15:55:31 -0600628config PMC_MSP
629 bool "PMC-Sierra MSP chipsets"
Anoop P A39d30c12010-11-18 13:42:28 +0530630 select CEVT_R4K
631 select CSRC_R4K
Marc St-Jean9267a302007-06-14 15:55:31 -0600632 select DMA_NONCOHERENT
633 select SWAP_IO_SPACE
634 select NO_EXCEPT_FILL
635 select BOOT_RAW
636 select SYS_HAS_CPU_MIPS32_R1
637 select SYS_HAS_CPU_MIPS32_R2
638 select SYS_SUPPORTS_32BIT_KERNEL
639 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200640 select SYS_SUPPORTS_MIPS16
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200641 select IRQ_MIPS_CPU
Marc St-Jean9267a302007-06-14 15:55:31 -0600642 select SERIAL_8250
643 select SERIAL_8250_CONSOLE
Florian Fainelli9296d942013-04-09 14:29:26 +0200644 select USB_EHCI_BIG_ENDIAN_MMIO
645 select USB_EHCI_BIG_ENDIAN_DESC
Marc St-Jean9267a302007-06-14 15:55:31 -0600646 help
647 This adds support for the PMC-Sierra family of Multi-Service
648 Processor System-On-A-Chips. These parts include a number
649 of integrated peripherals, interfaces and DSPs in addition to
650 a variety of MIPS cores.
651
John Crispinae2b5bb2013-01-20 22:05:30 +0100652config RALINK
653 bool "Ralink based machines"
654 select CEVT_R4K
655 select CSRC_R4K
656 select BOOT_RAW
657 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200658 select IRQ_MIPS_CPU
John Crispinae2b5bb2013-01-20 22:05:30 +0100659 select USE_OF
660 select SYS_HAS_CPU_MIPS32_R1
661 select SYS_HAS_CPU_MIPS32_R2
662 select SYS_SUPPORTS_32BIT_KERNEL
663 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +0200664 select SYS_SUPPORTS_MIPS16
John Crispinae2b5bb2013-01-20 22:05:30 +0100665 select SYS_HAS_EARLY_PRINTK
John Crispinae2b5bb2013-01-20 22:05:30 +0100666 select CLKDEV_LOOKUP
John Crispin2a153f12013-09-04 00:16:59 +0200667 select ARCH_HAS_RESET_CONTROLLER
668 select RESET_CONTROLLER
John Crispinae2b5bb2013-01-20 22:05:30 +0100669
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670config SGI_IP22
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200671 bool "SGI IP22 (Indy/Indigo2)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200672 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200673 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100674 select FW_ARC
675 select FW_ARC32
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100676 select ARCH_MIGHT_HAVE_PC_SERIO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100678 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000679 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100680 select DEFAULT_SGI_PARTITION
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 select DMA_NONCOHERENT
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100682 select HAVE_EISA
Ralf Baechled865bea2007-10-11 23:46:10 +0100683 select I8253
Thomas Bogendoerfer68de4802007-11-23 20:34:16 +0100684 select I8259
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685 select IP22_CPU_SCACHE
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200686 select IRQ_MIPS_CPU
Ralf Baechleaa414df2006-11-30 01:14:51 +0000687 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100688 select SGI_HAS_I8042
689 select SGI_HAS_INDYDOG
Thomas Bogendoerfer36e5c212008-07-16 14:06:15 +0200690 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100691 select SGI_HAS_SEEQ
692 select SGI_HAS_WD93
693 select SGI_HAS_ZILOG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700694 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100695 select SYS_HAS_CPU_R4X00
696 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200697 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700698 select SYS_SUPPORTS_32BIT_KERNEL
699 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100700 select SYS_SUPPORTS_BIG_ENDIAN
Florian Fainelli930beb52014-01-14 09:54:38 -0800701 select MIPS_L1_CACHE_SHIFT_7
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702 help
703 This are the SGI Indy, Challenge S and Indigo2, as well as certain
704 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
705 that runs on these, say Y here.
706
707config SGI_IP27
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200708 bool "SGI IP27 (Origin200/2000)"
Christoph Hellwig54aed4d2018-06-15 13:08:44 +0200709 select ARCH_HAS_PHYS_TO_DMA
Mike Rapoport397dc002019-09-16 14:13:10 +0300710 select ARCH_SPARSEMEM_ENABLE
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100711 select FW_ARC
712 select FW_ARC64
Thomas Bogendoerfere9422422019-10-22 18:13:15 +0200713 select ARC_CMDLINE_ONLY
Ralf Baechle5e83d432005-10-29 19:32:41 +0100714 select BOOT_ELF64
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100715 select DEFAULT_SGI_PARTITION
Ralf Baechle36a88532007-03-01 11:56:43 +0000716 select SYS_HAS_EARLY_PRINTK
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100717 select HAVE_PCI
Thomas Bogendoerfer69a07a42019-02-19 16:57:20 +0100718 select IRQ_MIPS_CPU
Thomas Bogendoerfere6308b62019-05-07 23:09:15 +0200719 select IRQ_DOMAIN_HIERARCHY
Ralf Baechle130e2fb2007-02-06 16:53:15 +0000720 select NR_CPUS_DEFAULT_64
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +0200721 select PCI_DRIVERS_GENERIC
722 select PCI_XTALK_BRIDGE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100723 select SYS_HAS_CPU_R10000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700724 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100725 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechled8cb4e12006-06-11 23:03:08 +0100726 select SYS_SUPPORTS_NUMA
Ralf Baechle1a5c5de2006-11-02 17:23:33 +0000727 select SYS_SUPPORTS_SMP
Florian Fainelli930beb52014-01-14 09:54:38 -0800728 select MIPS_L1_CACHE_SHIFT_7
Linus Torvalds1da177e2005-04-16 15:20:36 -0700729 help
730 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
731 workstations. To compile a Linux kernel that runs on these, say Y
732 here.
733
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100734config SGI_IP28
Kees Cook7d607172013-01-16 18:53:19 -0800735 bool "SGI IP28 (Indigo2 R10k)"
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200736 select ARC_MEMORY
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200737 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100738 select FW_ARC
739 select FW_ARC64
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100740 select ARCH_MIGHT_HAVE_PC_SERIO
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100741 select BOOT_ELF64
742 select CEVT_R4K
743 select CSRC_R4K
744 select DEFAULT_SGI_PARTITION
745 select DMA_NONCOHERENT
746 select GENERIC_ISA_DMA_SUPPORT_BROKEN
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200747 select IRQ_MIPS_CPU
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100748 select HAVE_EISA
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100749 select I8253
750 select I8259
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100751 select SGI_HAS_I8042
752 select SGI_HAS_INDYDOG
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +0200753 select SGI_HAS_HAL2
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100754 select SGI_HAS_SEEQ
755 select SGI_HAS_WD93
756 select SGI_HAS_ZILOG
757 select SWAP_IO_SPACE
758 select SYS_HAS_CPU_R10000
Thomas Bogendoerferc0de00b2019-10-09 15:27:17 +0200759 select SYS_HAS_EARLY_PRINTK
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100760 select SYS_SUPPORTS_64BIT_KERNEL
761 select SYS_SUPPORTS_BIG_ENDIAN
Thomas Bogendoerferdc24d68d2014-08-19 22:00:07 +0200762 select MIPS_L1_CACHE_SHIFT_7
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +0100763 help
764 This is the SGI Indigo2 with R10000 processor. To compile a Linux
765 kernel that runs on these, say Y here.
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100766
Thomas Bogendoerfer75055762019-10-24 12:18:29 +0200767config SGI_IP30
768 bool "SGI IP30 (Octane/Octane2)"
769 select ARCH_HAS_PHYS_TO_DMA
770 select FW_ARC
771 select FW_ARC64
772 select BOOT_ELF64
773 select CEVT_R4K
774 select CSRC_R4K
775 select SYNC_R4K if SMP
776 select ZONE_DMA32
777 select HAVE_PCI
778 select IRQ_MIPS_CPU
779 select IRQ_DOMAIN_HIERARCHY
780 select NR_CPUS_DEFAULT_2
781 select PCI_DRIVERS_GENERIC
782 select PCI_XTALK_BRIDGE
783 select SYS_HAS_EARLY_PRINTK
784 select SYS_HAS_CPU_R10000
785 select SYS_SUPPORTS_64BIT_KERNEL
786 select SYS_SUPPORTS_BIG_ENDIAN
787 select SYS_SUPPORTS_SMP
788 select MIPS_L1_CACHE_SHIFT_7
789 select ARC_MEMORY
790 help
791 These are the SGI Octane and Octane2 graphics workstations. To
792 compile a Linux kernel that runs on these, say Y here.
793
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794config SGI_IP32
Ralf Baechlecfd2afc2007-07-10 17:33:00 +0100795 bool "SGI IP32 (O2)"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200796 select ARC_MEMORY
797 select ARC_PROMLIB
Christoph Hellwig03df8222018-06-15 13:08:48 +0200798 select ARCH_HAS_PHYS_TO_DMA
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100799 select FW_ARC
800 select FW_ARC32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100802 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000803 select CSRC_R4K
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100805 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200806 select IRQ_MIPS_CPU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700807 select R5000_CPU_SCACHE
808 select RM7000_CPU_SCACHE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100809 select SYS_HAS_CPU_R5000
810 select SYS_HAS_CPU_R10000 if BROKEN
811 select SYS_HAS_CPU_RM7000
Ralf Baechledd2f18f2006-01-19 14:55:42 +0000812 select SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700813 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle5e83d432005-10-29 19:32:41 +0100814 select SYS_SUPPORTS_BIG_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815 help
816 If you want this kernel to run on SGI O2 workstation, say Y here.
817
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900818config SIBYTE_CRHINE
819 bool "Sibyte BCM91120C-CRhine"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100820 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100821 select SIBYTE_BCM1120
822 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100823 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100824 select SYS_SUPPORTS_BIG_ENDIAN
825 select SYS_SUPPORTS_LITTLE_ENDIAN
826
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900827config SIBYTE_CARMEL
828 bool "Sibyte BCM91120x-Carmel"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100829 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100830 select SIBYTE_BCM1120
831 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100832 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100833 select SYS_SUPPORTS_BIG_ENDIAN
834 select SYS_SUPPORTS_LITTLE_ENDIAN
835
836config SIBYTE_CRHONE
Martin Michlmayr3fa986f2006-05-09 23:34:53 +0200837 bool "Sibyte BCM91125C-CRhone"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100838 select BOOT_ELF32
Ralf Baechle5e83d432005-10-29 19:32:41 +0100839 select SIBYTE_BCM1125
840 select SWAP_IO_SPACE
Ralf Baechle7cf80532005-10-20 22:33:09 +0100841 select SYS_HAS_CPU_SB1
Ralf Baechle5e83d432005-10-29 19:32:41 +0100842 select SYS_SUPPORTS_BIG_ENDIAN
843 select SYS_SUPPORTS_HIGHMEM
844 select SYS_SUPPORTS_LITTLE_ENDIAN
845
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900846config SIBYTE_RHONE
847 bool "Sibyte BCM91125E-Rhone"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900848 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900849 select SIBYTE_BCM1125H
850 select SWAP_IO_SPACE
851 select SYS_HAS_CPU_SB1
852 select SYS_SUPPORTS_BIG_ENDIAN
853 select SYS_SUPPORTS_LITTLE_ENDIAN
854
855config SIBYTE_SWARM
856 bool "Sibyte BCM91250A-SWARM"
857 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200858 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900859 select SIBYTE_SB1250
860 select SWAP_IO_SPACE
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900864 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000865 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000866 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900867
868config SIBYTE_LITTLESUR
869 bool "Sibyte BCM91250C2-LittleSur"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900870 select BOOT_ELF32
Sebastian Andrzej Siewiorfcf3ca42010-04-18 15:26:36 +0200871 select HAVE_PATA_PLATFORM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900872 select SIBYTE_SB1250
873 select SWAP_IO_SPACE
874 select SYS_HAS_CPU_SB1
875 select SYS_SUPPORTS_BIG_ENDIAN
876 select SYS_SUPPORTS_HIGHMEM
877 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozycki756d6d82018-11-13 22:42:37 +0000878 select ZONE_DMA32 if 64BIT
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900879
880config SIBYTE_SENTOSA
881 bool "Sibyte BCM91250E-Sentosa"
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900882 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900883 select SIBYTE_SB1250
884 select SWAP_IO_SPACE
885 select SYS_HAS_CPU_SB1
886 select SYS_SUPPORTS_BIG_ENDIAN
887 select SYS_SUPPORTS_LITTLE_ENDIAN
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000888 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900889
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900890config SIBYTE_BIGSUR
891 bool "Sibyte BCM91480B-BigSur"
892 select BOOT_ELF32
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900893 select NR_CPUS_DEFAULT_4
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900894 select SIBYTE_BCM1x80
895 select SWAP_IO_SPACE
896 select SYS_HAS_CPU_SB1
897 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle651194f2007-11-01 21:55:39 +0000898 select SYS_SUPPORTS_HIGHMEM
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900899 select SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechlecce335a2007-11-03 02:05:43 +0000900 select ZONE_DMA32 if 64BIT
Maciej W. Rozyckie4849af2018-11-13 22:42:44 +0000901 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
Yoichi Yuasaade299d2007-07-27 15:25:43 +0900902
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100903config SNI_RM
904 bool "SNI RM200/300/400"
Thomas Bogendoerfer39b2d752019-10-09 15:27:14 +0200905 select ARC_MEMORY
906 select ARC_PROMLIB
Ralf Baechle0e2794b2012-11-15 20:48:50 +0100907 select FW_ARC if CPU_LITTLE_ENDIAN
908 select FW_ARC32 if CPU_LITTLE_ENDIAN
Paul Bolleaaa9fad2013-03-25 09:39:54 +0000909 select FW_SNIPROM if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100910 select ARCH_MAY_HAVE_PC_FDC
Ralf Baechlea211a0822018-02-05 15:37:43 +0100911 select ARCH_MIGHT_HAVE_PC_PARPORT
Ralf Baechle7a407aa2018-02-05 16:40:00 +0100912 select ARCH_MIGHT_HAVE_PC_SERIO
Ralf Baechle5e83d432005-10-29 19:32:41 +0100913 select BOOT_ELF32
Ralf Baechle42f77542007-10-18 17:48:11 +0100914 select CEVT_R4K
Ralf Baechle940f6b42007-11-24 22:33:28 +0000915 select CSRC_R4K
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +0100916 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100917 select DMA_NONCOHERENT
918 select GENERIC_ISA_DMA
Christoph Hellwig6630a8e2018-11-15 20:05:37 +0100919 select HAVE_EISA
Ralf Baechle8a118c32011-06-01 19:05:10 +0100920 select HAVE_PCSPKR_PLATFORM
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100921 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200922 select IRQ_MIPS_CPU
Ralf Baechled865bea2007-10-11 23:46:10 +0100923 select I8253
Ralf Baechle5e83d432005-10-29 19:32:41 +0100924 select I8259
925 select ISA
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200926 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
Ralf Baechle7cf80532005-10-20 22:33:09 +0100927 select SYS_HAS_CPU_R4X00
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200928 select SYS_HAS_CPU_R5000
Thomas Bogendoerferc066a322006-12-28 18:22:32 +0100929 select SYS_HAS_CPU_R10000
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200930 select R5000_CPU_SCACHE
Ralf Baechle36a88532007-03-01 11:56:43 +0000931 select SYS_HAS_EARLY_PRINTK
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -0700932 select SYS_SUPPORTS_32BIT_KERNEL
Kees Cook7d607172013-01-16 18:53:19 -0800933 select SYS_SUPPORTS_64BIT_KERNEL
Thomas Bogendoerfer4a0312fc2006-06-13 13:59:01 +0200934 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +0100935 select SYS_SUPPORTS_HIGHMEM
936 select SYS_SUPPORTS_LITTLE_ENDIAN
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937 help
Thomas Bogendoerfer14b36af2006-12-05 17:05:44 +0100938 The SNI RM200/300/400 are MIPS-based machines manufactured by
939 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Ralf Baechle5e83d432005-10-29 19:32:41 +0100940 Technology and now in turn merged with Fujitsu. Say Y here to
941 support this machine type.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900943config MACH_TX39XX
944 bool "Toshiba TX39 series based machines"
Ralf Baechle5e83d432005-10-29 19:32:41 +0100945
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900946config MACH_TX49XX
947 bool "Toshiba TX49 series based machines"
Ralf Baechle23fbee92005-07-25 22:45:45 +0000948
Ralf Baechle73b43902008-07-16 16:12:25 +0100949config MIKROTIK_RB532
950 bool "Mikrotik RB532 boards"
951 select CEVT_R4K
952 select CSRC_R4K
953 select DMA_NONCOHERENT
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100954 select HAVE_PCI
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200955 select IRQ_MIPS_CPU
Ralf Baechle73b43902008-07-16 16:12:25 +0100956 select SYS_HAS_CPU_MIPS32_R1
957 select SYS_SUPPORTS_32BIT_KERNEL
958 select SYS_SUPPORTS_LITTLE_ENDIAN
959 select SWAP_IO_SPACE
960 select BOOT_RAW
Linus Walleijd30a2b42016-04-19 11:23:22 +0200961 select GPIOLIB
Florian Fainelli930beb52014-01-14 09:54:38 -0800962 select MIPS_L1_CACHE_SHIFT_4
Ralf Baechle73b43902008-07-16 16:12:25 +0100963 help
964 Support the Mikrotik(tm) RouterBoard 532 series,
965 based on the IDT RC32434 SoC.
966
David Daney9ddebc42013-05-22 15:10:46 +0000967config CAVIUM_OCTEON_SOC
968 bool "Cavium Networks Octeon SoC based boards"
David Daneya86c7f72008-12-11 15:33:38 -0800969 select CEVT_R4K
Christoph Hellwigea8c64a2018-01-10 16:21:13 +0100970 select ARCH_HAS_PHYS_TO_DMA
Christoph Hellwig1753d502018-11-15 20:05:36 +0100971 select HAVE_RAPIDIO
Christoph Hellwigd4a451d2018-04-03 16:24:20 +0200972 select PHYS_ADDR_T_64BIT
David Daneya86c7f72008-12-11 15:33:38 -0800973 select SYS_SUPPORTS_64BIT_KERNEL
974 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechlef65aad42012-10-17 00:39:09 +0200975 select EDAC_SUPPORT
Borislav Petkovb01aec92015-05-21 19:59:31 +0200976 select EDAC_ATOMIC_SCRUB
David Daney73569d82015-03-20 19:11:58 +0300977 select SYS_SUPPORTS_LITTLE_ENDIAN
978 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
David Daneya86c7f72008-12-11 15:33:38 -0800979 select SYS_HAS_EARLY_PRINTK
David Daney5e6833892009-02-02 11:30:59 -0800980 select SYS_HAS_CPU_CAVIUM_OCTEON
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100981 select HAVE_PCI
Masahiro Yamada78bdbba2020-03-25 16:45:29 +0900982 select HAVE_PLAT_DELAY
983 select HAVE_PLAT_FW_INIT_CMDLINE
984 select HAVE_PLAT_MEMCPY
David Daneyf00e0012010-10-01 13:27:30 -0700985 select ZONE_DMA32
David Daney465aaed2011-08-20 08:44:00 -0700986 select HOLES_IN_ZONE
Linus Walleijd30a2b42016-04-19 11:23:22 +0200987 select GPIOLIB
David Daney6e511162014-05-28 23:52:05 +0200988 select USE_OF
989 select ARCH_SPARSEMEM_ENABLE
990 select SYS_SUPPORTS_SMP
David Daney7820b842017-09-28 12:34:04 -0500991 select NR_CPUS_DEFAULT_64
992 select MIPS_NR_CPU_NR_MAP_1024
Andrew Brestickere3264792014-08-21 13:04:22 -0700993 select BUILTIN_DTB
David Daney8c1e6b12015-03-05 17:31:30 +0300994 select MTD_COMPLEX_MAPPINGS
Christoph Hellwig09230cb2018-04-24 09:00:54 +0200995 select SWIOTLB
Steven J. Hill3ff72be2016-12-13 14:25:37 -0600996 select SYS_SUPPORTS_RELOCATABLE
David Daneya86c7f72008-12-11 15:33:38 -0800997 help
998 This option supports all of the Octeon reference boards from Cavium
999 Networks. It builds a kernel that dynamically determines the Octeon
1000 CPU type and supports all known board reference implementations.
1001 Some of the supported boards are:
1002 EBT3000
1003 EBH3000
1004 EBH3100
1005 Thunder
1006 Kodama
1007 Hikari
1008 Say Y here for most Octeon reference boards.
1009
Jayachandran C7f058e82011-05-07 01:36:57 +05301010config NLM_XLR_BOARD
1011 bool "Netlogic XLR/XLS based systems"
Jayachandran C7f058e82011-05-07 01:36:57 +05301012 select BOOT_ELF32
1013 select NLM_COMMON
Jayachandran C7f058e82011-05-07 01:36:57 +05301014 select SYS_HAS_CPU_XLR
1015 select SYS_SUPPORTS_SMP
Christoph Hellwigeb01d422018-11-15 20:05:32 +01001016 select HAVE_PCI
Jayachandran C7f058e82011-05-07 01:36:57 +05301017 select SWAP_IO_SPACE
1018 select SYS_SUPPORTS_32BIT_KERNEL
1019 select SYS_SUPPORTS_64BIT_KERNEL
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001020 select PHYS_ADDR_T_64BIT
Jayachandran C7f058e82011-05-07 01:36:57 +05301021 select SYS_SUPPORTS_BIG_ENDIAN
1022 select SYS_SUPPORTS_HIGHMEM
Jayachandran C7f058e82011-05-07 01:36:57 +05301023 select NR_CPUS_DEFAULT_32
1024 select CEVT_R4K
1025 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001026 select IRQ_MIPS_CPU
Jayachandran Cb97215f2012-10-31 12:01:33 +00001027 select ZONE_DMA32 if 64BIT
Jayachandran C7f058e82011-05-07 01:36:57 +05301028 select SYNC_R4K
1029 select SYS_HAS_EARLY_PRINTK
Jayachandran C8f0b04302013-06-10 06:33:26 +00001030 select SYS_SUPPORTS_ZBOOT
1031 select SYS_SUPPORTS_ZBOOT_UART16550
Jayachandran C7f058e82011-05-07 01:36:57 +05301032 help
1033 Support for systems based on Netlogic XLR and XLS processors.
1034 Say Y here if you have a XLR or XLS based board.
1035
Jayachandran C1c773ea2011-11-16 00:21:28 +00001036config NLM_XLP_BOARD
1037 bool "Netlogic XLP based systems"
Jayachandran C1c773ea2011-11-16 00:21:28 +00001038 select BOOT_ELF32
1039 select NLM_COMMON
1040 select SYS_HAS_CPU_XLP
1041 select SYS_SUPPORTS_SMP
Christoph Hellwigeb01d422018-11-15 20:05:32 +01001042 select HAVE_PCI
Jayachandran C1c773ea2011-11-16 00:21:28 +00001043 select SYS_SUPPORTS_32BIT_KERNEL
1044 select SYS_SUPPORTS_64BIT_KERNEL
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001045 select PHYS_ADDR_T_64BIT
Linus Walleijd30a2b42016-04-19 11:23:22 +02001046 select GPIOLIB
Jayachandran C1c773ea2011-11-16 00:21:28 +00001047 select SYS_SUPPORTS_BIG_ENDIAN
1048 select SYS_SUPPORTS_LITTLE_ENDIAN
1049 select SYS_SUPPORTS_HIGHMEM
Jayachandran C1c773ea2011-11-16 00:21:28 +00001050 select NR_CPUS_DEFAULT_32
1051 select CEVT_R4K
1052 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001053 select IRQ_MIPS_CPU
Jayachandran Cb97215f2012-10-31 12:01:33 +00001054 select ZONE_DMA32 if 64BIT
Jayachandran C1c773ea2011-11-16 00:21:28 +00001055 select SYNC_R4K
1056 select SYS_HAS_EARLY_PRINTK
Jayachandran C2f6528e2012-07-13 21:53:22 +05301057 select USE_OF
Jayachandran C8f0b04302013-06-10 06:33:26 +00001058 select SYS_SUPPORTS_ZBOOT
1059 select SYS_SUPPORTS_ZBOOT_UART16550
Jayachandran C1c773ea2011-11-16 00:21:28 +00001060 help
1061 This board is based on Netlogic XLP Processor.
1062 Say Y here if you have a XLP based board.
1063
David Daney9bc463b2014-05-28 23:52:15 +02001064config MIPS_PARAVIRT
1065 bool "Para-Virtualized guest system"
1066 select CEVT_R4K
1067 select CSRC_R4K
David Daney9bc463b2014-05-28 23:52:15 +02001068 select SYS_SUPPORTS_64BIT_KERNEL
1069 select SYS_SUPPORTS_32BIT_KERNEL
1070 select SYS_SUPPORTS_BIG_ENDIAN
1071 select SYS_SUPPORTS_SMP
1072 select NR_CPUS_DEFAULT_4
1073 select SYS_HAS_EARLY_PRINTK
1074 select SYS_HAS_CPU_MIPS32_R2
1075 select SYS_HAS_CPU_MIPS64_R2
1076 select SYS_HAS_CPU_CAVIUM_OCTEON
Christoph Hellwigeb01d422018-11-15 20:05:32 +01001077 select HAVE_PCI
David Daney9bc463b2014-05-28 23:52:15 +02001078 select SWAP_IO_SPACE
1079 help
1080 This option supports guest running under ????
1081
Linus Torvalds1da177e2005-04-16 15:20:36 -07001082endchoice
1083
Ralf Baechlee8c7c482008-09-16 19:12:16 +02001084source "arch/mips/alchemy/Kconfig"
Sergey Ryazanov3b12308f2014-10-29 03:18:39 +04001085source "arch/mips/ath25/Kconfig"
Gabor Juhosd4a67d92011-01-04 21:28:14 +01001086source "arch/mips/ath79/Kconfig"
Hauke Mehrtensa656ffc2011-07-23 01:20:13 +02001087source "arch/mips/bcm47xx/Kconfig"
Maxime Bizone7300d02009-08-18 13:23:37 +01001088source "arch/mips/bcm63xx/Kconfig"
Kevin Cernekee8945e372014-12-25 09:49:20 -08001089source "arch/mips/bmips/Kconfig"
Paul Burtoneed0eab2016-10-05 18:18:20 +01001090source "arch/mips/generic/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001091source "arch/mips/jazz/Kconfig"
Lars-Peter Clausen5ebabe52010-06-19 04:08:19 +00001092source "arch/mips/jz4740/Kconfig"
John Crispin8ec6d932011-03-30 09:27:48 +02001093source "arch/mips/lantiq/Kconfig"
Brian Murphy1f21d2b2007-08-21 22:34:16 +02001094source "arch/mips/lasat/Kconfig"
Joshua Henderson2572f002016-01-13 18:15:39 -07001095source "arch/mips/pic32/Kconfig"
Ezequiel Garciaaf0cfb22015-08-06 12:22:43 +01001096source "arch/mips/pistachio/Kconfig"
Ralf Baechle0f3a05cb2012-12-15 11:52:10 +01001097source "arch/mips/pmcs-msp71xx/Kconfig"
John Crispinae2b5bb2013-01-20 22:05:30 +01001098source "arch/mips/ralink/Kconfig"
Ralf Baechle29c48692005-02-07 01:27:14 +00001099source "arch/mips/sgi-ip27/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001100source "arch/mips/sibyte/Kconfig"
Atsushi Nemoto22b1d702008-07-11 00:31:36 +09001101source "arch/mips/txx9/Kconfig"
Ralf Baechle5e83d432005-10-29 19:32:41 +01001102source "arch/mips/vr41xx/Kconfig"
David Daneya86c7f72008-12-11 15:33:38 -08001103source "arch/mips/cavium-octeon/Kconfig"
Jiaxun Yang71e2f4d2019-10-20 22:43:14 +08001104source "arch/mips/loongson2ef/Kconfig"
Huacai Chen30ad29b2015-04-21 10:00:35 +08001105source "arch/mips/loongson32/Kconfig"
1106source "arch/mips/loongson64/Kconfig"
Jayachandran C7f058e82011-05-07 01:36:57 +05301107source "arch/mips/netlogic/Kconfig"
David Daneyae6e7e62014-05-28 23:52:14 +02001108source "arch/mips/paravirt/Kconfig"
Ralf Baechle38b18f722005-02-03 14:28:23 +00001109
Ralf Baechle5e83d432005-10-29 19:32:41 +01001110endmenu
1111
Akinobu Mita3c9ee7e2006-03-26 01:39:30 -08001112config GENERIC_HWEIGHT
1113 bool
1114 default y
1115
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116config GENERIC_CALIBRATE_DELAY
1117 bool
1118 default y
1119
Ingo Molnarae1e9132008-11-11 09:05:16 +01001120config SCHED_OMIT_FRAME_POINTER
Atsushi Nemoto1cc89032006-04-04 13:11:45 +09001121 bool
1122 default y
1123
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124#
1125# Select some configuration options automatically based on user selections.
1126#
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001127config FW_ARC
Linus Torvalds1da177e2005-04-16 15:20:36 -07001128 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129
Ralf Baechle61ed2422005-09-15 08:52:34 +00001130config ARCH_MAY_HAVE_PC_FDC
1131 bool
1132
Marc St-Jean9267a302007-06-14 15:55:31 -06001133config BOOT_RAW
1134 bool
1135
Ralf Baechle217dd112007-11-01 01:57:55 +00001136config CEVT_BCM1480
1137 bool
1138
Yoichi Yuasa6457d9f2008-04-25 12:11:44 +09001139config CEVT_DS1287
1140 bool
1141
Yoichi Yuasa1097c6a2007-10-22 19:43:15 +09001142config CEVT_GT641XX
1143 bool
1144
Ralf Baechle42f77542007-10-18 17:48:11 +01001145config CEVT_R4K
1146 bool
1147
Ralf Baechle217dd112007-11-01 01:57:55 +00001148config CEVT_SB1250
1149 bool
1150
Atsushi Nemoto229f7732007-10-25 01:34:09 +09001151config CEVT_TXX9
1152 bool
1153
Ralf Baechle217dd112007-11-01 01:57:55 +00001154config CSRC_BCM1480
1155 bool
1156
Yoichi Yuasa42474172008-04-24 09:48:40 +09001157config CSRC_IOASIC
1158 bool
1159
Ralf Baechle940f6b42007-11-24 22:33:28 +00001160config CSRC_R4K
1161 bool
1162
Ralf Baechle217dd112007-11-01 01:57:55 +00001163config CSRC_SB1250
1164 bool
1165
Alex Smitha7f4df42015-10-21 09:57:44 +01001166config MIPS_CLOCK_VSYSCALL
1167 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1168
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001169config GPIO_TXX9
Linus Walleijd30a2b42016-04-19 11:23:22 +02001170 select GPIOLIB
Atsushi Nemotoa9aec7f2008-04-05 00:55:41 +09001171 bool
1172
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001173config FW_CFE
Aurelien Jarnodf78b5c2007-09-05 08:58:26 +02001174 bool
1175
Ralf Baechle40e084a2015-07-29 22:44:53 +02001176config ARCH_SUPPORTS_UPROBES
1177 bool
1178
Felix Fietkau885014b2013-09-27 14:41:44 +02001179config DMA_MAYBE_COHERENT
Christoph Hellwigf3ecc0f2018-08-19 14:53:20 +02001180 select ARCH_HAS_DMA_COHERENCE_H
Felix Fietkau885014b2013-09-27 14:41:44 +02001181 select DMA_NONCOHERENT
1182 bool
1183
Paul Burton20d33062016-10-05 18:18:16 +01001184config DMA_PERDEV_COHERENT
1185 bool
Christoph Hellwig347cb6a2019-01-07 13:36:20 -05001186 select ARCH_HAS_SETUP_DMA_OPS
Christoph Hellwig5748e1b2018-08-16 16:47:53 +03001187 select DMA_NONCOHERENT
Paul Burton20d33062016-10-05 18:18:16 +01001188
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001189config DMA_NONCOHERENT
1190 bool
Christoph Hellwigdb914272019-08-26 09:22:13 +02001191 #
1192 # MIPS allows mixing "slightly different" Cacheability and Coherency
1193 # Attribute bits. It is believed that the uncached access through
1194 # KSEG1 and the implementation specific "uncached accelerated" used
1195 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1196 # significant advantages.
1197 #
Christoph Hellwig419e2f12019-08-26 09:03:44 +02001198 select ARCH_HAS_DMA_WRITE_COMBINE
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08001199 select ARCH_HAS_DMA_PREP_COHERENT
Christoph Hellwigf8c55dc2018-06-15 13:08:46 +02001200 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
Christoph Hellwigfa7e2242020-02-21 15:55:43 -08001201 select ARCH_HAS_DMA_SET_UNCACHED
Christoph Hellwig34dc0ea2019-10-29 11:01:37 +01001202 select DMA_NONCOHERENT_MMAP
Christoph Hellwigf8c55dc2018-06-15 13:08:46 +02001203 select DMA_NONCOHERENT_CACHE_SYNC
Christoph Hellwig34dc0ea2019-10-29 11:01:37 +01001204 select NEED_DMA_MAP_STATE
Ralf Baechle4ce588c2005-09-03 15:56:19 -07001205
Ralf Baechle36a88532007-03-01 11:56:43 +00001206config SYS_HAS_EARLY_PRINTK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001207 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001208
Ralf Baechle1b2bc752009-06-23 10:00:31 +01001209config SYS_SUPPORTS_HOTPLUG_CPU
Ralf Baechledbb74542007-08-07 14:52:17 +01001210 bool
Ralf Baechledbb74542007-08-07 14:52:17 +01001211
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212config MIPS_BONITO64
1213 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001214
1215config MIPS_MSC
1216 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217
Brian Murphy1f21d2b2007-08-21 22:34:16 +02001218config MIPS_NILE4
1219 bool
1220
Ralf Baechle39b8d522008-04-28 17:14:26 +01001221config SYNC_R4K
1222 bool
1223
Gabor Juhos487d70d2010-11-23 16:06:25 +01001224config MIPS_MACHINE
1225 def_bool n
1226
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -07001227config NO_IOPORT_MAP
Maciej W. Rozyckid388d682007-05-29 15:08:07 +01001228 def_bool n
1229
Markos Chandras4e0748f2014-11-13 11:25:27 +00001230config GENERIC_CSUM
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001231 def_bool CPU_NO_LOAD_STORE_LR
Markos Chandras4e0748f2014-11-13 11:25:27 +00001232
Ralf Baechle8313da32007-08-24 16:48:30 +01001233config GENERIC_ISA_DMA
1234 bool
1235 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
Namhyung Kima35bee82010-10-18 12:55:21 +09001236 select ISA_DMA_API
Ralf Baechle8313da32007-08-24 16:48:30 +01001237
Ralf Baechleaa414df2006-11-30 01:14:51 +00001238config GENERIC_ISA_DMA_SUPPORT_BROKEN
1239 bool
Ralf Baechle8313da32007-08-24 16:48:30 +01001240 select GENERIC_ISA_DMA
Ralf Baechleaa414df2006-11-30 01:14:51 +00001241
Masahiro Yamada78bdbba2020-03-25 16:45:29 +09001242config HAVE_PLAT_DELAY
1243 bool
1244
1245config HAVE_PLAT_FW_INIT_CMDLINE
1246 bool
1247
1248config HAVE_PLAT_MEMCPY
1249 bool
1250
Namhyung Kima35bee82010-10-18 12:55:21 +09001251config ISA_DMA_API
1252 bool
1253
David Daney465aaed2011-08-20 08:44:00 -07001254config HOLES_IN_ZONE
1255 bool
1256
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001257config SYS_SUPPORTS_RELOCATABLE
1258 bool
1259 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01001260 Selected if the platform supports relocating the kernel.
1261 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1262 to allow access to command line and entropy sources.
Matt Redfearn8c530ea2016-03-31 10:05:39 +01001263
David Daneyf381bf62017-06-13 15:28:46 -07001264config MIPS_CBPF_JIT
1265 def_bool y
1266 depends on BPF_JIT && HAVE_CBPF_JIT
1267
1268config MIPS_EBPF_JIT
1269 def_bool y
1270 depends on BPF_JIT && HAVE_EBPF_JIT
1271
1272
Ralf Baechle5e83d432005-10-29 19:32:41 +01001273#
Masanari Iida6b2aac42012-04-14 00:14:11 +09001274# Endianness selection. Sufficiently obscure so many users don't know what to
Ralf Baechle5e83d432005-10-29 19:32:41 +01001275# answer,so we try hard to limit the available choices. Also the use of a
1276# choice statement should be more obvious to the user.
1277#
1278choice
Masanari Iida6b2aac42012-04-14 00:14:11 +09001279 prompt "Endianness selection"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280 help
1281 Some MIPS machines can be configured for either little or big endian
Ralf Baechle5e83d432005-10-29 19:32:41 +01001282 byte order. These modes require different kernels and a different
Matt LaPlante3cb2fcc2006-11-30 05:22:59 +01001283 Linux distribution. In general there is one preferred byteorder for a
Ralf Baechle5e83d432005-10-29 19:32:41 +01001284 particular system but some systems are just as commonly used in the
David Sterba3dde6ad2007-05-09 07:12:20 +02001285 one or the other endianness.
Ralf Baechle5e83d432005-10-29 19:32:41 +01001286
1287config CPU_BIG_ENDIAN
1288 bool "Big endian"
1289 depends on SYS_SUPPORTS_BIG_ENDIAN
1290
1291config CPU_LITTLE_ENDIAN
1292 bool "Little endian"
1293 depends on SYS_SUPPORTS_LITTLE_ENDIAN
Ralf Baechle5e83d432005-10-29 19:32:41 +01001294
1295endchoice
1296
David Daney22b07632010-07-23 18:41:43 -07001297config EXPORT_UASM
1298 bool
1299
Ralf Baechle21162452007-02-09 17:08:58 +00001300config SYS_SUPPORTS_APM_EMULATION
1301 bool
1302
Ralf Baechle5e83d432005-10-29 19:32:41 +01001303config SYS_SUPPORTS_BIG_ENDIAN
1304 bool
1305
1306config SYS_SUPPORTS_LITTLE_ENDIAN
1307 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001308
David Daney9cffd1542009-05-27 17:47:46 -07001309config SYS_SUPPORTS_HUGETLBFS
1310 bool
Daniel Silsby45e03e62019-07-15 17:40:01 -04001311 depends on CPU_SUPPORTS_HUGEPAGES
David Daney9cffd1542009-05-27 17:47:46 -07001312 default y
1313
David Daneyaa1762f2012-10-17 00:48:10 +02001314config MIPS_HUGE_TLB_SUPPORT
1315 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1316
Linus Torvalds1da177e2005-04-16 15:20:36 -07001317config IRQ_CPU_RM7K
1318 bool
1319
Marc St-Jean9267a302007-06-14 15:55:31 -06001320config IRQ_MSP_SLP
1321 bool
1322
1323config IRQ_MSP_CIC
1324 bool
1325
Atsushi Nemoto8420fd02007-08-02 23:35:53 +09001326config IRQ_TXX9
1327 bool
1328
Yoichi Yuasad5ab1a62007-09-13 23:51:26 +09001329config IRQ_GT641XX
1330 bool
1331
Yoichi Yuasa252161e2007-03-14 21:51:26 +09001332config PCI_GT64XXX_PCI0
Linus Torvalds1da177e2005-04-16 15:20:36 -07001333 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001334
Thomas Bogendoerfera57140e2019-05-07 23:09:13 +02001335config PCI_XTALK_BRIDGE
1336 bool
1337
Marc St-Jean9267a302007-06-14 15:55:31 -06001338config NO_EXCEPT_FILL
1339 bool
1340
Ralf Baechlea83860c2009-03-13 21:17:57 +01001341config SOC_EMMA2RH
1342 bool
1343 select CEVT_R4K
1344 select CSRC_R4K
1345 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001346 select IRQ_MIPS_CPU
Ralf Baechlea83860c2009-03-13 21:17:57 +01001347 select SWAP_IO_SPACE
1348 select SYS_HAS_CPU_R5500
1349 select SYS_SUPPORTS_32BIT_KERNEL
1350 select SYS_SUPPORTS_64BIT_KERNEL
1351 select SYS_SUPPORTS_BIG_ENDIAN
1352
Daniel Lairdedb63102008-06-16 15:49:21 +01001353config SOC_PNX833X
1354 bool
1355 select CEVT_R4K
1356 select CSRC_R4K
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001357 select IRQ_MIPS_CPU
Daniel Lairdedb63102008-06-16 15:49:21 +01001358 select DMA_NONCOHERENT
1359 select SYS_HAS_CPU_MIPS32_R2
1360 select SYS_SUPPORTS_32BIT_KERNEL
1361 select SYS_SUPPORTS_LITTLE_ENDIAN
1362 select SYS_SUPPORTS_BIG_ENDIAN
Ralf Baechle377cb1b2014-04-29 01:49:24 +02001363 select SYS_SUPPORTS_MIPS16
Daniel Lairdedb63102008-06-16 15:49:21 +01001364 select CPU_MIPSR2_IRQ_VI
1365
1366config SOC_PNX8335
1367 bool
1368 select SOC_PNX833X
1369
Markos Chandrasa7e07b12014-11-13 13:32:03 +00001370config MIPS_SPRAM
1371 bool
1372
Linus Torvalds1da177e2005-04-16 15:20:36 -07001373config SWAP_IO_SPACE
1374 bool
1375
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001376config SGI_HAS_INDYDOG
1377 bool
1378
Thomas Bogendoerfer5b438c42008-07-10 20:29:55 +02001379config SGI_HAS_HAL2
1380 bool
1381
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001382config SGI_HAS_SEEQ
1383 bool
1384
1385config SGI_HAS_WD93
1386 bool
1387
1388config SGI_HAS_ZILOG
1389 bool
1390
1391config SGI_HAS_I8042
1392 bool
1393
1394config DEFAULT_SGI_PARTITION
1395 bool
1396
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001397config FW_ARC32
Ralf Baechle5e83d432005-10-29 19:32:41 +01001398 bool
1399
Paul Bolleaaa9fad2013-03-25 09:39:54 +00001400config FW_SNIPROM
Thomas Bogendoerfer231a35d2008-01-04 23:31:07 +01001401 bool
1402
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403config BOOT_ELF32
1404 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405
Florian Fainelli930beb52014-01-14 09:54:38 -08001406config MIPS_L1_CACHE_SHIFT_4
1407 bool
1408
1409config MIPS_L1_CACHE_SHIFT_5
1410 bool
1411
1412config MIPS_L1_CACHE_SHIFT_6
1413 bool
1414
1415config MIPS_L1_CACHE_SHIFT_7
1416 bool
1417
Linus Torvalds1da177e2005-04-16 15:20:36 -07001418config MIPS_L1_CACHE_SHIFT
1419 int
Florian Fainellia4c02012014-01-14 09:54:39 -08001420 default "7" if MIPS_L1_CACHE_SHIFT_7
Kevin Cernekee5432eeb2014-12-25 09:49:09 -08001421 default "6" if MIPS_L1_CACHE_SHIFT_6
1422 default "5" if MIPS_L1_CACHE_SHIFT_5
1423 default "4" if MIPS_L1_CACHE_SHIFT_4
Linus Torvalds1da177e2005-04-16 15:20:36 -07001424 default "5"
1425
Linus Torvalds1da177e2005-04-16 15:20:36 -07001426config HAVE_STD_PC_SERIAL_PORT
1427 bool
1428
Thomas Bogendoerfere9422422019-10-22 18:13:15 +02001429config ARC_CMDLINE_ONLY
1430 bool
1431
Linus Torvalds1da177e2005-04-16 15:20:36 -07001432config ARC_CONSOLE
1433 bool "ARC console support"
Thomas Bogendoerfere2defae2007-12-02 13:00:32 +01001434 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001435
1436config ARC_MEMORY
1437 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001438
1439config ARC_PROMLIB
1440 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001441
Ralf Baechle0e2794b2012-11-15 20:48:50 +01001442config FW_ARC64
Linus Torvalds1da177e2005-04-16 15:20:36 -07001443 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444
1445config BOOT_ELF64
1446 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001447
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448menu "CPU selection"
1449
1450choice
1451 prompt "CPU type"
1452 default CPU_R4X00
1453
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001454config CPU_LOONGSON64
Huacai Chencaed1d12019-11-04 14:11:21 +08001455 bool "Loongson 64-bit CPU"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001456 depends on SYS_HAS_CPU_LOONGSON64
Christoph Hellwigd3bc81b2018-06-15 13:08:41 +02001457 select ARCH_HAS_PHYS_TO_DMA
Jiaxun Yang51522212020-01-13 18:15:00 +08001458 select CPU_MIPSR2
1459 select CPU_HAS_PREFETCH
Huacai Chen0e476d92014-03-21 18:44:07 +08001460 select CPU_SUPPORTS_64BIT_KERNEL
1461 select CPU_SUPPORTS_HIGHMEM
1462 select CPU_SUPPORTS_HUGEPAGES
Huacai Chen75074452019-09-21 21:50:27 +08001463 select CPU_SUPPORTS_MSA
Jiaxun Yang51522212020-01-13 18:15:00 +08001464 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1465 select CPU_MIPSR2_IRQ_VI
Huacai Chen0e476d92014-03-21 18:44:07 +08001466 select WEAK_ORDERING
1467 select WEAK_REORDERING_BEYOND_LLSC
Huacai Chen75074452019-09-21 21:50:27 +08001468 select MIPS_ASID_BITS_VARIABLE
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001469 select MIPS_PGD_C0_CONTEXT
Huacai Chen17c99d92017-03-16 21:00:28 +08001470 select MIPS_L1_CACHE_SHIFT_6
Linus Walleijd30a2b42016-04-19 11:23:22 +02001471 select GPIOLIB
Christoph Hellwig09230cb2018-04-24 09:00:54 +02001472 select SWIOTLB
Huacai Chen0e476d92014-03-21 18:44:07 +08001473 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001474 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1475 cores implements the MIPS64R2 instruction set with many extensions,
1476 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1477 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1478 Loongson-2E/2F is not covered here and will be removed in future.
Huacai Chen0e476d92014-03-21 18:44:07 +08001479
Huacai Chencaed1d12019-11-04 14:11:21 +08001480config LOONGSON3_ENHANCEMENT
1481 bool "New Loongson-3 CPU Enhancements"
Huacai Chen1e820da32016-03-03 09:45:13 +08001482 default n
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001483 depends on CPU_LOONGSON64
Huacai Chen1e820da32016-03-03 09:45:13 +08001484 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001485 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
Huacai Chen1e820da32016-03-03 09:45:13 +08001486 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001487 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
Huacai Chen1e820da32016-03-03 09:45:13 +08001488 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1489 Fast TLB refill support, etc.
1490
1491 This option enable those enhancements which are not probed at run
1492 time. If you want a generic kernel to run on all Loongson 3 machines,
1493 please say 'N' here. If you want a high-performance kernel to run on
Huacai Chencaed1d12019-11-04 14:11:21 +08001494 new Loongson-3 machines only, please say 'Y' here.
Huacai Chen1e820da32016-03-03 09:45:13 +08001495
Huacai Chene02e07e2019-01-15 16:04:54 +08001496config CPU_LOONGSON3_WORKAROUNDS
Huacai Chencaed1d12019-11-04 14:11:21 +08001497 bool "Old Loongson-3 LLSC Workarounds"
Huacai Chene02e07e2019-01-15 16:04:54 +08001498 default y if SMP
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001499 depends on CPU_LOONGSON64
Huacai Chene02e07e2019-01-15 16:04:54 +08001500 help
Huacai Chencaed1d12019-11-04 14:11:21 +08001501 Loongson-3 processors have the llsc issues which require workarounds.
Huacai Chene02e07e2019-01-15 16:04:54 +08001502 Without workarounds the system may hang unexpectedly.
1503
Huacai Chencaed1d12019-11-04 14:11:21 +08001504 Newer Loongson-3 will fix these issues and no workarounds are needed.
Huacai Chene02e07e2019-01-15 16:04:54 +08001505 The workarounds have no significant side effect on them but may
1506 decrease the performance of the system so this option should be
1507 disabled unless the kernel is intended to be run on old systems.
1508
1509 If unsure, please say Y.
1510
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001511config CPU_LOONGSON2E
1512 bool "Loongson 2E"
1513 depends on SYS_HAS_CPU_LOONGSON2E
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001514 select CPU_LOONGSON2EF
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001515 help
1516 The Loongson 2E processor implements the MIPS III instruction set
1517 with many extensions.
1518
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001519 It has an internal FPGA northbridge, which is compatible to
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001520 bonito64.
1521
1522config CPU_LOONGSON2F
1523 bool "Loongson 2F"
1524 depends on SYS_HAS_CPU_LOONGSON2F
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001525 select CPU_LOONGSON2EF
Linus Walleijd30a2b42016-04-19 11:23:22 +02001526 select GPIOLIB
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001527 help
1528 The Loongson 2F processor implements the MIPS III instruction set
1529 with many extensions.
1530
1531 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1532 have a similar programming interface with FPGA northbridge used in
1533 Loongson2E.
1534
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001535config CPU_LOONGSON1B
1536 bool "Loongson 1B"
1537 depends on SYS_HAS_CPU_LOONGSON1B
Huacai Chenb2afb642019-11-04 14:11:20 +08001538 select CPU_LOONGSON32
Kelvin Cheung9ec88b62016-04-06 20:34:54 +08001539 select LEDS_GPIO_REGISTER
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001540 help
1541 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001542 Release 1 instruction set and part of the MIPS32 Release 2
1543 instruction set.
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001544
Yang Ling12e32802016-05-19 12:29:30 +08001545config CPU_LOONGSON1C
1546 bool "Loongson 1C"
1547 depends on SYS_HAS_CPU_LOONGSON1C
Huacai Chenb2afb642019-11-04 14:11:20 +08001548 select CPU_LOONGSON32
Yang Ling12e32802016-05-19 12:29:30 +08001549 select LEDS_GPIO_REGISTER
1550 help
1551 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
谢致邦 (XIE Zhibang)968dc5a02017-06-01 18:41:34 +08001552 Release 1 instruction set and part of the MIPS32 Release 2
1553 instruction set.
Yang Ling12e32802016-05-19 12:29:30 +08001554
Ralf Baechle6e760c82005-07-06 12:08:11 +00001555config CPU_MIPS32_R1
1556 bool "MIPS32 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001557 depends on SYS_HAS_CPU_MIPS32_R1
Ralf Baechle6e760c82005-07-06 12:08:11 +00001558 select CPU_HAS_PREFETCH
Ralf Baechle797798c2005-08-10 15:17:11 +00001559 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001560 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle6e760c82005-07-06 12:08:11 +00001561 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001562 Choose this option to build a kernel for release 1 or later of the
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001563 MIPS32 architecture. Most modern embedded systems with a 32-bit
1564 MIPS processor are based on a MIPS32 processor. If you know the
1565 specific type of processor in your system, choose those that one
1566 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1567 Release 2 of the MIPS32 architecture is available since several
1568 years so chances are you even have a MIPS32 Release 2 processor
1569 in which case you should choose CPU_MIPS32_R2 instead for better
1570 performance.
1571
1572config CPU_MIPS32_R2
1573 bool "MIPS32 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001574 depends on SYS_HAS_CPU_MIPS32_R2
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001575 select CPU_HAS_PREFETCH
Ralf Baechle797798c2005-08-10 15:17:11 +00001576 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001577 select CPU_SUPPORTS_HIGHMEM
Paul Burtona5e9a692014-01-27 15:23:10 +00001578 select CPU_SUPPORTS_MSA
Sanjay Lal2235a542012-11-21 18:33:59 -08001579 select HAVE_KVM
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001580 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001581 Choose this option to build a kernel for release 2 or later of the
Ralf Baechle6e760c82005-07-06 12:08:11 +00001582 MIPS32 architecture. Most modern embedded systems with a 32-bit
1583 MIPS processor are based on a MIPS32 processor. If you know the
1584 specific type of processor in your system, choose those that one
1585 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001586
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001587config CPU_MIPS32_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001588 bool "MIPS32 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001589 depends on SYS_HAS_CPU_MIPS32_R6
1590 select CPU_HAS_PREFETCH
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001591 select CPU_NO_LOAD_STORE_LR
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001592 select CPU_SUPPORTS_32BIT_KERNEL
1593 select CPU_SUPPORTS_HIGHMEM
1594 select CPU_SUPPORTS_MSA
1595 select HAVE_KVM
1596 select MIPS_O32_FP64_SUPPORT
1597 help
1598 Choose this option to build a kernel for release 6 or later of the
1599 MIPS32 architecture. New MIPS processors, starting with the Warrior
1600 family, are based on a MIPS32r6 processor. If you own an older
1601 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1602
Ralf Baechle6e760c82005-07-06 12:08:11 +00001603config CPU_MIPS64_R1
1604 bool "MIPS64 Release 1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001605 depends on SYS_HAS_CPU_MIPS64_R1
Ralf Baechle797798c2005-08-10 15:17:11 +00001606 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001607 select CPU_SUPPORTS_32BIT_KERNEL
1608 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001609 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001610 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle6e760c82005-07-06 12:08:11 +00001611 help
1612 Choose this option to build a kernel for release 1 or later of the
1613 MIPS64 architecture. Many modern embedded systems with a 64-bit
1614 MIPS processor are based on a MIPS64 processor. If you know the
1615 specific type of processor in your system, choose those that one
1616 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001617 Release 2 of the MIPS64 architecture is available since several
1618 years so chances are you even have a MIPS64 Release 2 processor
1619 in which case you should choose CPU_MIPS64_R2 instead for better
1620 performance.
1621
1622config CPU_MIPS64_R2
1623 bool "MIPS64 Release 2"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001624 depends on SYS_HAS_CPU_MIPS64_R2
Ralf Baechle797798c2005-08-10 15:17:11 +00001625 select CPU_HAS_PREFETCH
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001626 select CPU_SUPPORTS_32BIT_KERNEL
1627 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechleec28f302006-03-05 00:45:33 +00001628 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001629 select CPU_SUPPORTS_HUGEPAGES
Paul Burtona5e9a692014-01-27 15:23:10 +00001630 select CPU_SUPPORTS_MSA
James Hogan40a2df42016-07-08 11:53:31 +01001631 select HAVE_KVM
Ralf Baechle1e5f1ca2005-07-12 14:51:22 +00001632 help
1633 Choose this option to build a kernel for release 2 or later of the
1634 MIPS64 architecture. Many modern embedded systems with a 64-bit
1635 MIPS processor are based on a MIPS64 processor. If you know the
1636 specific type of processor in your system, choose those that one
1637 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001638
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001639config CPU_MIPS64_R6
Markos Chandras674d10e2015-07-16 13:24:46 +01001640 bool "MIPS64 Release 6"
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001641 depends on SYS_HAS_CPU_MIPS64_R6
1642 select CPU_HAS_PREFETCH
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03001643 select CPU_NO_LOAD_STORE_LR
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001644 select CPU_SUPPORTS_32BIT_KERNEL
1645 select CPU_SUPPORTS_64BIT_KERNEL
1646 select CPU_SUPPORTS_HIGHMEM
Paul Burtonafd375d2019-02-02 02:21:53 +00001647 select CPU_SUPPORTS_HUGEPAGES
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001648 select CPU_SUPPORTS_MSA
James Hogan2e6c7742017-02-16 12:39:01 +00001649 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
James Hogan40a2df42016-07-08 11:53:31 +01001650 select HAVE_KVM
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001651 help
1652 Choose this option to build a kernel for release 6 or later of the
1653 MIPS64 architecture. New MIPS processors, starting with the Warrior
1654 family, are based on a MIPS64r6 processor. If you own an older
1655 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1656
Linus Torvalds1da177e2005-04-16 15:20:36 -07001657config CPU_R3000
1658 bool "R3000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001659 depends on SYS_HAS_CPU_R3000
Ralf Baechlef7062dd2006-04-24 14:58:53 +01001660 select CPU_HAS_WB
Paul Burton54746822019-08-31 15:40:43 +00001661 select CPU_R3K_TLB
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001662 select CPU_SUPPORTS_32BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001663 select CPU_SUPPORTS_HIGHMEM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001664 help
1665 Please make sure to pick the right CPU type. Linux/MIPS is not
1666 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1667 *not* work on R4000 machines and vice versa. However, since most
1668 of the supported machines have an R4000 (or similar) CPU, R4x00
1669 might be a safe bet. If the resulting kernel does not work,
1670 try to recompile with R3000.
1671
1672config CPU_TX39XX
1673 bool "R39XX"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001674 depends on SYS_HAS_CPU_TX39XX
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001675 select CPU_SUPPORTS_32BIT_KERNEL
Paul Burton54746822019-08-31 15:40:43 +00001676 select CPU_R3K_TLB
Linus Torvalds1da177e2005-04-16 15:20:36 -07001677
1678config CPU_VR41XX
1679 bool "R41xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001680 depends on SYS_HAS_CPU_VR41XX
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001681 select CPU_SUPPORTS_32BIT_KERNEL
1682 select CPU_SUPPORTS_64BIT_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07001683 help
Ralf Baechle5e83d432005-10-29 19:32:41 +01001684 The options selects support for the NEC VR4100 series of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001685 Only choose this option if you have one of these processors as a
1686 kernel built with this option will not run on any other type of
1687 processor or vice versa.
1688
Linus Torvalds1da177e2005-04-16 15:20:36 -07001689config CPU_R4X00
1690 bool "R4x00"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001691 depends on SYS_HAS_CPU_R4X00
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001692 select CPU_SUPPORTS_32BIT_KERNEL
1693 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001694 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001695 help
1696 MIPS Technologies R4000-series processors other than 4300, including
1697 the R4000, R4400, R4600, and 4700.
1698
1699config CPU_TX49XX
1700 bool "R49XX"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001701 depends on SYS_HAS_CPU_TX49XX
Atsushi Nemotode862b42006-03-17 12:59:22 +09001702 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001703 select CPU_SUPPORTS_32BIT_KERNEL
1704 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001705 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001706
1707config CPU_R5000
1708 bool "R5000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001709 depends on SYS_HAS_CPU_R5000
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001710 select CPU_SUPPORTS_32BIT_KERNEL
1711 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001712 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001713 help
1714 MIPS Technologies R5000-series processors other than the Nevada.
1715
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001716config CPU_R5500
1717 bool "R5500"
1718 depends on SYS_HAS_CPU_R5500
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001719 select CPU_SUPPORTS_32BIT_KERNEL
1720 select CPU_SUPPORTS_64BIT_KERNEL
David Daney9cffd1542009-05-27 17:47:46 -07001721 select CPU_SUPPORTS_HUGEPAGES
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09001722 help
1723 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1724 instruction set.
1725
Linus Torvalds1da177e2005-04-16 15:20:36 -07001726config CPU_NEVADA
1727 bool "RM52xx"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001728 depends on SYS_HAS_CPU_NEVADA
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001729 select CPU_SUPPORTS_32BIT_KERNEL
1730 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle970d0322012-10-18 13:54:15 +02001731 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001732 help
1733 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1734
Linus Torvalds1da177e2005-04-16 15:20:36 -07001735config CPU_R10000
1736 bool "R10000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001737 depends on SYS_HAS_CPU_R10000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001738 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001739 select CPU_SUPPORTS_32BIT_KERNEL
1740 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001741 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001742 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001743 help
1744 MIPS Technologies R10000-series processors.
1745
1746config CPU_RM7000
1747 bool "RM7000"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001748 depends on SYS_HAS_CPU_RM7000
Ralf Baechle5e83d432005-10-29 19:32:41 +01001749 select CPU_HAS_PREFETCH
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001750 select CPU_SUPPORTS_32BIT_KERNEL
1751 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001752 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001753 select CPU_SUPPORTS_HUGEPAGES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001754
1755config CPU_SB1
1756 bool "SB1"
Ralf Baechle7cf80532005-10-20 22:33:09 +01001757 depends on SYS_HAS_CPU_SB1
Yoichi Yuasaed5ba2f2005-09-03 15:56:21 -07001758 select CPU_SUPPORTS_32BIT_KERNEL
1759 select CPU_SUPPORTS_64BIT_KERNEL
Ralf Baechle797798c2005-08-10 15:17:11 +00001760 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001761 select CPU_SUPPORTS_HUGEPAGES
Ralf Baechle0004a9d2006-10-31 03:45:07 +00001762 select WEAK_ORDERING
Linus Torvalds1da177e2005-04-16 15:20:36 -07001763
David Daneya86c7f72008-12-11 15:33:38 -08001764config CPU_CAVIUM_OCTEON
1765 bool "Cavium Octeon processor"
David Daney5e6833892009-02-02 11:30:59 -08001766 depends on SYS_HAS_CPU_CAVIUM_OCTEON
David Daneya86c7f72008-12-11 15:33:38 -08001767 select CPU_HAS_PREFETCH
1768 select CPU_SUPPORTS_64BIT_KERNEL
David Daneya86c7f72008-12-11 15:33:38 -08001769 select WEAK_ORDERING
David Daneya86c7f72008-12-11 15:33:38 -08001770 select CPU_SUPPORTS_HIGHMEM
David Daney9cffd1542009-05-27 17:47:46 -07001771 select CPU_SUPPORTS_HUGEPAGES
Ben Hutchingsdf115f32015-05-25 20:27:29 +01001772 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1773 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
Florian Fainelli930beb52014-01-14 09:54:38 -08001774 select MIPS_L1_CACHE_SHIFT_7
James Hogan0ae3abc2017-03-14 10:25:51 +00001775 select HAVE_KVM
David Daneya86c7f72008-12-11 15:33:38 -08001776 help
1777 The Cavium Octeon processor is a highly integrated chip containing
1778 many ethernet hardware widgets for networking tasks. The processor
1779 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1780 Full details can be found at http://www.caviumnetworks.com.
1781
Jonas Gorskicd746242013-12-18 14:12:02 +01001782config CPU_BMIPS
1783 bool "Broadcom BMIPS"
1784 depends on SYS_HAS_CPU_BMIPS
1785 select CPU_MIPS32
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001786 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
Jonas Gorskicd746242013-12-18 14:12:02 +01001787 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1788 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1789 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1790 select CPU_SUPPORTS_32BIT_KERNEL
1791 select DMA_NONCOHERENT
Ralf Baechle67e38cf2015-05-26 18:20:06 +02001792 select IRQ_MIPS_CPU
Jonas Gorskicd746242013-12-18 14:12:02 +01001793 select SWAP_IO_SPACE
1794 select WEAK_ORDERING
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001795 select CPU_SUPPORTS_HIGHMEM
Jonas Gorski69aaf9c2013-12-18 14:12:04 +01001796 select CPU_HAS_PREFETCH
Markus Mayera8d709b2017-02-07 13:58:54 -08001797 select CPU_SUPPORTS_CPUFREQ
1798 select MIPS_EXTERNAL_TIMER
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001799 help
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001800 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07001801
Jayachandran C7f058e82011-05-07 01:36:57 +05301802config CPU_XLR
1803 bool "Netlogic XLR SoC"
1804 depends on SYS_HAS_CPU_XLR
1805 select CPU_SUPPORTS_32BIT_KERNEL
1806 select CPU_SUPPORTS_64BIT_KERNEL
1807 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001808 select CPU_SUPPORTS_HUGEPAGES
Jayachandran C7f058e82011-05-07 01:36:57 +05301809 select WEAK_ORDERING
1810 select WEAK_REORDERING_BEYOND_LLSC
Jayachandran C7f058e82011-05-07 01:36:57 +05301811 help
1812 Netlogic Microsystems XLR/XLS processors.
Jayachandran C1c773ea2011-11-16 00:21:28 +00001813
1814config CPU_XLP
1815 bool "Netlogic XLP SoC"
1816 depends on SYS_HAS_CPU_XLP
1817 select CPU_SUPPORTS_32BIT_KERNEL
1818 select CPU_SUPPORTS_64BIT_KERNEL
1819 select CPU_SUPPORTS_HIGHMEM
Jayachandran C1c773ea2011-11-16 00:21:28 +00001820 select WEAK_ORDERING
1821 select WEAK_REORDERING_BEYOND_LLSC
1822 select CPU_HAS_PREFETCH
Jayachandran Cd6504842012-10-31 12:01:29 +00001823 select CPU_MIPSR2
Prem Mallappaddba6832015-01-07 16:58:32 +05301824 select CPU_SUPPORTS_HUGEPAGES
Paul Burton2db003a2016-05-06 14:36:24 +01001825 select MIPS_ASID_BITS_VARIABLE
Jayachandran C1c773ea2011-11-16 00:21:28 +00001826 help
1827 Netlogic Microsystems XLP processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001828endchoice
1829
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001830config CPU_MIPS32_3_5_FEATURES
1831 bool "MIPS32 Release 3.5 Features"
1832 depends on SYS_HAS_CPU_MIPS32_R3_5
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001833 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001834 help
1835 Choose this option to build a kernel for release 2 or later of the
1836 MIPS32 architecture including features from the 3.5 release such as
1837 support for Enhanced Virtual Addressing (EVA).
1838
1839config CPU_MIPS32_3_5_EVA
1840 bool "Enhanced Virtual Addressing (EVA)"
1841 depends on CPU_MIPS32_3_5_FEATURES
1842 select EVA
1843 default y
1844 help
1845 Choose this option if you want to enable the Enhanced Virtual
1846 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1847 One of its primary benefits is an increase in the maximum size
1848 of lowmem (up to 3GB). If unsure, say 'N' here.
1849
Steven J. Hillc5b36782015-02-26 18:16:38 -06001850config CPU_MIPS32_R5_FEATURES
1851 bool "MIPS32 Release 5 Features"
1852 depends on SYS_HAS_CPU_MIPS32_R5
1853 depends on CPU_MIPS32_R2
1854 help
1855 Choose this option to build a kernel for release 2 or later of the
1856 MIPS32 architecture including features from release 5 such as
1857 support for Extended Physical Addressing (XPA).
1858
1859config CPU_MIPS32_R5_XPA
1860 bool "Extended Physical Addressing (XPA)"
1861 depends on CPU_MIPS32_R5_FEATURES
1862 depends on !EVA
1863 depends on !PAGE_SIZE_4KB
1864 depends on SYS_SUPPORTS_HIGHMEM
1865 select XPA
1866 select HIGHMEM
Christoph Hellwigd4a451d2018-04-03 16:24:20 +02001867 select PHYS_ADDR_T_64BIT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001868 default n
1869 help
1870 Choose this option if you want to enable the Extended Physical
1871 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1872 benefit is to increase physical addressing equal to or greater
1873 than 40 bits. Note that this has the side effect of turning on
1874 64-bit addressing which in turn makes the PTEs 64-bit in size.
1875 If unsure, say 'N' here.
1876
Wu Zhangjin622844b2010-04-10 20:04:42 +08001877if CPU_LOONGSON2F
1878config CPU_NOP_WORKAROUNDS
1879 bool
1880
1881config CPU_JUMP_WORKAROUNDS
1882 bool
1883
1884config CPU_LOONGSON2F_WORKAROUNDS
1885 bool "Loongson 2F Workarounds"
1886 default y
1887 select CPU_NOP_WORKAROUNDS
1888 select CPU_JUMP_WORKAROUNDS
1889 help
1890 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1891 require workarounds. Without workarounds the system may hang
1892 unexpectedly. For more information please refer to the gas
1893 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1894
1895 Loongson 2F03 and later have fixed these issues and no workarounds
1896 are needed. The workarounds have no significant side effect on them
1897 but may decrease the performance of the system so this option should
1898 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1899 systems.
1900
1901 If unsure, please say Y.
1902endif # CPU_LOONGSON2F
1903
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001904config SYS_SUPPORTS_ZBOOT
1905 bool
1906 select HAVE_KERNEL_GZIP
1907 select HAVE_KERNEL_BZIP2
Florian Fainelli31c48672013-09-16 16:55:20 +01001908 select HAVE_KERNEL_LZ4
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001909 select HAVE_KERNEL_LZMA
Wu Zhangjinfe1d45e02010-01-15 20:34:46 +08001910 select HAVE_KERNEL_LZO
Florian Fainelli4e23eb62013-09-11 11:51:41 +01001911 select HAVE_KERNEL_XZ
Wu Zhangjin1b93b3c2009-10-14 18:12:16 +08001912
1913config SYS_SUPPORTS_ZBOOT_UART16550
1914 bool
1915 select SYS_SUPPORTS_ZBOOT
1916
Alban Bedeldbb98312015-12-10 10:57:21 +01001917config SYS_SUPPORTS_ZBOOT_UART_PROM
1918 bool
1919 select SYS_SUPPORTS_ZBOOT
1920
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001921config CPU_LOONGSON2EF
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001922 bool
1923 select CPU_SUPPORTS_32BIT_KERNEL
1924 select CPU_SUPPORTS_64BIT_KERNEL
1925 select CPU_SUPPORTS_HIGHMEM
Ralf Baechle970d0322012-10-18 13:54:15 +02001926 select CPU_SUPPORTS_HUGEPAGES
Christoph Hellwige9050862018-06-20 09:11:15 +02001927 select ARCH_HAS_PHYS_TO_DMA
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001928
Huacai Chenb2afb642019-11-04 14:11:20 +08001929config CPU_LOONGSON32
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001930 bool
1931 select CPU_MIPS32
Jiaxun Yang7e280f62019-01-22 21:04:12 +08001932 select CPU_MIPSR2
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001933 select CPU_HAS_PREFETCH
1934 select CPU_SUPPORTS_32BIT_KERNEL
1935 select CPU_SUPPORTS_HIGHMEM
Kelvin Cheungf29ad102014-10-10 11:40:01 +08001936 select CPU_SUPPORTS_CPUFREQ
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001937
Jonas Gorskife7f62c2013-12-18 14:12:05 +01001938config CPU_BMIPS32_3300
Jonas Gorski04fa8bf2013-12-18 14:12:06 +01001939 select SMP_UP if SMP
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001940 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001941
1942config CPU_BMIPS4350
1943 bool
1944 select SYS_SUPPORTS_SMP
1945 select SYS_SUPPORTS_HOTPLUG_CPU
1946
1947config CPU_BMIPS4380
1948 bool
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001949 select MIPS_L1_CACHE_SHIFT_6
Jonas Gorskicd746242013-12-18 14:12:02 +01001950 select SYS_SUPPORTS_SMP
1951 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001952 select CPU_HAS_RIXI
Jonas Gorskicd746242013-12-18 14:12:02 +01001953
1954config CPU_BMIPS5000
1955 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01001956 select MIPS_CPU_SCACHE
Kevin Cernekeebbf2ba62014-10-20 21:27:58 -07001957 select MIPS_L1_CACHE_SHIFT_7
Jonas Gorskicd746242013-12-18 14:12:02 +01001958 select SYS_SUPPORTS_SMP
1959 select SYS_SUPPORTS_HOTPLUG_CPU
Florian Fainellib4720802016-02-09 12:55:53 -08001960 select CPU_HAS_RIXI
Kevin Cernekee1bbb6c12011-11-10 22:30:24 -08001961
Jiaxun Yang268a2d62019-10-20 22:43:13 +08001962config SYS_HAS_CPU_LOONGSON64
Huacai Chen0e476d92014-03-21 18:44:07 +08001963 bool
1964 select CPU_SUPPORTS_CPUFREQ
Huacai Chenb2edcfc2016-03-03 09:45:09 +08001965 select CPU_HAS_RIXI
Huacai Chen0e476d92014-03-21 18:44:07 +08001966
Wu Zhangjin3702bba2009-07-02 23:27:41 +08001967config SYS_HAS_CPU_LOONGSON2E
Fuxin Zhang2a21c732007-06-06 14:52:43 +08001968 bool
1969
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001970config SYS_HAS_CPU_LOONGSON2F
1971 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08001972 select CPU_SUPPORTS_CPUFREQ
1973 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
Wu Zhangjin6f7a2512009-11-06 18:45:05 +08001974
Kelvin Cheungca585cf2012-07-25 16:17:24 +02001975config SYS_HAS_CPU_LOONGSON1B
1976 bool
1977
Yang Ling12e32802016-05-19 12:29:30 +08001978config SYS_HAS_CPU_LOONGSON1C
1979 bool
1980
Ralf Baechle7cf80532005-10-20 22:33:09 +01001981config SYS_HAS_CPU_MIPS32_R1
1982 bool
1983
1984config SYS_HAS_CPU_MIPS32_R2
1985 bool
1986
Leonid Yegoshina6e18782013-12-03 10:22:26 +00001987config SYS_HAS_CPU_MIPS32_R3_5
1988 bool
1989
Steven J. Hillc5b36782015-02-26 18:16:38 -06001990config SYS_HAS_CPU_MIPS32_R5
1991 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001992 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Steven J. Hillc5b36782015-02-26 18:16:38 -06001993
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001994config SYS_HAS_CPU_MIPS32_R6
1995 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08001996 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00001997
Ralf Baechle7cf80532005-10-20 22:33:09 +01001998config SYS_HAS_CPU_MIPS64_R1
1999 bool
2000
2001config SYS_HAS_CPU_MIPS64_R2
2002 bool
2003
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002004config SYS_HAS_CPU_MIPS64_R6
2005 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08002006 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002007
Ralf Baechle7cf80532005-10-20 22:33:09 +01002008config SYS_HAS_CPU_R3000
2009 bool
2010
2011config SYS_HAS_CPU_TX39XX
2012 bool
2013
2014config SYS_HAS_CPU_VR41XX
2015 bool
2016
Ralf Baechle7cf80532005-10-20 22:33:09 +01002017config SYS_HAS_CPU_R4X00
2018 bool
2019
2020config SYS_HAS_CPU_TX49XX
2021 bool
2022
2023config SYS_HAS_CPU_R5000
2024 bool
2025
Shinya Kuribayashi542c1022008-10-24 01:27:57 +09002026config SYS_HAS_CPU_R5500
2027 bool
2028
Ralf Baechle7cf80532005-10-20 22:33:09 +01002029config SYS_HAS_CPU_NEVADA
2030 bool
2031
Ralf Baechle7cf80532005-10-20 22:33:09 +01002032config SYS_HAS_CPU_R10000
2033 bool
Paul Burton9ae1f262019-02-04 13:52:58 -08002034 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
Ralf Baechle7cf80532005-10-20 22:33:09 +01002035
2036config SYS_HAS_CPU_RM7000
2037 bool
2038
Ralf Baechle7cf80532005-10-20 22:33:09 +01002039config SYS_HAS_CPU_SB1
2040 bool
2041
David Daney5e6833892009-02-02 11:30:59 -08002042config SYS_HAS_CPU_CAVIUM_OCTEON
2043 bool
2044
Jonas Gorskicd746242013-12-18 14:12:02 +01002045config SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002046 bool
2047
Jonas Gorskife7f62c2013-12-18 14:12:05 +01002048config SYS_HAS_CPU_BMIPS32_3300
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002049 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002050 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002051
2052config SYS_HAS_CPU_BMIPS4350
2053 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002054 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002055
2056config SYS_HAS_CPU_BMIPS4380
2057 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002058 select SYS_HAS_CPU_BMIPS
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002059
2060config SYS_HAS_CPU_BMIPS5000
2061 bool
Jonas Gorskicd746242013-12-18 14:12:02 +01002062 select SYS_HAS_CPU_BMIPS
Hauke Mehrtensf263f2a2018-12-09 16:49:57 +01002063 select ARCH_HAS_SYNC_DMA_FOR_CPU
Kevin Cernekeec1c0c462010-10-17 10:56:53 -07002064
Jayachandran C7f058e82011-05-07 01:36:57 +05302065config SYS_HAS_CPU_XLR
2066 bool
2067
Jayachandran C1c773ea2011-11-16 00:21:28 +00002068config SYS_HAS_CPU_XLP
2069 bool
2070
Ralf Baechle17099b12007-07-14 13:24:05 +01002071#
2072# CPU may reorder R->R, R->W, W->R, W->W
2073# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2074#
Ralf Baechle0004a9d2006-10-31 03:45:07 +00002075config WEAK_ORDERING
2076 bool
Ralf Baechle17099b12007-07-14 13:24:05 +01002077
2078#
2079# CPU may reorder reads and writes beyond LL/SC
2080# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2081#
2082config WEAK_REORDERING_BEYOND_LLSC
2083 bool
Ralf Baechle5e83d432005-10-29 19:32:41 +01002084endmenu
2085
2086#
Chris Dearmanc09b47d2006-06-20 17:15:20 +01002087# These two indicate any level of the MIPS32 and MIPS64 architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01002088#
2089config CPU_MIPS32
2090 bool
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002091 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
Ralf Baechle5e83d432005-10-29 19:32:41 +01002092
2093config CPU_MIPS64
2094 bool
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002095 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
Ralf Baechle5e83d432005-10-29 19:32:41 +01002096
2097#
Paul Burton57eeaced2018-11-08 23:44:55 +00002098# These indicate the revision of the architecture
Ralf Baechle5e83d432005-10-29 19:32:41 +01002099#
2100config CPU_MIPSR1
2101 bool
2102 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2103
2104config CPU_MIPSR2
2105 bool
David Daneya86c7f72008-12-11 15:33:38 -08002106 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
Florian Fainelli8256b172016-02-09 12:55:51 -08002107 select CPU_HAS_RIXI
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002108 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002109 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002110
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002111config CPU_MIPSR6
2112 bool
2113 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
Florian Fainelli8256b172016-02-09 12:55:51 -08002114 select CPU_HAS_RIXI
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002115 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
Paul Burton87321fd2016-05-06 13:35:03 +01002116 select HAVE_ARCH_BITREVERSE
Paul Burton2db003a2016-05-06 14:36:24 +01002117 select MIPS_ASID_BITS_VARIABLE
Marcin Nowakowski4a5dc51e2018-02-09 22:11:06 +00002118 select MIPS_CRC_SUPPORT
Markos Chandrasa7e07b12014-11-13 13:32:03 +00002119 select MIPS_SPRAM
Ralf Baechle5e83d432005-10-29 19:32:41 +01002120
Paul Burton57eeaced2018-11-08 23:44:55 +00002121config TARGET_ISA_REV
2122 int
2123 default 1 if CPU_MIPSR1
2124 default 2 if CPU_MIPSR2
2125 default 6 if CPU_MIPSR6
2126 default 0
2127 help
2128 Reflects the ISA revision being targeted by the kernel build. This
2129 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2130
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002131config EVA
2132 bool
2133
Steven J. Hillc5b36782015-02-26 18:16:38 -06002134config XPA
2135 bool
2136
Ralf Baechle5e83d432005-10-29 19:32:41 +01002137config SYS_SUPPORTS_32BIT_KERNEL
2138 bool
2139config SYS_SUPPORTS_64BIT_KERNEL
2140 bool
2141config CPU_SUPPORTS_32BIT_KERNEL
2142 bool
2143config CPU_SUPPORTS_64BIT_KERNEL
2144 bool
Wu Zhangjin55045ff2009-11-11 13:39:12 +08002145config CPU_SUPPORTS_CPUFREQ
2146 bool
2147config CPU_SUPPORTS_ADDRWINCFG
2148 bool
David Daney9cffd1542009-05-27 17:47:46 -07002149config CPU_SUPPORTS_HUGEPAGES
2150 bool
Daniel Silsby171543e2019-07-15 17:39:59 -04002151 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
David Daney82622282009-10-14 12:16:56 -07002152config MIPS_PGD_C0_CONTEXT
2153 bool
Paul Burtoncebf8c02017-06-02 15:38:03 -07002154 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
Ralf Baechle5e83d432005-10-29 19:32:41 +01002155
David Daney8192c9e2008-09-23 00:04:26 -07002156#
2157# Set to y for ptrace access to watch registers.
2158#
2159config HARDWARE_WATCHPOINTS
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002160 bool
2161 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
David Daney8192c9e2008-09-23 00:04:26 -07002162
Ralf Baechle5e83d432005-10-29 19:32:41 +01002163menu "Kernel type"
2164
2165choice
Ralf Baechle5e83d432005-10-29 19:32:41 +01002166 prompt "Kernel code model"
2167 help
2168 You should only select this option if you have a workload that
2169 actually benefits from 64-bit processing or if your machine has
2170 large memory. You will only be presented a single option in this
2171 menu if your system does not support both 32-bit and 64-bit kernels.
2172
2173config 32BIT
2174 bool "32-bit kernel"
2175 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2176 select TRAD_SIGNALS
2177 help
2178 Select this option if you want to build a 32-bit kernel.
Ralf Baechlef17c4ca2015-07-23 12:02:09 +02002179
Ralf Baechle5e83d432005-10-29 19:32:41 +01002180config 64BIT
2181 bool "64-bit kernel"
2182 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2183 help
2184 Select this option if you want to build a 64-bit kernel.
2185
2186endchoice
2187
Sanjay Lal2235a542012-11-21 18:33:59 -08002188config KVM_GUEST
2189 bool "KVM Guest Kernel"
James Hoganf2a5b1d2013-07-12 10:26:11 +00002190 depends on BROKEN_ON_SMP
Sanjay Lal2235a542012-11-21 18:33:59 -08002191 help
James Hogancaa1faa2015-12-16 23:49:26 +00002192 Select this option if building a guest kernel for KVM (Trap & Emulate)
2193 mode.
Sanjay Lal2235a542012-11-21 18:33:59 -08002194
James Hoganeda3d332014-05-29 10:16:36 +01002195config KVM_GUEST_TIMER_FREQ
2196 int "Count/Compare Timer Frequency (MHz)"
Sanjay Lal2235a542012-11-21 18:33:59 -08002197 depends on KVM_GUEST
James Hoganeda3d332014-05-29 10:16:36 +01002198 default 100
Sanjay Lal2235a542012-11-21 18:33:59 -08002199 help
James Hoganeda3d332014-05-29 10:16:36 +01002200 Set this to non-zero if building a guest kernel for KVM to skip RTC
2201 emulation when determining guest CPU Frequency. Instead, the guest's
2202 timer frequency is specified directly.
Sanjay Lal2235a542012-11-21 18:33:59 -08002203
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002204config MIPS_VA_BITS_48
2205 bool "48 bits virtual memory"
2206 depends on 64BIT
2207 help
Alex Belits3377e222017-02-16 17:27:34 -08002208 Support a maximum at least 48 bits of application virtual
2209 memory. Default is 40 bits or less, depending on the CPU.
2210 For page sizes 16k and above, this option results in a small
2211 memory overhead for page tables. For 4k page size, a fourth
2212 level of page tables is added which imposes both a memory
2213 overhead as well as slower TLB fault handling.
2214
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002215 If unsure, say N.
2216
Linus Torvalds1da177e2005-04-16 15:20:36 -07002217choice
2218 prompt "Kernel page size"
2219 default PAGE_SIZE_4KB
2220
2221config PAGE_SIZE_4KB
2222 bool "4kB"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002223 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002224 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002225 This option select the standard 4kB Linux page size. On some
2226 R3000-family processors this is the only available page size. Using
2227 4kB page size will minimize memory consumption and is therefore
2228 recommended for low memory systems.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002229
2230config PAGE_SIZE_8KB
2231 bool "8kB"
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002232 depends on CPU_CAVIUM_OCTEON
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002233 depends on !MIPS_VA_BITS_48
Linus Torvalds1da177e2005-04-16 15:20:36 -07002234 help
2235 Using 8kB page size will result in higher performance kernel at
2236 the price of higher memory consumption. This option is available
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002237 only on cnMIPS processors. Note that you will need a suitable Linux
2238 distribution to support this.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002239
2240config PAGE_SIZE_16KB
2241 bool "16kB"
Ralf Baechle714bfad2006-05-17 14:04:30 +01002242 depends on !CPU_R3000 && !CPU_TX39XX
Linus Torvalds1da177e2005-04-16 15:20:36 -07002243 help
2244 Using 16kB page size will result in higher performance kernel at
2245 the price of higher memory consumption. This option is available on
Ralf Baechle714bfad2006-05-17 14:04:30 +01002246 all non-R3000 family processors. Note that you will need a suitable
2247 Linux distribution to support this.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002248
Ralf Baechlec52399b2009-04-02 14:07:10 +02002249config PAGE_SIZE_32KB
2250 bool "32kB"
2251 depends on CPU_CAVIUM_OCTEON
Leonid Yegoshin1e321fa2015-05-14 18:34:43 -07002252 depends on !MIPS_VA_BITS_48
Ralf Baechlec52399b2009-04-02 14:07:10 +02002253 help
2254 Using 32kB page size will result in higher performance kernel at
2255 the price of higher memory consumption. This option is available
2256 only on cnMIPS cores. Note that you will need a suitable Linux
2257 distribution to support this.
2258
Linus Torvalds1da177e2005-04-16 15:20:36 -07002259config PAGE_SIZE_64KB
2260 bool "64kB"
Paul Burton3b2db172017-06-05 11:21:27 -07002261 depends on !CPU_R3000 && !CPU_TX39XX
Linus Torvalds1da177e2005-04-16 15:20:36 -07002262 help
2263 Using 64kB page size will result in higher performance kernel at
2264 the price of higher memory consumption. This option is available on
2265 all non-R3000 family processor. Not that at the time of this
Ralf Baechle714bfad2006-05-17 14:04:30 +01002266 writing this option is still high experimental.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002267
2268endchoice
2269
David Daneyc9bace72010-10-11 14:52:45 -07002270config FORCE_MAX_ZONEORDER
2271 int "Maximum zone order"
Alex Smithe4362d12014-01-21 11:22:35 +00002272 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2273 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2274 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2275 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2276 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2277 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
David Daneyc9bace72010-10-11 14:52:45 -07002278 range 11 64
2279 default "11"
2280 help
2281 The kernel memory allocator divides physically contiguous memory
2282 blocks into "zones", where each zone is a power of two number of
2283 pages. This option selects the largest power of two that the kernel
2284 keeps in the memory allocator. If you need to allocate very large
2285 blocks of physically contiguous memory, then you may need to
2286 increase this value.
2287
2288 This config option is actually maximum order plus one. For example,
2289 a value of 11 means that the largest free memory block is 2^10 pages.
2290
2291 The page size is not necessarily 4KB. Keep this in mind
2292 when choosing a value for this option.
2293
Linus Torvalds1da177e2005-04-16 15:20:36 -07002294config BOARD_SCACHE
2295 bool
2296
2297config IP22_CPU_SCACHE
2298 bool
2299 select BOARD_SCACHE
2300
Chris Dearman9318c512006-06-20 17:15:20 +01002301#
2302# Support for a MIPS32 / MIPS64 style S-caches
2303#
2304config MIPS_CPU_SCACHE
2305 bool
2306 select BOARD_SCACHE
2307
Linus Torvalds1da177e2005-04-16 15:20:36 -07002308config R5000_CPU_SCACHE
2309 bool
2310 select BOARD_SCACHE
2311
2312config RM7000_CPU_SCACHE
2313 bool
2314 select BOARD_SCACHE
2315
2316config SIBYTE_DMA_PAGEOPS
2317 bool "Use DMA to clear/copy pages"
2318 depends on CPU_SB1
2319 help
2320 Instead of using the CPU to zero and copy pages, use a Data Mover
2321 channel. These DMA channels are otherwise unused by the standard
2322 SiByte Linux port. Seems to give a small performance benefit.
2323
2324config CPU_HAS_PREFETCH
Ralf Baechlec8094b52005-08-05 14:28:54 +00002325 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002326
Florian Fainelli3165c842012-01-31 18:18:43 +01002327config CPU_GENERIC_DUMP_TLB
2328 bool
Paul Burtonc2aeaae2019-07-22 22:00:03 +00002329 default y if !(CPU_R3000 || CPU_TX39XX)
Florian Fainelli3165c842012-01-31 18:18:43 +01002330
Paul Burtonc92e47e2018-11-07 23:14:02 +00002331config MIPS_FP_SUPPORT
Paul Burton183b40f2018-11-07 23:14:11 +00002332 bool "Floating Point support" if EXPERT
2333 default y
2334 help
2335 Select y to include support for floating point in the kernel
2336 including initialization of FPU hardware, FP context save & restore
2337 and emulation of an FPU where necessary. Without this support any
2338 userland program attempting to use floating point instructions will
2339 receive a SIGILL.
2340
2341 If you know that your userland will not attempt to use floating point
2342 instructions then you can say n here to shrink the kernel a little.
2343
2344 If unsure, say y.
Paul Burtonc92e47e2018-11-07 23:14:02 +00002345
Paul Burton97f7dcb2018-11-07 23:14:02 +00002346config CPU_R2300_FPU
2347 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002348 depends on MIPS_FP_SUPPORT
Paul Burton97f7dcb2018-11-07 23:14:02 +00002349 default y if CPU_R3000 || CPU_TX39XX
2350
Paul Burton54746822019-08-31 15:40:43 +00002351config CPU_R3K_TLB
2352 bool
2353
Florian Fainelli91405eb2012-01-31 18:18:44 +01002354config CPU_R4K_FPU
2355 bool
Paul Burtonc92e47e2018-11-07 23:14:02 +00002356 depends on MIPS_FP_SUPPORT
Paul Burton97f7dcb2018-11-07 23:14:02 +00002357 default y if !CPU_R2300_FPU
Florian Fainelli91405eb2012-01-31 18:18:44 +01002358
Florian Fainelli62cedc42012-01-31 18:18:45 +01002359config CPU_R4K_CACHE_TLB
2360 bool
Paul Burton54746822019-08-31 15:40:43 +00002361 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
Florian Fainelli62cedc42012-01-31 18:18:45 +01002362
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002363config MIPS_MT_SMP
Markos Chandrasa92b7f82014-04-08 11:59:10 +01002364 bool "MIPS MT SMP support (1 TC on each available VPE)"
Paul Burton5cbf9682017-08-07 16:01:16 -07002365 default y
Paul Burton527f1022017-08-07 16:18:04 -07002366 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002367 select CPU_MIPSR2_IRQ_VI
Chris Dearmand725cf32007-05-08 14:05:39 +01002368 select CPU_MIPSR2_IRQ_EI
Steven J. Hillc080faa2013-10-04 16:23:28 -05002369 select SYNC_R4K
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002370 select MIPS_MT
2371 select SMP
Ralf Baechle87353d82007-11-19 12:23:51 +00002372 select SMP_UP
Steven J. Hillc080faa2013-10-04 16:23:28 -05002373 select SYS_SUPPORTS_SMP
2374 select SYS_SUPPORTS_SCHED_SMT
Al Cooper399aaa22012-07-13 16:44:53 -04002375 select MIPS_PERF_SHARED_TC_COUNTERS
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002376 help
Steven J. Hillc080faa2013-10-04 16:23:28 -05002377 This is a kernel model which is known as SMVP. This is supported
2378 on cores with the MT ASE and uses the available VPEs to implement
2379 virtual processors which supports SMP. This is equivalent to the
2380 Intel Hyperthreading feature. For further information go to
2381 <http://www.imgtec.com/mips/mips-multithreading.asp>.
Ralf Baechle59d6ab82006-10-06 17:36:20 +01002382
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002383config MIPS_MT
2384 bool
2385
Ralf Baechle0ab7aef2007-03-02 20:42:04 +00002386config SCHED_SMT
2387 bool "SMT (multithreading) scheduler support"
2388 depends on SYS_SUPPORTS_SCHED_SMT
2389 default n
2390 help
2391 SMT scheduler support improves the CPU scheduler's decision making
2392 when dealing with MIPS MT enabled cores at a cost of slightly
2393 increased overhead in some places. If unsure say N here.
2394
2395config SYS_SUPPORTS_SCHED_SMT
2396 bool
2397
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002398config SYS_SUPPORTS_MULTITHREADING
2399 bool
2400
Ralf Baechlef088fc82006-04-05 09:45:47 +01002401config MIPS_MT_FPAFF
2402 bool "Dynamic FPU affinity for FP-intensive threads"
Ralf Baechlef088fc82006-04-05 09:45:47 +01002403 default y
Ralf Baechleb6336482014-05-23 16:29:44 +02002404 depends on MIPS_MT_SMP
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002405
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002406config MIPSR2_TO_R6_EMULATOR
2407 bool "MIPS R2-to-R6 emulator"
Paul Burton9eaa9a82016-10-17 15:34:37 +01002408 depends on CPU_MIPSR6
Paul Burtonc92e47e2018-11-07 23:14:02 +00002409 depends on MIPS_FP_SUPPORT
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002410 default y
2411 help
2412 Choose this option if you want to run non-R6 MIPS userland code.
2413 Even if you say 'Y' here, the emulator will still be disabled by
Markos Chandras07edf0d2015-03-10 12:30:56 +00002414 default. You can enable it using the 'mipsr2emu' kernel option.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002415 The only reason this is a build-time option is to save ~14K from the
2416 final kernel image.
Leonid Yegoshinb0a668f2014-12-03 15:47:03 +00002417
James Hoganf35764e2018-01-15 20:54:35 +00002418config SYS_SUPPORTS_VPE_LOADER
2419 bool
2420 depends on SYS_SUPPORTS_MULTITHREADING
2421 help
2422 Indicates that the platform supports the VPE loader, and provides
2423 physical_memsize.
2424
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002425config MIPS_VPE_LOADER
2426 bool "VPE loader support."
James Hoganf35764e2018-01-15 20:54:35 +00002427 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002428 select CPU_MIPSR2_IRQ_VI
2429 select CPU_MIPSR2_IRQ_EI
Ralf Baechle07cc0c92007-07-27 19:31:10 +01002430 select MIPS_MT
2431 help
2432 Includes a loader for loading an elf relocatable object
2433 onto another VPE and running it.
Ralf Baechlef088fc82006-04-05 09:45:47 +01002434
Deng-Cheng Zhu17a1d522013-10-30 15:52:07 -05002435config MIPS_VPE_LOADER_CMP
2436 bool
2437 default "y"
2438 depends on MIPS_VPE_LOADER && MIPS_CMP
2439
Deng-Cheng Zhu1a2a6d72013-10-30 15:52:06 -05002440config MIPS_VPE_LOADER_MT
2441 bool
2442 default "y"
2443 depends on MIPS_VPE_LOADER && !MIPS_CMP
2444
Ralf Baechlee01402b2005-07-14 15:57:16 +00002445config MIPS_VPE_LOADER_TOM
2446 bool "Load VPE program into memory hidden from linux"
2447 depends on MIPS_VPE_LOADER
2448 default y
2449 help
2450 The loader can use memory that is present but has been hidden from
2451 Linux using the kernel command line option "mem=xxMB". It's up to
2452 you to ensure the amount you put in the option and the space your
2453 program requires is less or equal to the amount physically present.
2454
Ralf Baechlee01402b2005-07-14 15:57:16 +00002455config MIPS_VPE_APSP_API
Ralf Baechle5e83d432005-10-29 19:32:41 +01002456 bool "Enable support for AP/SP API (RTLX)"
2457 depends on MIPS_VPE_LOADER
Ralf Baechlee01402b2005-07-14 15:57:16 +00002458
Deng-Cheng Zhuda615cf2014-01-01 16:29:03 +01002459config MIPS_VPE_APSP_API_CMP
2460 bool
2461 default "y"
2462 depends on MIPS_VPE_APSP_API && MIPS_CMP
2463
Deng-Cheng Zhu2c973ef2014-01-01 16:26:46 +01002464config MIPS_VPE_APSP_API_MT
2465 bool
2466 default "y"
2467 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2468
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002469config MIPS_CMP
Paul Burton5cac93b2014-01-15 10:32:00 +00002470 bool "MIPS CMP framework support (DEPRECATED)"
Markos Chandras56763192015-07-09 10:40:38 +01002471 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
Markos Chandrasb10b43b2014-07-22 09:29:34 +01002472 select SMP
Tim Andersoneb9b5142009-06-17 16:40:34 -07002473 select SYNC_R4K
Markos Chandrasb10b43b2014-07-22 09:29:34 +01002474 select SYS_SUPPORTS_SMP
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002475 select WEAK_ORDERING
2476 default n
2477 help
Paul Burton044505c2014-01-15 10:31:58 +00002478 Select this if you are using a bootloader which implements the "CMP
2479 framework" protocol (ie. YAMON) and want your kernel to make use of
2480 its ability to start secondary CPUs.
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002481
Paul Burton5cac93b2014-01-15 10:32:00 +00002482 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2483 instead of this.
2484
Paul Burton0ee958e2014-01-15 10:31:53 +00002485config MIPS_CPS
2486 bool "MIPS Coherent Processing System support"
Paul Burton5a3e7c02016-02-03 03:15:33 +00002487 depends on SYS_SUPPORTS_MIPS_CPS
Paul Burton0ee958e2014-01-15 10:31:53 +00002488 select MIPS_CM
Paul Burton1d8f1f52014-04-14 14:13:57 +01002489 select MIPS_CPS_PM if HOTPLUG_CPU
Paul Burton0ee958e2014-01-15 10:31:53 +00002490 select SMP
2491 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
Paul Burton1d8f1f52014-04-14 14:13:57 +01002492 select SYS_SUPPORTS_HOTPLUG_CPU
Paul Burtonc8b77122017-06-02 14:48:52 -07002493 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
Paul Burton0ee958e2014-01-15 10:31:53 +00002494 select SYS_SUPPORTS_SMP
2495 select WEAK_ORDERING
2496 help
2497 Select this if you wish to run an SMP kernel across multiple cores
2498 within a MIPS Coherent Processing System. When this option is
2499 enabled the kernel will probe for other cores and boot them with
2500 no external assistance. It is safe to enable this when hardware
2501 support is unavailable.
2502
Paul Burton3179d372014-04-14 11:00:56 +01002503config MIPS_CPS_PM
Markos Chandras39a59592014-09-18 16:09:49 +01002504 depends on MIPS_CPS
Paul Burton3179d372014-04-14 11:00:56 +01002505 bool
2506
Paul Burton9f98f3d2014-01-15 10:31:51 +00002507config MIPS_CM
2508 bool
Paul Burton3c9b4162017-08-12 19:49:42 -07002509 select MIPS_CPC
Paul Burton9f98f3d2014-01-15 10:31:51 +00002510
Paul Burton9c38cf42014-01-15 10:31:52 +00002511config MIPS_CPC
2512 bool
Ralf Baechle26009902006-04-05 09:45:45 +01002513
Linus Torvalds1da177e2005-04-16 15:20:36 -07002514config SB1_PASS_2_WORKAROUNDS
2515 bool
2516 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2517 default y
2518
2519config SB1_PASS_2_1_WORKAROUNDS
2520 bool
2521 depends on CPU_SB1 && CPU_SB1_PASS_2
2522 default y
2523
Markos Chandras9e2b5372014-07-21 08:46:14 +01002524choice
2525 prompt "SmartMIPS or microMIPS ASE support"
2526
2527config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2528 bool "None"
2529 help
2530 Select this if you want neither microMIPS nor SmartMIPS support
2531
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002532config CPU_HAS_SMARTMIPS
2533 depends on SYS_SUPPORTS_SMARTMIPS
Markos Chandras9e2b5372014-07-21 08:46:14 +01002534 bool "SmartMIPS"
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002535 help
2536 SmartMIPS is a extension of the MIPS32 architecture aimed at
2537 increased security at both hardware and software level for
2538 smartcards. Enabling this option will allow proper use of the
2539 SmartMIPS instructions by Linux applications. However a kernel with
2540 this option will not work on a MIPS core without SmartMIPS core. If
2541 you don't know you probably don't have SmartMIPS and should say N
2542 here.
2543
Steven J. Hillbce86082013-03-25 13:27:11 -05002544config CPU_MICROMIPS
Leonid Yegoshin7fd08ca2014-10-27 10:34:11 +00002545 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
Markos Chandras9e2b5372014-07-21 08:46:14 +01002546 bool "microMIPS"
Steven J. Hillbce86082013-03-25 13:27:11 -05002547 help
2548 When this option is enabled the kernel will be built using the
2549 microMIPS ISA
2550
Markos Chandras9e2b5372014-07-21 08:46:14 +01002551endchoice
2552
Paul Burtona5e9a692014-01-27 15:23:10 +00002553config CPU_HAS_MSA
Paul Burton0ce34172015-07-27 12:58:27 -07002554 bool "Support for the MIPS SIMD Architecture"
Paul Burtona5e9a692014-01-27 15:23:10 +00002555 depends on CPU_SUPPORTS_MSA
Paul Burtonc92e47e2018-11-07 23:14:02 +00002556 depends on MIPS_FP_SUPPORT
Paul Burton2a6cb6692014-07-11 16:47:14 +01002557 depends on 64BIT || MIPS_O32_FP64_SUPPORT
Paul Burtona5e9a692014-01-27 15:23:10 +00002558 help
2559 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2560 and a set of SIMD instructions to operate on them. When this option
Paul Burton1db1af82014-01-27 15:23:11 +00002561 is enabled the kernel will support allocating & switching MSA
2562 vector register contexts. If you know that your kernel will only be
2563 running on CPUs which do not support MSA or that your userland will
2564 not be making use of it then you may wish to say N here to reduce
2565 the size & complexity of your kernel.
Paul Burtona5e9a692014-01-27 15:23:10 +00002566
2567 If unsure, say Y.
2568
Linus Torvalds1da177e2005-04-16 15:20:36 -07002569config CPU_HAS_WB
Ralf Baechlef7062dd2006-04-24 14:58:53 +01002570 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002571
Kevin Cernekeedf0ac8a2011-11-16 01:25:45 +00002572config XKS01
2573 bool
2574
Jiaxun Yangba9196d2020-01-13 18:14:59 +08002575config CPU_HAS_DIEI
2576 depends on !CPU_DIEI_BROKEN
2577 bool
2578
2579config CPU_DIEI_BROKEN
2580 bool
2581
Florian Fainelli8256b172016-02-09 12:55:51 -08002582config CPU_HAS_RIXI
2583 bool
2584
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002585config CPU_NO_LOAD_STORE_LR
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002586 bool
2587 help
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002588 CPU lacks support for unaligned load and store instructions:
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002589 LWL, LWR, SWL, SWR (Load/store word left/right).
Alexander Lobakin18d84e2e2020-01-22 13:58:50 +03002590 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2591 systems).
Yasha Cherikovsky932afde2018-09-26 14:16:15 +03002592
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002593#
2594# Vectored interrupt mode is an R2 feature
2595#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002596config CPU_MIPSR2_IRQ_VI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002597 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002598
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002599#
2600# Extended interrupt mode is an R2 feature
2601#
Ralf Baechlee01402b2005-07-14 15:57:16 +00002602config CPU_MIPSR2_IRQ_EI
Ralf Baechlef41ae0b2006-06-05 17:24:46 +01002603 bool
Ralf Baechlee01402b2005-07-14 15:57:16 +00002604
Linus Torvalds1da177e2005-04-16 15:20:36 -07002605config CPU_HAS_SYNC
2606 bool
2607 depends on !CPU_R3000
2608 default y
2609
2610#
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002611# CPU non-features
2612#
2613config CPU_DADDI_WORKAROUNDS
2614 bool
2615
2616config CPU_R4000_WORKAROUNDS
2617 bool
2618 select CPU_R4400_WORKAROUNDS
2619
2620config CPU_R4400_WORKAROUNDS
2621 bool
2622
Paul Burton071d2f02019-10-01 23:04:32 +00002623config CPU_R4X00_BUGS64
2624 bool
2625 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2626
Paul Burton4edf00a2016-05-06 14:36:23 +01002627config MIPS_ASID_SHIFT
2628 int
2629 default 6 if CPU_R3000 || CPU_TX39XX
Paul Burton4edf00a2016-05-06 14:36:23 +01002630 default 0
2631
2632config MIPS_ASID_BITS
2633 int
Paul Burton2db003a2016-05-06 14:36:24 +01002634 default 0 if MIPS_ASID_BITS_VARIABLE
Paul Burton4edf00a2016-05-06 14:36:23 +01002635 default 6 if CPU_R3000 || CPU_TX39XX
2636 default 8
2637
Paul Burton2db003a2016-05-06 14:36:24 +01002638config MIPS_ASID_BITS_VARIABLE
2639 bool
2640
Marcin Nowakowski4a5dc51e2018-02-09 22:11:06 +00002641config MIPS_CRC_SUPPORT
2642 bool
2643
Maciej W. Rozycki20d60d92007-10-23 12:43:11 +01002644#
Linus Torvalds1da177e2005-04-16 15:20:36 -07002645# - Highmem only makes sense for the 32-bit kernel.
2646# - The current highmem code will only work properly on physically indexed
2647# caches such as R3000, SB1, R7000 or those that look like they're virtually
2648# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2649# moment we protect the user and offer the highmem option only on machines
2650# where it's known to be safe. This will not offer highmem on a few systems
2651# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2652# indexed CPUs but we're playing safe.
Ralf Baechle797798c2005-08-10 15:17:11 +00002653# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2654# know they might have memory configurations that could make use of highmem
2655# support.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002656#
2657config HIGHMEM
2658 bool "High Memory Support"
Leonid Yegoshina6e18782013-12-03 10:22:26 +00002659 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
Ralf Baechle797798c2005-08-10 15:17:11 +00002660
2661config CPU_SUPPORTS_HIGHMEM
2662 bool
2663
2664config SYS_SUPPORTS_HIGHMEM
2665 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07002666
Franck Bui-Huu9693a852007-02-02 17:41:47 +01002667config SYS_SUPPORTS_SMARTMIPS
2668 bool
2669
Steven J. Hilla6a48342013-02-05 16:52:02 -06002670config SYS_SUPPORTS_MICROMIPS
2671 bool
2672
Ralf Baechle377cb1b2014-04-29 01:49:24 +02002673config SYS_SUPPORTS_MIPS16
2674 bool
2675 help
2676 This option must be set if a kernel might be executed on a MIPS16-
2677 enabled CPU even if MIPS16 is not actually being used. In other
2678 words, it makes the kernel MIPS16-tolerant.
2679
Paul Burtona5e9a692014-01-27 15:23:10 +00002680config CPU_SUPPORTS_MSA
2681 bool
2682
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002683config ARCH_FLATMEM_ENABLE
2684 def_bool y
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002685 depends on !NUMA && !CPU_LOONGSON2EF
Yoichi Yuasab4819b52005-06-25 14:54:31 -07002686
Atsushi Nemotob1c6cd42006-07-03 00:09:47 +09002687config ARCH_SPARSEMEM_ENABLE
2688 bool
Mike Rapoport397dc002019-09-16 14:13:10 +03002689 select SPARSEMEM_STATIC if !SGI_IP27
Atsushi Nemoto31473742006-07-03 00:09:47 +09002690
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002691config NUMA
2692 bool "NUMA Support"
2693 depends on SYS_SUPPORTS_NUMA
2694 help
2695 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2696 Access). This option improves performance on systems with more
2697 than two nodes; on two node systems it is generally better to
Randy Dunlap172a37e2020-01-31 17:55:43 -08002698 leave it disabled; on single node systems leave this option
Ralf Baechled8cb4e12006-06-11 23:03:08 +01002699 disabled.
2700
2701config SYS_SUPPORTS_NUMA
2702 bool
2703
Thomas Bogendoerferf3c560a2020-01-09 13:23:31 +01002704config HAVE_SETUP_PER_CPU_AREA
2705 def_bool y
2706 depends on NUMA
2707
2708config NEED_PER_CPU_EMBED_FIRST_CHUNK
2709 def_bool y
2710 depends on NUMA
2711
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002712config RELOCATABLE
2713 bool "Relocatable kernel"
Steven J. Hill3ff72be2016-12-13 14:25:37 -06002714 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
Matt Redfearn8c530ea2016-03-31 10:05:39 +01002715 help
2716 This builds a kernel image that retains relocation information
2717 so it can be loaded someplace besides the default 1MB.
2718 The relocations make the kernel binary about 15% larger,
2719 but are discarded at runtime
2720
Matt Redfearn069fd762016-03-31 10:05:34 +01002721config RELOCATION_TABLE_SIZE
2722 hex "Relocation table size"
2723 depends on RELOCATABLE
2724 range 0x0 0x01000000
2725 default "0x00100000"
2726 ---help---
2727 A table of relocation data will be appended to the kernel binary
2728 and parsed at boot to fix up the relocated kernel.
2729
2730 This option allows the amount of space reserved for the table to be
2731 adjusted, although the default of 1Mb should be ok in most cases.
2732
2733 The build will fail and a valid size suggested if this is too small.
2734
2735 If unsure, leave at the default value.
2736
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002737config RANDOMIZE_BASE
2738 bool "Randomize the address of the kernel image"
2739 depends on RELOCATABLE
2740 ---help---
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002741 Randomizes the physical and virtual address at which the
2742 kernel image is loaded, as a security feature that
2743 deters exploit attempts relying on knowledge of the location
2744 of kernel internals.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002745
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002746 Entropy is generated using any coprocessor 0 registers available.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002747
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002748 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002749
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002750 If unsure, say N.
Matt Redfearn405bc8f2016-03-31 10:05:41 +01002751
2752config RANDOMIZE_BASE_MAX_OFFSET
2753 hex "Maximum kASLR offset" if EXPERT
2754 depends on RANDOMIZE_BASE
2755 range 0x0 0x40000000 if EVA || 64BIT
2756 range 0x0 0x08000000
2757 default "0x01000000"
2758 ---help---
2759 When kASLR is active, this provides the maximum offset that will
2760 be applied to the kernel image. It should be set according to the
2761 amount of physical RAM available in the target system minus
2762 PHYSICAL_START and must be a power of 2.
2763
2764 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2765 EVA or 64-bit. The default is 16Mb.
2766
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07002767config NODES_SHIFT
2768 int
2769 default "6"
2770 depends on NEED_MULTIPLE_NODES
2771
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002772config HW_PERF_EVENTS
2773 bool "Enable hardware performance counter support for perf events"
Jiaxun Yang268a2d62019-10-20 22:43:13 +08002774 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
Deng-Cheng Zhu14f70012010-10-12 19:37:22 +08002775 default y
2776 help
2777 Enable hardware performance counter support for perf events. If
2778 disabled, perf events will use software events only.
2779
Tiezhu Yangbe8fa1c2020-02-05 12:08:33 +08002780config DMI
2781 bool "Enable DMI scanning"
2782 depends on MACH_LOONGSON64
2783 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2784 default y
2785 help
2786 Enabled scanning of DMI to identify machine quirks. Say Y
2787 here unless you have verified that your setup is not
2788 affected by entries in the DMI blacklist. Required by PNP
2789 BIOS code.
2790
Linus Torvalds1da177e2005-04-16 15:20:36 -07002791config SMP
2792 bool "Multi-Processing support"
Ralf Baechlee73ea272006-06-04 11:51:46 +01002793 depends on SYS_SUPPORTS_SMP
2794 help
Linus Torvalds1da177e2005-04-16 15:20:36 -07002795 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08002796 a system with only one CPU, say N. If you have a system with more
2797 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002798
Robert Graffham4a474152014-01-23 15:55:29 -08002799 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07002800 machines, but will use only one CPU of a multiprocessor machine. If
2801 you say Y here, the kernel will run on many, but not all,
Robert Graffham4a474152014-01-23 15:55:29 -08002802 uniprocessor machines. On a uniprocessor machine, the kernel
Linus Torvalds1da177e2005-04-16 15:20:36 -07002803 will run faster if you say N here.
2804
2805 People using multiprocessor machines who say Y here should also say
2806 Y to "Enhanced Real Time Clock Support", below.
2807
Adrian Bunk03502fa2008-02-03 15:50:21 +02002808 See also the SMP-HOWTO available at
2809 <http://www.tldp.org/docs.html#howto>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002810
2811 If you don't know what to do here, say N.
2812
Matt Redfearn7840d612016-07-07 08:50:40 +01002813config HOTPLUG_CPU
2814 bool "Support for hot-pluggable CPUs"
2815 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2816 help
2817 Say Y here to allow turning CPUs off and on. CPUs can be
2818 controlled through /sys/devices/system/cpu.
2819 (Note: power management support will enable this option
2820 automatically on SMP systems. )
2821 Say N if you want to disable CPU hotplug.
2822
Ralf Baechle87353d82007-11-19 12:23:51 +00002823config SMP_UP
2824 bool
2825
Ralf Baechle4a16ff42008-10-04 00:06:29 +01002826config SYS_SUPPORTS_MIPS_CMP
2827 bool
2828
Paul Burton0ee958e2014-01-15 10:31:53 +00002829config SYS_SUPPORTS_MIPS_CPS
2830 bool
2831
Ralf Baechlee73ea272006-06-04 11:51:46 +01002832config SYS_SUPPORTS_SMP
2833 bool
2834
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002835config NR_CPUS_DEFAULT_4
2836 bool
2837
2838config NR_CPUS_DEFAULT_8
2839 bool
2840
2841config NR_CPUS_DEFAULT_16
2842 bool
2843
2844config NR_CPUS_DEFAULT_32
2845 bool
2846
2847config NR_CPUS_DEFAULT_64
2848 bool
2849
Linus Torvalds1da177e2005-04-16 15:20:36 -07002850config NR_CPUS
Jayachandran Ca91796a2014-04-29 20:07:40 +05302851 int "Maximum number of CPUs (2-256)"
2852 range 2 256
Linus Torvalds1da177e2005-04-16 15:20:36 -07002853 depends on SMP
Ralf Baechle130e2fb2007-02-06 16:53:15 +00002854 default "4" if NR_CPUS_DEFAULT_4
2855 default "8" if NR_CPUS_DEFAULT_8
2856 default "16" if NR_CPUS_DEFAULT_16
2857 default "32" if NR_CPUS_DEFAULT_32
2858 default "64" if NR_CPUS_DEFAULT_64
Linus Torvalds1da177e2005-04-16 15:20:36 -07002859 help
2860 This allows you to specify the maximum number of CPUs which this
2861 kernel will support. The maximum supported value is 32 for 32-bit
2862 kernel and 64 for 64-bit kernels; the minimum value which makes
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002863 sense is 1 for Qemu (useful only for kernel debugging purposes)
2864 and 2 for all others.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002865
2866 This is purely to save memory - each supported CPU adds
Atsushi Nemoto72ede9b2007-03-18 01:01:39 +09002867 approximately eight kilobytes to the kernel image. For best
2868 performance should round up your number of processors to the next
2869 power of two.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002870
Al Cooper399aaa22012-07-13 16:44:53 -04002871config MIPS_PERF_SHARED_TC_COUNTERS
2872 bool
2873
David Daney7820b842017-09-28 12:34:04 -05002874config MIPS_NR_CPU_NR_MAP_1024
2875 bool
2876
2877config MIPS_NR_CPU_NR_MAP
2878 int
2879 depends on SMP
2880 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2881 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2882
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002883#
2884# Timer Interrupt Frequency Configuration
2885#
2886
2887choice
2888 prompt "Timer frequency"
2889 default HZ_250
2890 help
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01002891 Allows the configuration of the timer frequency.
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002892
Paul Burton67596572015-09-22 10:16:39 -07002893 config HZ_24
2894 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2895
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002896 config HZ_48
Ralf Baechle0f873582008-02-25 16:55:29 +00002897 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002898
2899 config HZ_100
2900 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2901
2902 config HZ_128
2903 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2904
2905 config HZ_250
2906 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2907
2908 config HZ_256
2909 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2910
2911 config HZ_1000
2912 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2913
2914 config HZ_1024
2915 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2916
2917endchoice
2918
Paul Burton67596572015-09-22 10:16:39 -07002919config SYS_SUPPORTS_24HZ
2920 bool
2921
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002922config SYS_SUPPORTS_48HZ
2923 bool
2924
2925config SYS_SUPPORTS_100HZ
2926 bool
2927
2928config SYS_SUPPORTS_128HZ
2929 bool
2930
2931config SYS_SUPPORTS_250HZ
2932 bool
2933
2934config SYS_SUPPORTS_256HZ
2935 bool
2936
2937config SYS_SUPPORTS_1000HZ
2938 bool
2939
2940config SYS_SUPPORTS_1024HZ
2941 bool
2942
2943config SYS_SUPPORTS_ARBIT_HZ
2944 bool
Paul Burton67596572015-09-22 10:16:39 -07002945 default y if !SYS_SUPPORTS_24HZ && \
2946 !SYS_SUPPORTS_48HZ && \
2947 !SYS_SUPPORTS_100HZ && \
2948 !SYS_SUPPORTS_128HZ && \
2949 !SYS_SUPPORTS_250HZ && \
2950 !SYS_SUPPORTS_256HZ && \
2951 !SYS_SUPPORTS_1000HZ && \
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002952 !SYS_SUPPORTS_1024HZ
2953
2954config HZ
2955 int
Paul Burton67596572015-09-22 10:16:39 -07002956 default 24 if HZ_24
Atsushi Nemoto1723b4a2006-06-20 00:19:13 +09002957 default 48 if HZ_48
2958 default 100 if HZ_100
2959 default 128 if HZ_128
2960 default 250 if HZ_250
2961 default 256 if HZ_256
2962 default 1000 if HZ_1000
2963 default 1024 if HZ_1024
2964
Deng-Cheng Zhu96685b12015-03-07 10:30:19 -08002965config SCHED_HRTICK
2966 def_bool HIGH_RES_TIMERS
2967
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002968config KEXEC
Kees Cook7d607172013-01-16 18:53:19 -08002969 bool "Kexec system call"
Dave Young2965faa2015-09-09 15:38:55 -07002970 select KEXEC_CORE
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002971 help
2972 kexec is a system call that implements the ability to shutdown your
2973 current kernel, and to start another kernel. It is like a reboot
David Sterba3dde6ad2007-05-09 07:12:20 +02002974 but it is independent of the system firmware. And like a reboot
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002975 you can start any kernel with it, not just Linux.
2976
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02002977 The name comes from the similarity to the exec system call.
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002978
2979 It is an ongoing process to be certain the hardware in a machine
2980 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02002981 initially work for you. As of this writing the exact hardware
2982 interface is strongly in flux, so no good recommendation can be
2983 made.
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09002984
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002985config CRASH_DUMP
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002986 bool "Kernel crash dumps"
2987 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02002988 Generate crash dump after being started by kexec.
2989 This should be normally only set in special crash dump kernels
2990 which are loaded in the main kernel with kexec-tools into
2991 a specially reserved region and then later executed after
2992 a crash by kdump/kexec. The crash dump kernel must be compiled
2993 to a memory address not used by the main kernel or firmware using
2994 PHYSICAL_START.
2995
2996config PHYSICAL_START
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002997 hex "Physical address where the kernel is loaded"
Maciej W. Rozycki8bda3e22018-03-26 19:11:51 +01002998 default "0xffffffff84000000"
Marcin Nowakowskibff323d2016-12-02 09:58:29 +01002999 depends on CRASH_DUMP
3000 help
Ralf Baechle7aa1c8f2012-10-11 18:14:58 +02003001 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3002 If you plan to use kernel for capturing the crash dump change
3003 this value to start of the reserved region (the "X" value as
3004 specified in the "crashkernel=YM@XM" command line boot parameter
3005 passed to the panic-ed kernel).
3006
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09003007config SECCOMP
3008 bool "Enable seccomp to safely compute untrusted bytecode"
Ralf Baechle293c5bd2007-07-25 16:19:33 +01003009 depends on PROC_FS
Atsushi Nemotoea6e9422007-01-16 23:29:11 +09003010 default y
3011 help
3012 This kernel feature is useful for number crunching applications
3013 that may need to compute untrusted bytecode during their
3014 execution. By using pipes or other transports made available to
3015 the process as file descriptors supporting the read/write
3016 syscalls, it's possible to isolate those applications in
3017 their own address space using seccomp. Once seccomp is
3018 enabled via /proc/<pid>/seccomp, it cannot be disabled
3019 and the task is only allowed to execute a few safe syscalls
3020 defined by each seccomp mode.
3021
3022 If unsure, say Y. Only embedded should say N here.
3023
Paul Burton597ce172013-11-22 13:12:07 +00003024config MIPS_O32_FP64_SUPPORT
Paul Burtonb7f1e272018-11-07 23:13:58 +00003025 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
Paul Burton597ce172013-11-22 13:12:07 +00003026 depends on 32BIT || MIPS32_O32
Paul Burton597ce172013-11-22 13:12:07 +00003027 help
3028 When this is enabled, the kernel will support use of 64-bit floating
3029 point registers with binaries using the O32 ABI along with the
3030 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3031 32-bit MIPS systems this support is at the cost of increasing the
3032 size and complexity of the compiled FPU emulator. Thus if you are
3033 running a MIPS32 system and know that none of your userland binaries
3034 will require 64-bit floating point, you may wish to reduce the size
3035 of your kernel & potentially improve FP emulation performance by
3036 saying N here.
3037
Paul Burton06e2e882014-02-14 17:55:18 +00003038 Although binutils currently supports use of this flag the details
3039 concerning its effect upon the O32 ABI in userland are still being
3040 worked on. In order to avoid userland becoming dependant upon current
3041 behaviour before the details have been finalised, this option should
3042 be considered experimental and only enabled by those working upon
3043 said details.
3044
3045 If unsure, say N.
Paul Burton597ce172013-11-22 13:12:07 +00003046
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003047config USE_OF
Jonas Gorski0b3e06f2012-09-18 11:28:54 +02003048 bool
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003049 select OF
Stephen Neuendorffere6ce1322010-11-18 15:54:56 -08003050 select OF_EARLY_FLATTREE
Grant Likelyabd23632012-02-24 08:07:06 -07003051 select IRQ_DOMAIN
Dezhong Diaof2ffa5a2010-10-13 00:52:46 -06003052
Dengcheng Zhu2fe8ea32018-09-11 14:49:24 -07003053config UHI_BOOT
3054 bool
3055
Andrew Bresticker7fafb062014-08-21 13:04:20 -07003056config BUILTIN_DTB
3057 bool
3058
Jonas Gorski1da8f172015-04-12 12:24:58 +02003059choice
Jonas Gorski5b24d522015-10-12 13:13:01 +02003060 prompt "Kernel appended dtb support" if USE_OF
Jonas Gorski1da8f172015-04-12 12:24:58 +02003061 default MIPS_NO_APPENDED_DTB
3062
3063 config MIPS_NO_APPENDED_DTB
3064 bool "None"
3065 help
3066 Do not enable appended dtb support.
3067
Aaro Koskinen87db5372015-09-11 17:46:14 +03003068 config MIPS_ELF_APPENDED_DTB
3069 bool "vmlinux"
3070 help
3071 With this option, the boot code will look for a device tree binary
3072 DTB) included in the vmlinux ELF section .appended_dtb. By default
3073 it is empty and the DTB can be appended using binutils command
3074 objcopy:
3075
3076 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3077
3078 This is meant as a backward compatiblity convenience for those
3079 systems with a bootloader that can't be upgraded to accommodate
3080 the documented boot protocol using a device tree.
3081
Jonas Gorski1da8f172015-04-12 12:24:58 +02003082 config MIPS_RAW_APPENDED_DTB
Jonas Gorskib8f54f22016-06-20 11:27:36 +02003083 bool "vmlinux.bin or vmlinuz.bin"
Jonas Gorski1da8f172015-04-12 12:24:58 +02003084 help
3085 With this option, the boot code will look for a device tree binary
Jonas Gorskib8f54f22016-06-20 11:27:36 +02003086 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
Jonas Gorski1da8f172015-04-12 12:24:58 +02003087 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3088
3089 This is meant as a backward compatibility convenience for those
3090 systems with a bootloader that can't be upgraded to accommodate
3091 the documented boot protocol using a device tree.
3092
3093 Beware that there is very little in terms of protection against
3094 this option being confused by leftover garbage in memory that might
3095 look like a DTB header after a reboot if no actual DTB is appended
3096 to vmlinux.bin. Do not leave this option active in a production kernel
3097 if you don't intend to always append a DTB.
3098endchoice
3099
Jonas Gorski20249722015-10-12 13:13:02 +02003100choice
3101 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02003102 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
Jiaxun Yang87fcfa72020-03-25 11:55:02 +08003103 !MACH_LOONGSON64 && !MIPS_MALTA && \
Jonas Gorski2bcef9b2015-10-12 13:13:03 +02003104 !CAVIUM_OCTEON_SOC
Jonas Gorski20249722015-10-12 13:13:02 +02003105 default MIPS_CMDLINE_FROM_BOOTLOADER
3106
3107 config MIPS_CMDLINE_FROM_DTB
3108 depends on USE_OF
3109 bool "Dtb kernel arguments if available"
3110
3111 config MIPS_CMDLINE_DTB_EXTEND
3112 depends on USE_OF
3113 bool "Extend dtb kernel arguments with bootloader arguments"
3114
3115 config MIPS_CMDLINE_FROM_BOOTLOADER
3116 bool "Bootloader kernel arguments if available"
Rabin Vincented47e152016-04-28 11:03:09 +02003117
3118 config MIPS_CMDLINE_BUILTIN_EXTEND
3119 depends on CMDLINE_BOOL
3120 bool "Extend builtin kernel arguments with bootloader arguments"
Jonas Gorski20249722015-10-12 13:13:02 +02003121endchoice
3122
Ralf Baechle5e83d432005-10-29 19:32:41 +01003123endmenu
3124
Atsushi Nemoto1df0f0f2006-09-26 23:44:01 +09003125config LOCKDEP_SUPPORT
3126 bool
3127 default y
3128
3129config STACKTRACE_SUPPORT
3130 bool
3131 default y
3132
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003133config PGTABLE_LEVELS
3134 int
Alex Belits3377e222017-02-16 17:27:34 -08003135 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
Kirill A. Shutemova728ab52015-04-14 15:45:51 -07003136 default 3 if 64BIT && !PAGE_SIZE_64KB
3137 default 2
3138
Paul Burton6c359eb2018-07-27 18:23:20 -07003139config MIPS_AUTO_PFN_OFFSET
3140 bool
3141
Linus Torvalds1da177e2005-04-16 15:20:36 -07003142menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3143
Paul Burtonc5611df2016-10-05 18:18:12 +01003144config PCI_DRIVERS_GENERIC
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003145 select PCI_DOMAINS_GENERIC if PCI
Paul Burtonc5611df2016-10-05 18:18:12 +01003146 bool
3147
3148config PCI_DRIVERS_LEGACY
3149 def_bool !PCI_DRIVERS_GENERIC
3150 select NO_GENERIC_PCI_IOPORT_MAP
Christoph Hellwig2eac9c22018-11-15 20:05:33 +01003151 select PCI_DOMAINS if PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07003152
3153#
3154# ISA support is now enabled via select. Too many systems still have the one
3155# or other ISA chip on the board that users don't know about so don't expect
3156# users to choose the right thing ...
3157#
3158config ISA
3159 bool
3160
Linus Torvalds1da177e2005-04-16 15:20:36 -07003161config TC
3162 bool "TURBOchannel support"
3163 depends on MACH_DECSTATION
3164 help
Justin P. Mattock50a23e62010-10-16 10:36:23 -07003165 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3166 processors. TURBOchannel programming specifications are available
3167 at:
3168 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3169 and:
3170 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3171 Linux driver support status is documented at:
3172 <http://www.linux-mips.org/wiki/DECstation>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003173
Linus Torvalds1da177e2005-04-16 15:20:36 -07003174config MMU
3175 bool
3176 default y
3177
Matt Redfearn109c32f2016-11-24 17:32:45 +00003178config ARCH_MMAP_RND_BITS_MIN
3179 default 12 if 64BIT
3180 default 8
3181
3182config ARCH_MMAP_RND_BITS_MAX
3183 default 18 if 64BIT
3184 default 15
3185
3186config ARCH_MMAP_RND_COMPAT_BITS_MIN
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003187 default 8
Matt Redfearn109c32f2016-11-24 17:32:45 +00003188
3189config ARCH_MMAP_RND_COMPAT_BITS_MAX
Enrico Weigelt, metux IT consult371a4152019-03-11 16:54:27 +01003190 default 15
Matt Redfearn109c32f2016-11-24 17:32:45 +00003191
Ralf Baechled865bea2007-10-11 23:46:10 +01003192config I8253
3193 bool
Russell King798778b2011-05-08 19:03:03 +01003194 select CLKSRC_I8253
Thomas Gleixner2d026122011-06-09 13:08:27 +00003195 select CLKEVT_I8253
Wu Zhangjin9726b432009-11-17 01:32:58 +08003196 select MIPS_EXTERNAL_TIMER
Ralf Baechled865bea2007-10-11 23:46:10 +01003197
Ralf Baechlee05eb3f2013-06-12 10:54:11 +02003198config ZONE_DMA
3199 bool
3200
Ralf Baechlecce335a2007-11-03 02:05:43 +00003201config ZONE_DMA32
3202 bool
3203
Linus Torvalds1da177e2005-04-16 15:20:36 -07003204endmenu
3205
Linus Torvalds1da177e2005-04-16 15:20:36 -07003206config TRAD_SIGNALS
3207 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003208
Linus Torvalds1da177e2005-04-16 15:20:36 -07003209config MIPS32_COMPAT
Ralf Baechle78aaf952014-12-19 01:18:03 +01003210 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003211
3212config COMPAT
3213 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07003214
Atsushi Nemoto05e43962006-11-07 18:02:44 +09003215config SYSVIPC_COMPAT
3216 bool
Atsushi Nemoto05e43962006-11-07 18:02:44 +09003217
Linus Torvalds1da177e2005-04-16 15:20:36 -07003218config MIPS32_O32
3219 bool "Kernel support for o32 binaries"
Ralf Baechle78aaf952014-12-19 01:18:03 +01003220 depends on 64BIT
3221 select ARCH_WANT_OLD_COMPAT_IPC
3222 select COMPAT
3223 select MIPS32_COMPAT
3224 select SYSVIPC_COMPAT if SYSVIPC
Linus Torvalds1da177e2005-04-16 15:20:36 -07003225 help
3226 Select this option if you want to run o32 binaries. These are pure
3227 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3228 existing binaries are in this format.
3229
3230 If unsure, say Y.
3231
3232config MIPS32_N32
3233 bool "Kernel support for n32 binaries"
Ralf Baechlec22eacfe2015-01-03 12:10:23 +01003234 depends on 64BIT
Arnd Bergmann5a9372f2019-01-10 17:24:31 +01003235 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Ralf Baechle78aaf952014-12-19 01:18:03 +01003236 select COMPAT
3237 select MIPS32_COMPAT
3238 select SYSVIPC_COMPAT if SYSVIPC
Linus Torvalds1da177e2005-04-16 15:20:36 -07003239 help
3240 Select this option if you want to run n32 binaries. These are
3241 64-bit binaries using 32-bit quantities for addressing and certain
3242 data that would normally be 64-bit. They are used in special
3243 cases.
3244
3245 If unsure, say N.
3246
3247config BINFMT_ELF32
3248 bool
3249 default y if MIPS32_O32 || MIPS32_N32
Ralf Baechlef43edca2016-05-23 16:22:26 -07003250 select ELFCORE
Linus Torvalds1da177e2005-04-16 15:20:36 -07003251
Ralf Baechle21162452007-02-09 17:08:58 +00003252menu "Power management options"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003253
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003254config ARCH_HIBERNATION_POSSIBLE
3255 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003256 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Wu Zhangjin363c55c2009-06-04 20:27:10 +08003257
Johannes Bergf4cb5702007-12-08 02:14:00 +01003258config ARCH_SUSPEND_POSSIBLE
3259 def_bool y
Ralf Baechle3f5b3e12009-07-02 11:48:07 +01003260 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
Johannes Bergf4cb5702007-12-08 02:14:00 +01003261
Ralf Baechle21162452007-02-09 17:08:58 +00003262source "kernel/power/Kconfig"
Rodolfo Giometti952fa952006-06-05 17:43:10 +02003263
Linus Torvalds1da177e2005-04-16 15:20:36 -07003264endmenu
3265
Viresh Kumar7a998932013-04-04 12:54:21 +00003266config MIPS_EXTERNAL_TIMER
3267 bool
3268
Viresh Kumar7a998932013-04-04 12:54:21 +00003269menu "CPU Power Management"
Paul Burtonc095eba2014-04-14 16:24:22 +01003270
3271if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
Viresh Kumar7a998932013-04-04 12:54:21 +00003272source "drivers/cpufreq/Kconfig"
Viresh Kumar7a998932013-04-04 12:54:21 +00003273endif
Wu Zhangjin9726b432009-11-17 01:32:58 +08003274
Paul Burtonc095eba2014-04-14 16:24:22 +01003275source "drivers/cpuidle/Kconfig"
3276
3277endmenu
3278
Ralf Baechle98cdee02012-11-15 10:35:42 +01003279source "drivers/firmware/Kconfig"
3280
Sanjay Lal2235a542012-11-21 18:33:59 -08003281source "arch/mips/kvm/Kconfig"