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| <h4 class="subsection">G.5.3 ARM Features</h4> |
| |
| <p><a name="index-target-descriptions_002c-ARM-features-3660"></a> |
| The ‘<samp><span class="samp">org.gnu.gdb.arm.core</span></samp>’ feature is required for non-M-profile |
| ARM targets. |
| It should contain registers ‘<samp><span class="samp">r0</span></samp>’ through ‘<samp><span class="samp">r13</span></samp>’, ‘<samp><span class="samp">sp</span></samp>’, |
| ‘<samp><span class="samp">lr</span></samp>’, ‘<samp><span class="samp">pc</span></samp>’, and ‘<samp><span class="samp">cpsr</span></samp>’. |
| |
| <p>For M-profile targets (e.g. Cortex-M3), the ‘<samp><span class="samp">org.gnu.gdb.arm.core</span></samp>’ |
| feature is replaced by ‘<samp><span class="samp">org.gnu.gdb.arm.m-profile</span></samp>’. It should contain |
| registers ‘<samp><span class="samp">r0</span></samp>’ through ‘<samp><span class="samp">r13</span></samp>’, ‘<samp><span class="samp">sp</span></samp>’, ‘<samp><span class="samp">lr</span></samp>’, ‘<samp><span class="samp">pc</span></samp>’, |
| and ‘<samp><span class="samp">xpsr</span></samp>’. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.arm.fpa</span></samp>’ feature is optional. If present, it |
| should contain registers ‘<samp><span class="samp">f0</span></samp>’ through ‘<samp><span class="samp">f7</span></samp>’ and ‘<samp><span class="samp">fps</span></samp>’. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.xscale.iwmmxt</span></samp>’ feature is optional. If present, |
| it should contain at least registers ‘<samp><span class="samp">wR0</span></samp>’ through ‘<samp><span class="samp">wR15</span></samp>’ and |
| ‘<samp><span class="samp">wCGR0</span></samp>’ through ‘<samp><span class="samp">wCGR3</span></samp>’. The ‘<samp><span class="samp">wCID</span></samp>’, ‘<samp><span class="samp">wCon</span></samp>’, |
| ‘<samp><span class="samp">wCSSF</span></samp>’, and ‘<samp><span class="samp">wCASF</span></samp>’ registers are optional. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.arm.vfp</span></samp>’ feature is optional. If present, it |
| should contain at least registers ‘<samp><span class="samp">d0</span></samp>’ through ‘<samp><span class="samp">d15</span></samp>’. If |
| they are present, ‘<samp><span class="samp">d16</span></samp>’ through ‘<samp><span class="samp">d31</span></samp>’ should also be included. |
| <span class="sc">gdb</span> will synthesize the single-precision registers from |
| halves of the double-precision registers. |
| |
| <p>The ‘<samp><span class="samp">org.gnu.gdb.arm.neon</span></samp>’ feature is optional. It does not |
| need to contain registers; it instructs <span class="sc">gdb</span> to display the |
| VFP double-precision registers as vectors and to synthesize the |
| quad-precision registers from pairs of double-precision registers. |
| If this feature is present, ‘<samp><span class="samp">org.gnu.gdb.arm.vfp</span></samp>’ must also |
| be present and include 32 double-precision registers. |
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